JPH01147914A - Drive circuit for composite semiconductor device - Google Patents

Abstract

PURPOSE:To drive the composite semiconductor device by a single signal by employing npn and pnp complementary transistors(TRs) for a drive circuit in the composite semicoductor device comprising of an SI thyristor and a power MOS. CONSTITUTION:With a positive signal applied to a base 18, the npn TR 15 is turned on, a gate voltage is applied to a gate of a power MOSFET 2 and SIT 20 from a positive power supply 14, both main devices are turned on, resulting that a current flows from the main power supply 13 to a load 12. In this case, the pnp TR 16 is reverse-biased to be turned off. With a negative signal applied to the base 18, the operation is opposite to the operation above and the said main devices 2, 20 are turned off. In this case, since both the devices 2, 20 are devices of majority carrier, no residual electric charge exists and high speed switching is attained.

Description

[Detailed description of the invention]

[Industrial Field of Application J This invention relates to a drive circuit for a composite semiconductor device. C Conventional technology j Figure 3 shows, for example, the Technical Report of the Institute of Electrical Engineers of Japan, published in June 1962, No. 249, "Trends in self-extinguishing power semiconductor devices J.
Conventional bipolar transistor and power MO8FX'l shown on page 60! In the figure, (1) is a bipolar transistor, which is numerically a single fungistor and has a large current and high withstand voltage. (2) is an n-channel enhancement mode power MO81i'l'I', but here a semiconductor element with low on-resistance (large current) and low breakdown voltage is used. Both the bipolar transistor (1) and the power MO8FET (2) constitute a cascode-connected (series-connected) 31MO8. (3) is the above BiMO8I
D collector terminal, (4) is the same (source terminal of BiVO4, (5) is the gate terminal of power MO8Li”ET (2), (6) is the current transformer that passes through the wiring on the collector side of bibolar tunister (1) , one end is connected to the source terminal of the power MO8FET (2), and the other end is connected to the bipolar transistor (
1) Connected to the pace. (8) is a constant voltage diode connected between the source terminals of base MO8li'ET (2) of bipolar transistor α), (9) is a diode, and (10) is a resistor.
G) (The D series body is connected between the collector terminal and the base terminal of the bipolar transistor (1). (11) is a capacitor, which is connected between the base of the bipolar transistor (1) and the source of MO81i'ET (2). Next, we will explain the operation. In Figure 3, the capacitor (11) maintains a constant voltage through the diode (9) and resistor (lO) when the OBIMO8 elements (1) and (2) are off. It is charged to the Zener voltage of the diode (8).Next, when the power MOSF E 'l' (2) is turned on, the capacitor (l) is charged to the bipolar transistor (1).
l) Calapace current is obtained first. - Once the collector current flows out, the current transistor (6) supplies a stable base drive current to the bipolar transistor (1). When the power MO8FET (2) is turned off, the bipolar transistor (1) becomes an emitter cut-off, and the accumulated charge stored on the collector side of the bipolar transistor (1) is transferred from the pace of the bipolar transistor (1) to the constant voltage diode (8). Turns off very fast due to discharge through.

[Problems to be solved by the invention]

In the case of a drive circuit for a conventional composite semiconductor device (cascode BIMO8) consisting of a bipolar transistor and a power MO8FET, the transistor part had to be a single transistor in order to require high-speed switching performance, so the base drive current was large. As mentioned above, this requires a complex base drive current.
There is a problem that the drive circuit becomes large and expensive. This invention was made to solve the above problems, and uses a bk normally-off type electrostatic induction thyristor (hereinafter referred to as SI thyristor) instead of the conventional bipolar transistor in the conventional cascode type MO8. , and to easily drive this composite semiconductor device with a single signal by connecting npn and pnp complementary transistors in series in a drive circuit. [Means for Solving the Problems] A driving circuit for a composite semiconductor device according to the present invention is a cascode Bl-MO8 composite semiconductor device consisting of a normally-off type 81 thyristor and a power MO8FE'I'. By connecting the midpoints of NPN and POP bipolar transistors and applying positive and negative signals to the paces of both transistors, we have realized a driving circuit for a composite semiconductor device that can be driven with low power loss. [Function] Since both ends of the drive circuit for the composite semiconductor device in the invention are voltage drive devices, the current consumption of the drive tank can be made much smaller than that of conventional drive circuits, and the drive signal It has the characteristic that only one positive and negative signal is required, and when a positive signal is input from the pace terminal, the npn transistor is turned on, and the positive power supply drives the power MO8rET and the gate of the SI thyristor, and both are turned on at the same time. The dope current at this time is very small. [Embodiment J] This F14o-Embodiment will be explained below with reference to the figures. In Figure 4g11, (2) is a power Mo5raT (low voltage, low on-voltage product), and (20) is a normally return-off type S-T, which are connected in cascode to each other. (1
2) shows the load, (13) shows the main power supply, and the new B
1MOS devices (2) and (20) are each connected in series. On the other hand, the gates of BiMO8 (2) and (20) are connected to each other, and the npn transistor (15) and P
It is connected to the midpoint of the transistor (16). The rectifier side ports of each of the transistors (15) (la) are mutually grounded via the drive power supplies (14) and (17). Furthermore, the structure is such that positive and negative signals are applied to the pace terminals (18) of both transistors (15) and (16). Next, the operation of this invention will be explained. Base terminal (1
When a positive signal is applied to the npn transistor (1
5) is turned on and supplies a gate voltage to the gate of the piezoelectric Ill (14) or Lapower MO8FET (2) S'l' (20). Both main devices are therefore turned on and current flows from the main power supply (13) through the load (12). At this time, the pnp (pnp) filter nut (16) is in a reverse bias state and is therefore in an off state. Base terminal (18
), conversely, when a negative signal is applied to npn) fungistor (15), the fungistor (15) turns off and the
) turns on. Therefore, since a reverse bias is also applied from the negative power supply (17) to the power M 08 F E T (2) and the S transistor (20), both main devices are turned on and off. At this time, power MO8
Since both the FET (2) and the S(20) are majority carrier devices, high-speed switching is possible with no residual charge. On the other hand, since both main devices are voltage-driven semiconductor elements, the driving power from the driving power supplies (14) and (17) is extremely small. Further, in the above embodiment, a drive circuit using complementary type bipolar transistors of Dp and pnp was described, but a co-channel ρ and p-channel power MO8Ii'ET may also be used, and one embodiment thereof is shown in FIG. In Figure 2, (15) is the n-channel power MO8v
E T , (16') is p-channel power MO8F
It is ET. The other parts are the same as those in FIG. 1 and will therefore be omitted. Also, the operation is the same as in Figure 1*'
? '-h <Since the operation is similar, the explanation will be omitted. However, in the case of the circuit, since the power MO81i'ET is driven, a gate voltage waveform of K is applied to the gate (1g). Also, since it is driven by gate voltage,
The driving power is even lower than in the case of FIG. [Effects of the invention'] As described above, this F! According to AK, power MO8FE
Since both voltage-driven semiconductor elements such as T and S ethyristors are configured in a cascode configuration, driving power can be extremely small, and npn and pnp complementary transistors can be connected to gate 1. Therefore, this composite transistor can be controlled with a single positive and negative signal.

[Brief explanation of the drawing]

Figure 1 shows the S ethyristor and power MO8FE of this invention.
A circuit diagram of a BiMO8 drive circuit using TjC, FIG. 2 is a circuit diagram showing another embodiment of the present invention, and FIG. 3 is a cascode type B circuit diagram using a conventional pievora transistor MO8FETK.
It is a circuit diagram of the drive circuit of iMO8. In the figure, (2) is the power MOSFET,
(3) is the collector terminal, (4) is the source terminal, (5)
is the gate terminal, (12) is the load, (13) is the main power supply, (
14) (17) is a driving power supply, (15) is an npn transistor, (15') is an n-channel power MO8FET
, (16) is pnp) fungistar, (16') is pf'
rnepvy -M O8r ET , (1g)
(18') is a base terminal, (20) is a normal return off switch T, and (21) is a diode. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (2)

[Claims] (1) The drain of a low voltage, low on-resistance metal oxide semiconductor field effect transistor (MOSFET) is connected in series to the cathode of a normally off type high voltage, large current electrostatic induction thyristor, and the gate terminals of both are connected to each other. In the drive circuit for a composite semiconductor device formed by
A composite semiconductor device characterized in that pn and pnp complementary transistors are connected, a positive power source is connected to the collector side of the npn transistor, a negative power source is connected to the pnp transistor, and the bases of both transistors are connected. drive circuit. (2) The driving circuit for a semiconductor device according to claim 1, wherein an n-channel MOSFET and a p-channel MOSFET are used in place of the npn transistor and the pnp transistor.