JPH0992652A - Forming method for solder ball bump - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a good contact at an interface between a solder ball bump and a base metal, by carrying out a pretreatment step before a solder-film formation step using a plasma treatment system with at least two high-frequency power supplies for controlling plasma generation and a substrate bias voltage independently. SOLUTION: A BLM film 4 as a metallic barrier part made of laminated film of Cr, Cu or Au is formed at an opening of a surface protective film 3 made of polyimide film on an aluminum electrode pad 2 in a semiconductor element 1. A thick resist film 6 having an opening 5 with a given diameter is formed adjacently to the BLM film 4. After scum 6a at the bottom in the opening is removed, a vapor deposition film made of solder is formed over a substrate already subjected to a pretreatment step before the film formation. Solder is melted in a heat treatment step to form a solder ball bump 15. As a result, a good electric contacted state at an interface between a solder ball bump and a base metal can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming solder ball bumps, and more specifically, a flip chip IC for forming bumps made of metal on the surface of a semiconductor substrate and surface-bonding with electrodes formed on the surface of a printed wiring board. The present invention relates to a method for forming solder ball bumps, which is obtained by performing a pretreatment on a film forming process of a multi-layer metal layer which is a base of a bump, which is a part of the manufacturing process.

[0002]

2. Description of the Related Art In order to further reduce the size of electronic equipment, it is important to improve the component mounting density. Regarding semiconductor ICs, high-density packaging technology using flip chips has been actively developed as an alternative to conventional package packaging. As one of the flip-chip mounting methods, a solder ball bump is formed on an Al (aluminum) electrode pad of the IC to
There is a method of directly mounting a bare chip on a printed wiring board.

As a method for forming the solder bumps on a predetermined electrode, there is a method using electrolytic plating. In this case, the thickness of the solder formed by the surface condition of the base and slight variations in electric resistance. Is affected, and there is a problem that it is basically difficult to form solder bumps having a uniform height in the IC chip. Therefore, as a manufacturing method capable of suppressing the variation in the height of the solder, there is a method using film formation by vacuum evaporation and lift-off of the photoresist film. An example of a conventional general vacuum vapor deposition apparatus used for the solder ball bump manufacturing process and solder vapor deposition by this method is shown in FIGS. 4 and 5 and described below.

The bonding portion of the flip chip IC is formed by forming an electrode pad 2 of Al or the like on a semiconductor substrate 1 of silicon or the like by sputtering or etching, covering the entire surface with a surface protective film 3 of polyimide or the like, and then forming an electrode. An opening is formed on the pad 2, and a BLM (Ball Limit) is formed.
(Ting Metal) film 4 called Cr, Cu,
A multilayer metal film made of Au or the like is formed (see FIG. 4A). Further, a resist film 6 having an opening 5 is formed on the BLM film 4 (see FIG. 4B).

In order to form a metal film such as solder on the wafer shown in FIG. 4 (b) manufactured in this manner, a vacuum vapor deposition apparatus shown in FIG. 5 is used. The vacuum vapor deposition apparatus shown in FIG. 5 is referred to as a resistance heating type vacuum vapor deposition apparatus 7, and includes a crucible 11 in which a vapor deposition material 10 heated and melted by a heater 9 is stored in a vacuum container 8, and a dome-like shape at a position facing the crucible. A processing stage 12 and a wafer 13 as a workpiece are arranged on the surface of the processing stage facing the crucible 11. As a result, the solder layer 14 is formed on the entire surface of the wafer 13 (see FIG. 4C), and after the patterning by the resist lift-off (see FIG. 4D), the solder is melted by the heat treatment. As a result, solder ball bumps 15 as shown in FIG. 4E are formed.

Here, the thickness of the solder layer, which influences the size of the finished solder ball bump, depends on the film formation pattern, but in consideration of strength and stability at the time of mounting on the printed wiring board. Therefore, a thick material of about 30 μm is usually required. Therefore, the film thickness of the underlying resist film 6 required for lift-off needs to be considerably thicker than 30 μm.
It is difficult to perform accurate and stable pattern formation in the lithography process.

That is, a slight change in working environment or processing conditions causes poor resolution, and as shown in FIG. 4 (b), a resist film remains thin in the opening 5 to the extent that it cannot be confirmed even by an optical microscope, or development is performed. A problem often arises in that good electrical contact cannot be obtained at the interface between the finished solder ball bump and the underlying BLM film due to residual liquid cleaning residue. In extreme cases, B
Adhesion between the LM film and the solder vapor deposition film is reduced, causing a situation in which the solder bump is peeled off from the BLM film during a subsequent process or mounting on a printed wiring board.

The remaining resist film and the uncleaned portion of the developing solution are hereinafter referred to as scum 6a. Here, for convenience of expression, the scum 6a is shown extremely thick. Therefore, as one of the countermeasures, a method of removing the scum of the thick film resist and cleaning the surface of the underlying contact by performing sputter etching using RF plasma before forming the solder vapor deposition film is also adopted. . However, even in that case, a new problem occurs.

That is, the normal plasma processing is performed by applying RF power between the parallel plate electrodes, but under the normal processing conditions set to enhance the effect of scum removal and cleaning, the underlying photoresist pattern is often used. Therefore, the lift-off failure occurs in the pattern formation of the solder vapor deposition film. This is because during RF plasma treatment for scum removal, the pattern shape of the photoresist that has undergone thermal alteration changes due to substrate collision of ions with large incident energy and wafer temperature rise, or the resist pattern at the interface with the underlying layer changes. Due to the effect of image sticking, peeling of the resist does not proceed at the time of lift-off, or a large amount of residue is generated.

For these reasons, it is desired to establish a solder bump forming process with high accuracy and high reliability so that both scum removal of resist (cleaning of the underlying contact surface) and peeling off by lift-off can be performed well. Has been done.

[0011]

SUMMARY OF THE INVENTION The object of the present invention is to solve the problem of forming a ball bump in a flip chip IC, etc.
Formation of solder ball bumps by which the shape of the resist film can be easily controlled in the pretreatment step of the LM film formation step and the pretreatment method of the metal film formation step using a plasma processing apparatus that does not affect the lower layer is improved Is to provide a method.

[0012]

In order to solve such a problem, in the invention of a method for forming a solder ball bump according to claim 1, a solder film forming step in patterning a solder layer using lift-off of a photoresist is performed. In a method of forming a solder ball bump including the above, a pretreatment for film formation is performed using a plasma processing apparatus having two high-frequency power sources capable of independently controlling at least plasma generation and substrate bias voltage, and excessive thermal alteration of the resist is performed. By processing the resist in the optimum state for lift-off without causing the burn-in to the lower layer, it is possible to form a BLM film having a good pattern.

A solder ball bump forming method according to a second aspect of the present invention is a method for forming a solder ball bump, which includes a solder film forming step when patterning a solder layer by using lift-off of a photoresist, at least ICP (Induc).
constantly Coupled Plasma: High Frequency Inductively Coupled Plasma), TCP (Transformer)
Coupled Plasma), ECR (Elec
tron Cyclotron Resonance
e), performing pre-deposition treatment using a plasma processing apparatus having a high-density plasma source such as a helicon wave plasma source capable of obtaining a plasma density of 1 × 10 ¹¹ cm ⁻³ or more and less than 1 × 10 ¹⁴ cm ^−3. The method of forming a solder ball bump according to claim 1, wherein the resist is processed in an optimum state for lift-off without causing excessive thermal alteration of the resist to cause image sticking to a lower layer. It was possible to form a BLM film having a good pattern.

According to a third aspect of the present invention, there is provided a solder ball bump forming method including a solder film forming step in which a solder layer is patterned by using lift-off of a photoresist. The film forming pretreatment is performed by using a plasma processing apparatus equipped with a temperature control mechanism and setting processing conditions such that the maximum temperature reached on the wafer surface during processing is 50 ° C to 100 ° C. The method of forming a solder ball bump as described in 1 above, and by processing the resist in an optimal state for lift-off without giving excessive thermal alteration to the resist to cause image sticking to the lower layer, a BLM having a good pattern is formed. It enabled the formation of a film.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described below with reference to FIGS.

Embodiment 1 This embodiment is a triode type plasma processing apparatus 16 in a solder film forming process when a solder vapor deposition film is patterned by using liftoff of a photoresist in a process of forming a solder ball bump. The present invention is applied to the pretreatment for film formation, which will be described with reference to FIGS. In the present embodiment, the wafer used as a sample has a surface protection layer 3 such as a polyimide film on the Al electrode pad 2 of the semiconductor substrate 1 as shown in FIG.
Cr and C called the BLM film 4 in the portion opened to
A barrier metal made of a metal laminated film of u, Au, or the like was formed, and a thick resist film 6 having an opening 5 of a predetermined size was formed so as to face the BLM film 4.

At this time, a so-called scum 6a such as a resist coating remains thinly on the bottom of the opening 5. Then, a triode type plasma processing apparatus as shown in FIG. 2 is prepared. The plasma processing apparatus 16 includes an anode plate 18 and a cathode plate (processing stage) 12 which are arranged to face each other in a plasma processing chamber 17 in an argon gas atmosphere.
A grid electrode 19 is provided between them, a plasma power source 20 is connected to the anode plate 18, and a substrate bias power source 21 is connected to the cathode plate 12 via a coupling capacitor.
A substrate (wafer) 13 to be processed is placed on the cathode plate (processing stage) 12.

The plasma processing apparatus 16 is characterized by having a plasma power source 20 and a substrate bias power source 21 independently. The processing stage 12 has a structure as shown in FIG. 2B, the temperature of which is adjusted by a coolant circulating inside the stage 12, and the surface of the stage is placed between the wafer 13 and the wafer 13 by electrostatic adsorption and gas cooling such as He. The heat transfer is well done. In this plasma processing step, the substrate bias voltage is greatly reduced as compared with the case of using the conventional parallel plate type RF plasma (conventionally, approximately 500 V).

This is because the plasma generation and the substrate bias are controlled by independent high-frequency power supplies, so that the substrate bias voltage can be reduced without impairing the processing speed.

The substrate (wafer) 13 to be processed in the above-mentioned state
Was set in the triode type plasma processing apparatus 16, and as an example, the predeposition process of the solder vapor deposition film was performed under the following conditions. Ar Gas flow rate: 25 sccm Ar Gas pressure: 5 mTorr (0.67 Pa) Plasma source power: 700 W (2 MHz) RF substrate Bias voltage: 300 V (13.56 MHz) Treatment time: 100 seconds Target after this plasma treatment As shown in FIG. 1C, the scum 6a at the bottom of the resist opening 5 was removed from the processed substrate.
It has been previously confirmed by experiments that the maximum temperature reached on the wafer surface when processed under these conditions is approximately 70 ° C.

After that, a solder vapor deposition film is formed on the entire surface of the substrate to be subjected to the film formation pretreatment (see FIG. 1D), and after patterning by resist lift-off (see FIG. 1E). By melting the solder by heat treatment, the solder ball bump 1 as shown in FIG.
5 was formed. By adopting the present invention, it becomes possible to precisely control the substrate bias voltage in the pre-treatment of the solder film formation when patterning the solder vapor deposition film by using the lift-off of the photoresist, and to give an excessive thermal alteration to the resist to the base. The scum removal of the thick film resist pattern and the cleaning of the contact surface could be effectively realized without inducing the image sticking. As a result, good electrical contact can be obtained at the interface between the finished solder ball bump and the base metal, and the adhesion strength with the base is increased to improve the reliability of the product set after flip chip mounting. I was able to.

Second Embodiment In the second embodiment of the present invention, an ICP (Inductive) is used in a solder film forming process when a solder vapor deposition film is patterned using lift-off of photoresist in a solder ball bump forming process. Coupl
The invention of the present application is applied by using a plasma processing apparatus 22 having an ed plasma as a plasma generation source for film formation pretreatment, and this will be described with reference to FIGS. 1 and 3A. The substrate to be processed used in the present embodiment is the same as that shown in FIG. 1B used in the first embodiment, and duplicated description will be omitted.

Here, the ICP used in this embodiment example
A schematic configuration example of the processing apparatus will be described with reference to FIG. This device is composed of an inductively coupled coil 2 wound around a side wall of a plasma processing chamber 17 made of a dielectric material such as quartz.
3, the power of the ICP power source (plasma power source) 20 is supplied to the plasma processing chamber 17, and high density plasma is generated therein. The substrate 13 to be processed is placed on the processing stage 12 to which the substrate bias power supply 21 is supplied, and is subjected to desired plasma processing. In the figure, details of the processing gas introduction hole, the vacuum exhaust system, the gate valve, the transfer system for the substrate to be processed and the like are omitted. The feature of this device is that the large-sized multi-turn inductive coupling coil enables plasma excitation with high power and can perform treatment with high-density plasma of 10 ¹² / cm ³ .

Further, the processing stage 12 is the same as in the first embodiment.
As shown in FIG. 2B, the temperature of the stage is controlled by the refrigerant circulating inside the stage, and the stage surface is electrostatically attracted and
The gas cooling ensures good heat transfer with the wafer. The substrate 13 to be processed shown in FIG.
Was set on the processing stage 12, and as an example, the solder film pretreatment was performed under the following conditions. Ar Gas flow rate: 25 sccm Ar Gas pressure: 1 mTorr (0.13 Pa) ICP power supply power: 1000 W (2 MHz) Substrate bias voltage: 200 V (13.56 MHz) Processing time: 50 seconds

In this embodiment, the substrate bias voltage is further reduced as compared with the above-mentioned embodiments. This is due to the use of a high-density plasma source and the effect of suppressing the scattering of incident ions because the condition can be set to a low pressure by this.
^This is the result of reducing the substrate bias voltage without impairing the processing speed due to ⁺ ion irradiation.

It has been previously confirmed by experiments that the maximum temperature reached on the wafer surface when processed under these conditions is approximately 70.degree. As a result, more precise control of the substrate bias voltage is possible in the pre-metal film formation process when patterning the solder deposition film using the lift-off of photoresist, and even for large-diameter wafers, uniform and rapid processing is possible. Was able to establish a possible process.

Therefore, the scum removal of the thick film resist pattern and the cleaning of the contact surface are effectively realized without giving excessive thermal alteration to the resist to induce the image sticking to the underlayer, thereby making it possible to obtain Example 1. Similarly, it was finally possible to form solder ball bumps having good electrical contact with the underlying metal.

Embodiment 3 This embodiment is similar to the solder ball bump forming process in the solder film forming step when patterning the solder vapor deposition film using the lift-off of the photoresist.
TCP (Transformer Coupled P)
The invention of the present application is applied by using a plasma processing apparatus 24 having a plasma as a plasma generation source for film pretreatment, which will be described with reference to FIGS. 1 to 2B. The substrate to be processed used in the present embodiment is the same as that shown in FIG. 1B used in the second embodiment, and duplicated description will be omitted.

Here, the TCP used in this embodiment
A schematic configuration example of the processing device will be described with reference to FIG. This device has the same basic configuration as the ICP processing device shown in FIG. 3A, and the same components are designated by the same reference numerals and the description thereof is omitted. The feature of this apparatus is that the top plate of the plasma processing chamber 20 is made of a dielectric material such as quartz,
A spiral TCP coil 25 is placed on the upper surface of the TCP
The power of the power supply (plasma power supply) 20 is supplied to the plasma processing chamber 1
This is the point to be introduced within 7. According to this device, a large TC
Due to the inductive coupling between the P coil 25 and the processing gas in the plasma processing chamber 17, high density plasma of the order of 10 ¹² / cm ³ can be generated.

Further, the processing stage 11 is temperature-controlled by a refrigerant circulating inside the stage as shown in FIG. 2B, as in the above-mentioned embodiment, and the stage surface is electrostatically adsorbed and cooled by He gas. Good heat transfer to and from the wafer is ensured. The substrate 12 to be processed shown in FIG. 1B was set on the processing stage 11, and as an example, the solder film forming pretreatment was performed under the following conditions. Ar Gas flow rate: 25 sccm Ar Gas pressure: 1 mTorr (0.13 Pa) TCP power supply power: 1000 W (2 MHz) Substrate bias voltage: 200 V (13.56 MHz) Processing time: 50 seconds

As a result, similar to the above-mentioned embodiment, the lift-off of the photoresist is used to pattern the solder deposition film.
In the pretreatment for metal film formation during the polishing, the substrate bias voltage can be precisely controlled, and a process capable of performing uniform and rapid treatment even for a large-diameter wafer can be established. For this reason, the scum removal of the thick film resist pattern and the cleaning of the contact surface are effectively realized without giving excessive thermal alteration to the resist to induce the image sticking to the base, so that the final metal with the base metal is finally removed. It has been possible to form solder ball bumps with good electrical contact.

Although the present invention has been described above based on the three types of embodiments, the present invention is not limited to these embodiments, and the sample structure, the process apparatus, the process conditions, etc. It is needless to say that the selection can be appropriately made without departing from the spirit of the invention. For example, as a high-density plasma source, ICP and T
Although an example using CP is shown, other than that, ECR, helicon wave plasma, or the like can be similarly used. By the way, if the solder film forming pretreatment of the present invention is carried out by a separate apparatus independent of film forming, the effect is greater as it is carried out immediately before film formation by vacuum vapor deposition. Furthermore, it is more effective to use an apparatus of the type in which the pre-deposition chamber is connected to the deposition chamber under high vacuum.

[0033]

By adopting the present invention, the scum removal of the thick film resist pattern and the cleaning of the contact surface can be effectively and stably realized without giving excessive thermal alteration to the resist to induce the image sticking to the base. As a result, good electrical contact can be obtained at the interface between the finished solder ball bump and the base metal, and the adhesion strength with the base is increased, improving the reliability of the product set after flip chip mounting. As a result, it is possible to establish a method for forming solder ball bumps that allows uniform and rapid processing even for large diameter wafers.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a wafer according to a manufacturing process of a solder ball bump to which the present invention is applied, (a) a state in which a BLM film is patterned on an Al electrode pad, (b).
A state where a thick film resist pattern for patterning the solder layer is formed, (c) A state where scum on the BLM film is removed by pretreatment, (d) A state where the solder layer is formed on the entire surface of the wafer , (E) shows a state in which an unnecessary solder layer is removed by lift-off of the resist, and (f) shows a state in which the solder is melted by heat treatment and ball bumps are formed.

FIG. 2 shows a triode type plasma processing apparatus,
(A) Schematic sectional view, (b) Schematic sectional view of the substrate stage equipped with a temperature control mechanism.

3A and 3B show a plasma processing apparatus, wherein FIG. 3A is a schematic sectional view of a plasma processing apparatus equipped with an ICP, and FIG. 3B is a schematic sectional view of a plasma processing apparatus equipped with a TCP.

FIG. 4 is a schematic cross-sectional view of a wafer along a conventional solder ball bump manufacturing process, (a) B on an Al electrode pad.
A state where the LM film is patterned, (b) a state where a thick film resist pattern for patterning the solder layer is formed, (c) a state where the solder layer is formed on the entire surface of the wafer,
(D) A state in which an unnecessary solder layer is removed by lift-off of the resist, and (e) shows a state in which the solder is melted by heat treatment and ball bumps are formed.

FIG. 5 is a schematic cross-sectional view showing a resistance heating type vacuum vapor deposition device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Al electrode pad 3 Surface protective film 4 BLM film 5 Opening 6 Photoresist film 6a Scum 7 Resistance heating type vacuum vapor deposition device 8 Vacuum container 9 Heater 10 Vapor deposition material 11 Crucible 12 Processing stage (cathode plate) 13 Processing target Substrate (wafer) 14 Solder layer 15 Solder ball bump 16 Triode type plasma processing device 17 Plasma processing chamber 18 Anode plate 19 Lattice electrode 20 Plasma power supply 21 Substrate bias power supply 22 Plasma processing device with ICP 23 Inductive coupling coil 24 TCP mounted Plasma processing device 25 TCP coil

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[Procedure amendment]

[Submission date] November 30, 1995

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Correction contents]

[Document Name] Statement

Method of forming solder ball bumps

[Claims]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming solder ball bumps, and more specifically, a flip chip IC for forming bumps made of metal on the surface of a semiconductor substrate and surface-bonding to electrodes formed on the surface of a printed wiring board. The present invention relates to a method for forming solder ball bumps, which is obtained by performing a pretreatment on a solder film forming step of a multi-layered metal layer which is a base of bumps, which is a part of the manufacturing step.

[0002]

2. Description of the Related Art In order to further reduce the size of electronic equipment, it is important to improve the component mounting density. Regarding semiconductor ICs, high-density packaging technology using flip chips has been actively developed as an alternative to conventional package packaging. As one of the flip chip mounting methods, a solder ball bump is formed on the Al (aluminum) electrode pad of the IC, and I
There is a method of directly mounting the C bare chip on the printed wiring board.

As a method of forming the solder bumps on a predetermined electrode, there is a method using electrolytic plating. In this case, the thickness of the solder formed by the surface condition of the base and slight variations in electric resistance. Is affected, and it is basically difficult to form solder bumps having a uniform height in the IC chip. Where is
As a manufacturing method capable of suppressing the variation in height, there is a method using film formation by vacuum evaporation and lift-off of a photoresist film. An example of a conventional general vacuum vapor deposition apparatus used for the solder ball bump manufacturing process and solder vapor deposition by this method is shown in FIGS. 4 and 5, and will be described below.

The bonding portion of the flip chip IC is formed by forming an electrode pad 2 of Al or the like on a semiconductor substrate 1 of silicon or the like by sputtering or etching, covering the entire surface with a surface protective film 3 of polyimide or the like, and then forming an electrode. An opening is formed on the pad 2, and a BLM (Ball Limit) is formed.
(Ting Metal) film 4 called Cr, Cu,
A multilayer metal film made of Au or the like is formed (see FIG. 4A). Further, a resist film 6 having an opening 5 is formed on the BLM film 4 (see FIG. 4B).

In order to form a metal film of solder or the like on the wafer shown in FIG. 4 (b) thus manufactured, the vacuum vapor deposition apparatus shown in FIG. 5, for example, is used. The vacuum vapor deposition apparatus shown in FIG. 5 is called a resistance heating type vacuum vapor deposition apparatus 7 and includes a vacuum container 8
A crucible 11 in which a vapor deposition material 10 heated and melted by a heater 9 is stored, a dome-shaped processing stage 12 at a position facing the crucible, and a wafer 13 which is a workpiece on a surface facing the crucible 11 of the processing stage. It is arranged. This allows
A solder layer 14 is formed on the entire surface of the wafer 13 (FIG. 4C).
See), resist lift-off after performing patterning by reference (FIG. 4 (d)), by melting the solder by heat treatment, finally, such as shown in FIG. 4 (e), solder
The ball bump 15 is formed.

Here, the thickness of the solder layer which influences the size of the finished solder ball bump depends on the film formation pattern, but the strength and stability at the time of mounting on the printed wiring board are taken into consideration. Therefore, a thick material of about 30 μm is usually required.
Therefore, the film thickness of the underlying resist film 6 required for lift-off needs to be considerably thicker than 30 μm, which makes it difficult to perform accurate and stable pattern formation in the lithography process.

That is, a slight change in working environment or processing conditions causes poor resolution, and as shown in FIG. 4 (b), a resist film remains thin in the opening 5 to the extent that it cannot be confirmed even by an optical microscope, or development is performed. A problem frequently arises in that good electrical contact cannot be obtained at the interface between the finished solder ball bump and the underlying BLM film due to residual liquid cleaning residue. In extreme cases,
Adhesion between the BLM film and the solder vapor deposition film is reduced, causing a situation in which the solder bump is peeled off from the BLM film during a subsequent process or mounting on a printed wiring board.

The remaining resist film and the uncleaned portion of the developing solution are hereinafter referred to as scum 6a. Here, for convenience of expression, the scum 6a is shown extremely thick. Therefore, as one of the countermeasures, a method of removing the scum of the thick film resist and cleaning the surface of the underlying contact by performing sputter etching using RF plasma before forming the solder vapor deposition film is also adopted. . However, even in that case, a new problem occurs.

That is, the normal plasma processing is performed by applying RF power between the parallel plate electrodes, but under the normal processing conditions set to enhance the effect of scum removal and cleaning, the underlying photoresist pattern is often used. Therefore, the lift-off failure occurs in the pattern formation of the solder vapor deposition film. This is because during RF plasma treatment for scum removal, the pattern shape of the photoresist that has undergone thermal alteration changes due to substrate collision of ions with large incident energy and wafer temperature rise, or the resist pattern at the interface with the underlying layer changes. Due to the effect of image sticking, peeling of the resist does not proceed at the time of lift-off, or a large amount of residue is generated.

For these reasons, it is desired to establish a solder bump forming process with high accuracy and high reliability so that both resist scum removal (cleaning of the underlying contact surface) and peeling off by lift-off can be performed well. Has been done.

[0011]

Therefore, an object of the present invention is to impart excessive thermal alteration to the resist to cause image sticking to the base.
Of thick film resist pattern without inducing
Effectively stable removal and cleaning of the contact surface
Can be achieved by using the finished solder ball bumps and base
Good electrical contact at the interface with the metal
It is to provide a method for forming a ball bump.

[0012]

In the invention of the method of forming the solder ball bumps of claim 1 to solve the Means for Solving the Problems] Such issues, the solder at the time of patterning the solder <br/> layer using a lift-off photoresist In a method of forming a solder ball bump including a film forming step, a solder film forming pretreatment is performed using a plasma processing apparatus having two high frequency power sources capable of independently controlling at least plasma generation and substrate bias voltage. , A thick film resist pattern without excessive thermal alteration of the resist to cause image sticking to the lower layer.
Removal of scum and cleaning of the contact surface are effective
Solder ball bar after completion
Good electrical contact at the interface between the pump and the underlying metal
To be

The method of forming solder ball bumps according to claim 2 is the method of forming the solder ball <br/> Rubanpu containing solder deposition process for patterning the solder layer using a lift-off photoresist least ICP (I
nductively Coupled Plasm
a: high frequency inductively coupled plasma), TCP (Transf)
ormer Coupled Plasma), ECR
(Electron Cyclotron Reson
ance), helicon wave plasma source, etc., 1 × 10 ¹¹ cm
Using a plasma processing apparatus having a ^-3 1 × 10 ¹⁴ cm ^-3 under high density plasma source plasma density is obtained
The method for forming solder ball bumps according to claim 1, wherein a thick film resist pattern is provided without excessive thermal alteration of the resist to cause image sticking to a lower layer. Scum removal and contact
Surface cleaning can be effectively and stably achieved and finished.
Good at the interface between the solder ball bump and the underlying metal after polishing.
Good electrical contact is obtained .

The method of forming solder ball bumps according to claim 3 is the method of forming the solder ball <br/> Rubanpu containing solder deposition process for patterning the solder layer using a lift-off photoresist, at least the wafer Using a plasma processing apparatus having a temperature control mechanism in the mounting portion,
The maximum temperature reached on the wafer surface during processing is 50 ℃ to 100 ℃
The method for forming a solder ball bump according to claim 1, wherein the processing conditions are set as follows to perform a solder film pretreatment, wherein the resist is excessively heat-altered to cause seizure to a lower layer. Without thick film resist
Turn scum removal and contact surface cleaning
Can be effectively and stably realized, and solder balls after finishing can be
Good electrical contact at the interface between the bump and the underlying metal
Is obtained .

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described below with reference to FIGS.

The embodiment of Embodiment 1 present exemplary embodiment, in the solder ball bump formation process, the solder deposition process for patterning the solder <br/> deposited film using a lift-off photoresist, triode type The invention of the present application is applied by using the plasma processing apparatus 16 for the solder film pretreatment.
This will be described with reference to FIG. In this embodiment,
As shown in FIG. 1B, the wafer used as a sample is made of Cr, Cu, Au, which is called a BLM film 4, at a portion of the semiconductor substrate 1 on the Al electrode pad 2 where the surface protection 3 such as a polyimide film is opened. A barrier metal composed of a metal laminated film such as the above was formed, and further, a thick resist film 6 having an opening 5 of a predetermined size was formed so as to face the BLM film 4.

At this time, a so-called scum 6a such as a resist coating remains thinly on the bottom of the opening 5. Then, a triode type plasma processing apparatus as shown in FIG. 2 is prepared. The plasma processing apparatus 16 includes an anode plate 18 and a cathode plate (processing stage) 12 which are arranged to face each other in a plasma processing chamber 17 in an argon gas atmosphere.
A grid electrode 19 is provided between them, a plasma power source 20 is connected to the anode plate 18, and a substrate bias power source 21 is connected to the cathode plate 12 via a coupling capacitor.
A substrate (wafer) 13 to be processed is placed on the cathode plate (processing stage) 12.

The plasma processing apparatus 16 is characterized by having a plasma power source 20 and a substrate bias power source 21 independently. The processing stage 12 has a structure as shown in FIG. 2B, the temperature of which is adjusted by a coolant circulating inside the stage 12, and the surface of the stage is electrostatically attracted and He, A
Heat transfer with the wafer 13 is favorably performed by gas cooling such as r . In this plasma processing step, the substrate bias voltage is greatly reduced as compared with the case of using the conventional parallel plate type RF plasma (conventionally, approximately 500 V).

This is because the plasma generation and the substrate bias are controlled by independent high-frequency power supplies, so that the substrate bias voltage can be reduced without impairing the processing speed.

The substrate (wafer) 13 to be processed in the above-mentioned state
Was set in the triode type plasma processing apparatus 16, and as an example, the solder film pretreatment was performed under the following conditions. Ar Gas flow rate: 25 sccm Ar Gas pressure: 5 mTorr (0.67 Pa) Plasma source power: 700 W (2 MHz) RF substrate Bias voltage: 300 V (13.56 MHz) Treatment time: 100 seconds Target after this plasma treatment As shown in FIG. 1C, the scum 6a at the bottom of the resist opening 5 was removed from the processed substrate.
It has been previously confirmed by experiments that the maximum temperature reached on the wafer surface when processed under these conditions is approximately 70 ° C.

Thereafter, a solder vapor deposition film is formed on the entire surface of the substrate to be processed which has been subjected to the film formation pretreatment (see FIG. 1D),
After the patterning by the resist lift-off (see FIG. 1E), the solder was melted by heat treatment to finally form the solder ball bumps 15 as shown in FIG. 1F. By adopting the present invention, it becomes possible to precisely control the substrate bias voltage in the pre-treatment of the solder film formation when patterning the solder vapor deposition film by using the lift-off of the photoresist, and to give the resist an excessive thermal alteration to the base. The scum removal of the thick film resist pattern and the cleaning of the contact surface could be effectively realized without inducing the image sticking. As a result, good electrical contact can be obtained at the interface between the finished solder ball bump and the base metal, and the adhesion strength with the base is increased to improve the reliability of the product set after flip chip mounting. I was able to.

Second Embodiment In the second embodiment of the present invention, an ICP (Inductive) is used in a solder film formation process when a solder deposition film is patterned using lift-off of photoresist in a solder ball bump formation process. Co
The invention of the present application is applied by using a plasma processing apparatus 22 having an upper plasma) as a plasma generation source for film formation pretreatment, which will be described with reference to FIGS. 1 and 3A. The substrate to be processed used in the present embodiment is the same as that shown in FIG. 1B used in the first embodiment, and duplicated description will be omitted.

Here, the ICP used in this embodiment example
A schematic configuration example of the processing apparatus will be described with reference to FIG. This device is composed of an inductively coupled coil 2 wound around a side wall of a plasma processing chamber 17 made of a dielectric material such as quartz.
3, the power of the ICP power source (plasma power source) 20 is supplied to the plasma processing chamber 17, and high density plasma is generated therein. The substrate 13 to be processed is placed on the processing stage 12 to which the substrate bias power supply 21 is supplied, and is subjected to desired plasma processing. In the figure, details of the processing gas introduction hole, the vacuum exhaust system, the gate valve, the transfer system for the substrate to be processed and the like are omitted. The feature of this device is that the large-sized multi-turn inductive coupling coil enables plasma excitation with high power and can perform treatment with high-density plasma of 10 ¹² / cm ³ .

Further, the processing stage 12 is the same as in the first embodiment.
As shown in FIG. 2B, the temperature of the stage is controlled by the refrigerant circulating inside the stage, and the stage surface is electrostatically attracted and
The gas cooling ensures good heat transfer with the wafer. The substrate 13 to be processed shown in FIG.
Was set on the processing stage 12, and as an example, the solder film forming pretreatment was performed under the following conditions. Ar Gas flow rate: 25 sccm Ar Gas pressure: 1 mTorr (0.13 Pa) ICP power supply power: 1000 W (2 MHz) Substrate bias voltage: 200 V (13.56 MHz) Processing time: 50 seconds

In this embodiment, the substrate bias voltage is further reduced as compared with the above-mentioned embodiments. This is due to the use of a high-density plasma source and the effect of suppressing the scattering of incident ions because the condition can be set to a low pressure by this.
^This is the result of reducing the substrate bias voltage without impairing the processing speed due to ⁺ ion irradiation.

It has been previously confirmed by experiments that the maximum temperature reached on the wafer surface when processed under these conditions is approximately 60 ° C. As a result, the substrate bias voltage can be controlled more precisely in the pre-metal film formation process when patterning the solder deposition film by using the lift-off of the photoresist, and even the large-diameter wafer can be processed uniformly and quickly. Was able to establish a possible process.

Therefore, the scum removal of the thick film resist pattern and the cleaning of the contact surface are effectively realized without giving excessive thermal alteration to the resist to induce the image sticking to the underlayer, and thus the embodiment example is realized. As with No. 1, finally, solder ball bumps having good electrical contact with the underlying metal could be formed.

Third Embodiment The third embodiment does not use the photoresist lift-off in the solder ball bump formation process.
In the solder film forming process for patterning the deposited film, the TCP (Transformer Coupler)
The invention of the present application is applied by using a plasma processing apparatus 24 having a plasma generation source (d Plasma) as a plasma generation source, and this will be described with reference to FIGS. 1 to 2B. The substrate to be processed used in the present embodiment is the same as that shown in FIG. 1B used in the second embodiment, and duplicated description will be omitted.

Here, the TCP used in this embodiment
A schematic configuration example of the processing device will be described with reference to FIG. This device has the same basic configuration as the ICP processing device shown in FIG. 3A, and the same components are designated by the same reference numerals and the description thereof is omitted. The feature of this apparatus is that the top plate of the plasma processing chamber 20 is made of a dielectric material such as quartz,
A spiral TCP coil 25 is placed on the upper surface of the TCP
The power of the power supply (plasma power supply) 20 is supplied to the plasma processing chamber 1
This is the point to be introduced within 7. According to this device, a large TC
Due to the inductive coupling between the P coil 25 and the processing gas in the plasma processing chamber 17, high density plasma of the order of 10 ¹² / cm ³ can be generated.

Further, the processing stage 11 is temperature-controlled by a refrigerant circulating inside the stage as shown in FIG. 2B, as in the above-mentioned embodiment, and the stage surface is electrostatically adsorbed and cooled by He gas. Good heat transfer to and from the wafer is ensured. The substrate 12 to be processed shown in FIG. 1B was set on the processing stage 11, and as an example, the solder film forming pretreatment was performed under the following conditions. Ar Gas flow rate: 25 sccm Ar Gas pressure: 1 mTorr (0.13 Pa) TCP power supply power: 1000 W (2 MHz) Substrate bias voltage: 200 V (13.56 MHz) Processing time: 50 seconds

As a result, similar to the above-described embodiments, the substrate bias voltage can be precisely controlled in the metal film pretreatment when the solder deposition film is patterned by using the liftoff of the photoresist, and We were able to establish a process that allows uniform and rapid processing even for large diameter wafers. For this reason, the scum removal of the thick film resist pattern and the cleaning of the contact surface are effectively realized without giving excessive thermal alteration to the resist to induce the image sticking to the base, so that the final metal with the base metal is finally removed. It was possible to form solder ball bumps with good electrical contact.

Although the present invention has been described above based on the three types of embodiments, the present invention is not limited to these embodiments, and the sample structure, the process apparatus, the process conditions, etc. It is needless to say that the selection can be appropriately made without departing from the spirit of the invention. For example, as a high-density plasma source, ICP and T
Although an example using CP is shown, other than that, ECR, helicon wave plasma, or the like can be similarly used. By the way, if the solder film forming pretreatment of the present invention is carried out by a separate apparatus independent of film forming, the effect is greater as it is carried out immediately before film formation by vacuum vapor deposition. Furthermore, it is more effective to use an apparatus of the type in which the pre-deposition chamber is connected to the deposition chamber under high vacuum.

[0033]

By adopting the present invention, the scum removal of the thick film resist pattern and the cleaning of the contact surface can be effectively and stably realized without giving excessive thermal alteration to the resist to induce the image sticking to the base. As a result, good electrical contact can be obtained at the interface between the finished solder ball bump and the base metal, and the adhesion strength with the base is increased, improving the reliability of the product set after flip chip mounting. As a result, it is possible to establish a method for forming solder ball bumps that enables uniform and rapid processing even for large-diameter wafers.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a wafer according to a manufacturing process of a solder ball bump to which the present invention is applied, in which (a) a BLM film is patterned on an Al electrode pad,
(B) A state in which a thick film resist pattern for patterning the solder layer is formed, (c) Pretreatment is performed, and BL
With the scum on the M film removed, (d) the entire surface of the wafer
A state in which the solder layer is formed, (e) A state in which the unnecessary solder layer is removed by lift-off of the resist, (f)
Indicates a state in which the solder is melted by heat treatment and ball bumps are formed.

FIG. 2 shows a triode type plasma processing apparatus,
(A) Schematic sectional view, (b) Schematic sectional view of the substrate stage equipped with a temperature control mechanism.

3A and 3B show a plasma processing apparatus, wherein FIG. 3A is a schematic sectional view of a plasma processing apparatus equipped with an ICP, and FIG. 3B is a schematic sectional view of a plasma processing apparatus equipped with a TCP.

FIG. 4 is a schematic cross-sectional view of a wafer along a conventional solder ball bump manufacturing process, in which (a) a BLM film is patterned on an Al electrode pad, and (b) a thickness for patterning a solder layer. state film resist pattern is formed, (c) state the solder layer the entire surface of the wafer is formed, by a lift-off of the (d) the resist unnecessary solder
The state in which the solder layer is removed, (e) shows the state in which the solder is melted by the heat treatment and the ball bump is formed.

FIG. 5 is a schematic cross-sectional view showing a resistance heating type vacuum vapor deposition device.

[Explanation of reference numerals] 1 semiconductor substrate 2 Al electrode pad 3 surface protective film 4 BLM film 5 opening 6 photoresist film 6a scum 7 resistance heating type vacuum deposition apparatus 8 vacuum container 9 heater 10 deposition material 11 crucible 12 processing stage (cathode) Plate 13 substrate to be processed (wafer) 14 solder layer 15 solder ball bump 16 triode type plasma processing device 17 plasma processing chamber 18 anode plate 19 grid electrode 20 plasma power supply 21 substrate bias power supply 22 plasma processing device with ICP 23 inductive coupling Coil 24 Plasma processing device equipped with TCP 25 TCP coil

[Procedure 3]

[Document name to be amended] Drawing

[Correction target item name] Fig. 1

[Correction method] Change

[Correction contents]

FIG.

[Procedure amendment 4]

[Document name to be amended] Drawing

[Correction target item name] Fig. 4

[Correction method] Change

[Correction contents]

FIG. 4

Claims (3)

[Claims] 1. A solder ball bump forming method including a solder film forming step when patterning a solder layer using photoresist lift-off, wherein at least two high frequencies capable of independently controlling plasma generation and substrate bias voltage. A method for forming a solder ball bump, which comprises performing a film formation pretreatment using a plasma processing apparatus having a power supply. 2. A solder ball bump forming method including a solder film forming step when patterning a solder layer using photoresist lift-off, wherein at least ICP, TCP, ECR, helicon wave plasma source, etc., 1 × 10 ^{11 are used.} solder ball bumps according to claim 1, characterized in that by using a plasma processing apparatus having a cm ^-3 to 1 × 10 ¹⁴ cm ^-3 under high density plasma source plasma density can be obtained to form a film pretreatment Forming method. 3. A method of forming solder ball bumps, including a solder film forming step when patterning a solder layer using photoresist lift-off, using a plasma processing apparatus having a temperature control mechanism at least in a processing stage. 2. The method for forming solder ball bumps according to claim 1, wherein the film forming pretreatment is performed by setting processing conditions such that the highest temperature reached on the surface of the wafer is 50 [deg.] C. to 100 [deg.] C.