[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JPH0955571A - Electronic circuit board with high insulation section and its production - Google Patents

Electronic circuit board with high insulation section and its production

Info

Publication number
JPH0955571A
JPH0955571A JP22730995A JP22730995A JPH0955571A JP H0955571 A JPH0955571 A JP H0955571A JP 22730995 A JP22730995 A JP 22730995A JP 22730995 A JP22730995 A JP 22730995A JP H0955571 A JPH0955571 A JP H0955571A
Authority
JP
Japan
Prior art keywords
circuit board
electronic circuit
substrate
electronic
signal line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22730995A
Other languages
Japanese (ja)
Inventor
Minoru Niizaki
稔 新崎
Toshio Tamamura
俊雄 玉村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Japan Inc
Original Assignee
Hewlett Packard Japan Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Japan Inc filed Critical Hewlett Packard Japan Inc
Priority to JP22730995A priority Critical patent/JPH0955571A/en
Publication of JPH0955571A publication Critical patent/JPH0955571A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0256Electrical insulation details, e.g. around high voltage areas
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/142Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an electronic circuit board with high insulation section, and its production method, in which high insulation performance is realized at relatively low production cost and material cost while enhancing the resistance against secular change caused by adhesion of contaminants. SOLUTION: An electronic circuit board 510 is arranged in a hole 522 made in another electronic circuit board 512 and both boards are connected/supported through electronic devices 518, 520. The signal line 516 on the board 510 is a signal line formed on a common board.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、一般には微小電流用途
の電子回路製造技術に関し、より詳細には、電子回路基
板上で漏れ電流の影響を回避するために高絶縁化された
区画を備えた電子回路基板及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to electronic circuit manufacturing techniques for low current applications, and more particularly to providing highly insulated compartments on an electronic circuit board to avoid the effects of leakage currents. And an electronic circuit board and a manufacturing method thereof.

【0002】[0002]

【従来の技術】近年、電子回路の実装技術として、電子
回路基板上に電子部品を配置した後、噴流半田による自
動半田付け装置を利用することが、安価で信頼性の高い
半田付け方法として広く普及して来た。しかし、微小電
流を取り扱うなどの高絶縁を必要とする回路を電子回路
基板上に形成する際に、単に電子回路基板上に部品の接
続端子及び信号線路を形成しただけでは、他の接続端子
及び信号線路から基板の表面及び内部を通して流れ込む
漏れ電流により測定誤差や誤動作が問題となることが知
られている。そのため、従来は、電子回路基板上に漏れ
電流を防ぐ目的で高絶縁部を設ける際には、以下のよう
な方法が考案され、用いられてきた。
2. Description of the Related Art In recent years, as an electronic circuit mounting technique, it is widely used as an inexpensive and highly reliable soldering method to use an automatic soldering device by jet soldering after placing electronic components on an electronic circuit board. It has become popular. However, when forming a circuit that requires high insulation such as handling a minute current on an electronic circuit board, simply forming the connection terminals and signal lines of the components on the electronic circuit board does not lead to other connection terminals and signal lines. It is known that leakage current flowing from the signal line through the surface and the inside of the substrate causes measurement errors and malfunctions. Therefore, conventionally, the following method has been devised and used when the highly insulating portion is provided on the electronic circuit board for the purpose of preventing leakage current.

【0003】A:信号線路をガードで囲む方法 図1に信号線をガードで囲む構造の外観図を示す。図1
では、ガラスエポキシ系の基板18上に電子部品10及
び12が信号線路14で接続されている。ガード・パタ
ーン16はこの信号線路及び接続端子14を囲むように
実装され、基板表面を介し信号線にいたる経路での漏れ
電流及び誘電吸収によって流れる電流を防いでいる。ガ
ード16にはアクティブガードあるいはパッシブガード
が用いられる。
A: Method of Enclosing Signal Line with Guard FIG. 1 shows an external view of a structure in which a signal line is enclosed with a guard. FIG.
Then, the electronic components 10 and 12 are connected by the signal line 14 on the glass epoxy substrate 18. The guard pattern 16 is mounted so as to surround the signal line and the connection terminal 14, and prevents a leakage current and a current flowing due to dielectric absorption in a route from the surface of the substrate to the signal line. As the guard 16, an active guard or a passive guard is used.

【0004】この方法は、部品の実装密度が多少犠牲に
なるものの、従来の製造工程に変更を加えずに製作でき
る点から、作業コストを低く抑えることができる。しか
し、防ぐことのできる漏れ電流の経路は、基板の表面を
伝わるものに限られ、基板の内部を伝わるものは防ぐこ
とができない。また、経時変化で基板表面のガード部分
に汚れが付着すると、リーク(電流の漏れ)を起こしや
すくなる点も問題である。
Although this method sacrifices the mounting density of parts to some extent, it can be manufactured without changing the conventional manufacturing process, so that the working cost can be kept low. However, the path of leakage current that can be prevented is limited to the one that travels on the surface of the substrate, and the one that travels inside the substrate cannot be prevented. Further, if dirt adheres to the guard portion on the surface of the substrate due to aging, leakage (current leakage) is likely to occur, which is also a problem.

【0005】図2は図1のガード構造の改良型を示す、
基板内部を透明にした断面付き斜視図である。図2で
は、基板208の表面の信号線218とガード220と
同じ構造を基板裏面にも信号線230とガード226と
して設け、更に表と裏のガードパターンを一定の間隔の
スルーホール228で接続し、基板表面/裏面を伝わる
経路での漏れ電流や誘電吸収の影響を防ぐと共に、基板
内部を通る経路での漏れ電流や誘電吸収の影響もある程
度防ぐ構造となっている。なお、210、212、21
4、216は、電子部品の足を挿入するためのスルーホ
ールである。更に、スルーホール228は、図を判りや
すくするために一部のスルーホールを省略して図示して
いる。
FIG. 2 shows an improved version of the guard structure of FIG.
It is a perspective view with a section which made the inside of a substrate transparent. In FIG. 2, the same structure as the signal line 218 and the guard 220 on the front surface of the substrate 208 is provided on the rear surface of the substrate as the signal line 230 and the guard 226. Further, the front and back guard patterns are connected by through holes 228 at regular intervals. The structure is such that the influence of the leakage current and the dielectric absorption in the path transmitted on the front surface / the back surface of the substrate is prevented, and the influence of the leakage current and the dielectric absorption in the path passing through the inside of the substrate is prevented to some extent. Note that 210, 212, 21
Reference numerals 4, 216 are through holes for inserting feet of electronic components. Further, in the through holes 228, some of the through holes are omitted for the sake of clarity.

【0006】しかしながらこの構造では、スルーホール
の間を抜ける経路の漏れ電流や誘電吸収による影響を完
全に防ぐことはできない。また、表面を伝わる漏れ電流
も表面が汚れてくるとその汚れを伝わって漏れるので、
経時変化に弱いという欠点もある。
However, with this structure, it is not possible to completely prevent the influence of the leakage current and the dielectric absorption of the path passing through the through holes. Also, the leakage current that propagates on the surface also leaks when the surface becomes dirty, so it leaks.
It also has the drawback of being weak against changes over time.

【0007】B:テフロン及びセラミック基板を使用す
る方法 電子回路基板として絶縁性に優れたテフロン系及びセラ
ミック系の基材を用いる構造及び方法である。基板の材
料が異なる他は、製造工程は従来とほとんど同じで済む
ので、制作コストを低く抑え、高絶縁性能を実現できる
反面、材料費が非常に高くなる欠点がある。
B: Method of using Teflon and ceramic substrate This is a structure and method of using a Teflon-based or ceramic-based base material having an excellent insulating property as an electronic circuit board. Since the manufacturing process is almost the same as the conventional one except that the substrate material is different, the manufacturing cost can be kept low and high insulation performance can be realized, but the material cost is very high.

【0008】C:テフロンスタッド(手半田型テフロン
端子)を使用する方法 図3に手半田型テフロン端子(テフロンスタッド)を用
いた高絶縁線路の構造を示す。図3(1)は側面図を示
し、図3(2)は同構造の平面図を示す。図3に示され
るように、ガラスエポキシ系の基板314の穴にテフロ
ンスタッド310及び312を挿入し、そのテフロンス
タッド310及び312の接続端子に複数の電子部品を
手作業で半田付けする(320、322)構造及び方法
である。絶縁性の高いテフロンを端子に用いることで、
基板上からの漏れ電流を防ぐことができるが、テフロン
スタッドの材料費が高いことと、テフロンスタッドの挿
入及び半田付けが手作業なので、作業コストが高く付く
欠点がある。
C: Method of using Teflon stud (hand-solder type Teflon terminal) FIG. 3 shows a structure of a highly insulated line using the hand-solder type Teflon terminal (Teflon stud). FIG. 3 (1) shows a side view, and FIG. 3 (2) shows a plan view of the same structure. As shown in FIG. 3, Teflon studs 310 and 312 are inserted into the holes of the glass epoxy substrate 314, and a plurality of electronic components are manually soldered to the connection terminals of the Teflon studs 310 and 312 (320, 322) Structure and method. By using Teflon with high insulation for the terminals,
Although leakage current from the board can be prevented, there are disadvantages that the material cost of the Teflon stud is high, and the Teflon stud is manually inserted and soldered, so that the operation cost is high.

【0009】D:クローバリーフ(自動半田型テフロン
端子)を使用する方法 図4に自動半田型テフロン端子(クローバリーフ)を用
いた高絶縁線路の構造を示す。図4(1)は側面図を示
し、図4(2)は同構造の平面図を示す。図4に示され
るように、ガラスエポキシ系の基板314の穴にクロー
バリーフ410及び412を挿入し、そのクローバリー
フ410及び412内のスルーホールに電子部品32
4、326、328の足を配置し、自動半田付け装置を
使ってスルーホールを半田付けする(418、420)
構造及び方法である。図3のテフロンスタッドによる構
造と比較すると、自動半田付け装置が使えるため作業コ
ストを低く抑えることができ、材料費もクロバリーフの
方がテフロンスタッドより安くできる利点があるが、前
述の方法Aよりもコスト高となり、部品端子の接続点と
基板との沿面距離が短いため、リークしやすく、汚れに
弱いという欠点がある。
D: Method of Using Clover Leaf (Automatic Solder Teflon Terminal) FIG. 4 shows the structure of a highly insulated line using the automatic solder Teflon terminal (crowbar leaf). 4 (1) shows a side view and FIG. 4 (2) shows a plan view of the same structure. As shown in FIG. 4, the clover leafs 410 and 412 are inserted into the holes of the glass epoxy substrate 314, and the electronic components 32 are inserted into the through holes in the clover leaves 410 and 412.
Place 4, 326, 328 feet and solder through holes using an automated soldering machine (418, 420)
Structure and method. Compared with the structure using Teflon studs in Fig. 3, since automatic soldering equipment can be used, the work cost can be kept low, and the material cost of Cloverleaf is cheaper than Teflon studs, but it is better than Method A described above. Since the cost is high and the creepage distance between the connection point of the component terminal and the substrate is short, there are drawbacks that it easily leaks and is vulnerable to dirt.

【0010】また、テフロンスタッド及びクローバリー
フを用いて数個以上の電子部品を1つの端子に接続する
場合には、構造上、数個をひとつのテフロン端子にはん
だ付けすることが困難なため、いくつかのテフロン端子
に分散して半田付けした回路を形成しなければならな
い。この場合、接続に必要なテフロン端子の基板上に占
める面積が方法Aで接続するのに比べて著しく大きくな
る、という欠点も問題となる。
In addition, when several or more electronic components are connected to one terminal by using a Teflon stud and a clover leaf, it is difficult to solder several electronic components to one Teflon terminal because of the structure. Circuits must be distributed and soldered to several Teflon terminals. In this case, there is also a problem that the area of the Teflon terminal required for the connection on the substrate is significantly larger than that of the method A.

【0011】以上のように、電子回路基板に高絶縁の信
号線路を設けるために、様々な方法が考案されてきた
が、安価に高絶縁を実現でき、汚れの付着によるリーク
などの経時変化に強い構造及びその製造方法がなかっ
た。
As described above, various methods have been devised in order to provide a highly insulated signal line on an electronic circuit board. However, it is possible to realize highly insulated inexpensively and to prevent a change over time such as leakage due to adhesion of dirt. There was no strong structure and its manufacturing method.

【0012】[0012]

【発明が解決しようとする課題】本発明の目的は、製造
コストと材料費を比較的低く抑えながら、高い絶縁性能
を兼ね備えた高絶縁区画付き電子回路基板及びその製造
方法を提供することにある。
SUMMARY OF THE INVENTION It is an object of the present invention to provide an electronic circuit board with a highly insulating partition and a method of manufacturing the same, which has a high insulation performance while keeping the manufacturing cost and the material cost relatively low. .

【0013】本発明の別の目的は、汚れの付着による経
時変化に強い高絶縁区画付き電子回路基盤及びその製造
方法を提供することである。
Another object of the present invention is to provide an electronic circuit board with a highly insulating section and a method for manufacturing the same, which is resistant to aging due to adhesion of dirt.

【0014】[0014]

【課題を解決するための手段】本発明による高絶縁区画
付き電子回路基板は、親基板と高絶縁区画用の子基板を
電子部品でのみ接続/支持される高絶縁基板付き電子回
路基板である。ここで、高絶縁基板は、親基板に周囲を
囲まれた穴の中に配置されてもよいし、周囲の一部が親
基板と対向しないように配置されてもよい。
An electronic circuit board with a high insulation partition according to the present invention is an electronic circuit board with a high insulation board in which a parent board and a child board for the high insulation partition are connected / supported only by electronic components. . Here, the high-insulation substrate may be arranged in a hole surrounded by the parent substrate, or may be arranged so that a part of the periphery does not face the parent substrate.

【0015】これにより、高絶縁基板は、親基板とは基
材やいかなる余分な部品からもつながっていない上、親
基板との間には空気しかないので、絶縁性能を著しく高
くすることができる。唯一親基板と接続されているの
は、高絶縁基板に接続される電子部品だけであるが、元
来、微小電流用途に使われる電子部品は、その本体にリ
ークしにくい特性の素材を用いているため、親基板から
の漏れ電流を著しく防ぐ効果が大きい。また、元来この
ような電子部品は汚れが付きにくい素材が使われている
ため、経時変化に対しても絶縁度の劣化は低い。
As a result, the high-insulation board is not connected to the parent board from the base material or any extra parts, and since there is only air between the high-insulation board and the parent board, the insulating performance can be remarkably enhanced. . The only components that are connected to the parent board are the electronic components that are connected to the high-insulation substrate, but originally, electronic components used for low-current applications use materials that have characteristics that prevent them from leaking into the body. Therefore, the effect of remarkably preventing the leakage current from the parent board is great. In addition, since such an electronic component is originally made of a material that does not easily get dirty, deterioration of the insulation degree is low even with the lapse of time.

【0016】本発明による高絶縁区画付き電子回路基板
の製造方法の一例は、まず親基板の高絶縁区画を設ける
部分の周囲に1箇所以上の部材を残してスリットを入
れ、次に部品を配置し、自動半田付け装置を利用して半
田付けをし、最後にスリットの間に残された部材を切断
する。
An example of a method for manufacturing an electronic circuit board with a high insulation section according to the present invention is to first form a slit around the portion of the main board where the high insulation section is provided, leaving one or more members, and then arrange the parts. Then, soldering is performed using the automatic soldering device, and finally the member left between the slits is cut.

【0017】上記の製造方法において半田付けを行う際
に、親基板と高絶縁区画の間のスリットに、スルーホー
ルメッキをすると、更に両基板間の絶縁効果を高めるこ
とができる。
When soldering is performed in the above manufacturing method, through-hole plating is performed in the slit between the parent board and the high-insulation section, so that the insulating effect between both boards can be further enhanced.

【0018】[0018]

【実施例】図5に本発明による基本的な実施例を示す。
図5(1)に本発明による実施例の側面図を、図5
(2)に同実施例の平面図を示す。
FIG. 5 shows a basic embodiment according to the present invention.
FIG. 5 (1) is a side view of the embodiment according to the present invention.
A plan view of the embodiment is shown in (2).

【0019】図5は、電子部品518、520を接続す
る信号線路516を高絶縁に保ちたい場合に、本発明を
用いた実施例である。本発明に用いることのできる電子
部品は、抵抗、コンデンサ、リレー、ダイオード、トラ
ンジスタ、FET、IC等の、複数の接続リードを持
ち、高抵抗で小容量の電子部品であれば、用いることが
できる。
FIG. 5 shows an embodiment using the present invention when it is desired to keep the signal line 516 connecting the electronic components 518 and 520 highly insulated. The electronic component that can be used in the present invention can be used as long as it has a plurality of connection leads such as a resistor, a capacitor, a relay, a diode, a transistor, a FET, and an IC, and has a high resistance and a small capacity. .

【0020】図5(2)に示されるように電子回路基板
512に設けられた穴522の中に、別の電子回路基板
510を配し、両基板を電子部品518及び520で接
続/支持する。基板510上の信号線516は通常の基
板上に形成される信号線である。
As shown in FIG. 5B, another electronic circuit board 510 is arranged in the hole 522 provided in the electronic circuit board 512, and both boards are connected / supported by the electronic components 518 and 520. . The signal line 516 on the substrate 510 is a signal line formed on a normal substrate.

【0021】このような構造にすると、信号線516は
周囲が穴522中の空気に絶縁された基板510上にあ
るため、親基板512からの漏れ電流をほとんど防ぐこ
とができる。当業者には理解できるように、空気は真空
に次いで最も高い絶縁性能を有するからである。また、
電子部品518及び520の外周は、親基板512から
漏れ電流の流れ込む経路となるが、一般的に微小電流用
途の電子部品は、それ自体の端子間のリークを起こしに
くく、汚れなどの経時変化にも強い構造/素材を備えて
いるため、電子部品を伝わる漏れ電流は著しく少ない。
ゆえに、基板510は親基板512と構造的に同等であ
っても、高絶縁区画/高絶縁基板として機能する。
With such a structure, since the signal line 516 is on the substrate 510 whose periphery is insulated by the air in the hole 522, the leakage current from the parent substrate 512 can be almost prevented. As one of ordinary skill in the art will appreciate, air has the highest insulation performance next to vacuum. Also,
The outer peripheries of the electronic components 518 and 520 serve as a path for leakage current to flow from the parent board 512, but in general, electronic components for microcurrent use are unlikely to cause leakage between their own terminals and are resistant to changes over time such as dirt. Since it has a strong structure / material, the leakage current transmitted through electronic parts is extremely small.
Therefore, even though the substrate 510 is structurally equivalent to the parent substrate 512, it functions as a high insulation section / high insulation substrate.

【0022】図5に示される実施例の製造方法を図6を
用いて詳細に述べる。図6は電子部品を実装する前の図
5の電子回路基板512に相当する基板552の平面図
である。基板552には、切り離すと基板510となる
領域550と、領域550の周囲にめぐらされたスリッ
ト532及び534と、基板552と領域550を支持
するつなぎ部分540及び542がある。領域550内
には、電子部品間をつなぐ信号線パターン554と、こ
れに電子部品の足を挿入する穴536及び538があ
る。また、基板552には、電子部品の領域550に挿
入されるのとは別の側の足を挿入する穴544及び54
6と、それぞれの穴から信号を導く信号線パターン54
8及び549が設けられている。
The manufacturing method of the embodiment shown in FIG. 5 will be described in detail with reference to FIG. FIG. 6 is a plan view of a board 552 corresponding to the electronic circuit board 512 of FIG. 5 before mounting electronic components. The substrate 552 has a region 550 which becomes the substrate 510 when separated, slits 532 and 534 which are formed around the region 550, and connecting portions 540 and 542 which support the substrate 552 and the region 550. In the area 550, there are signal line patterns 554 connecting the electronic components, and holes 536 and 538 for inserting legs of the electronic components into the signal line patterns 554. In addition, holes 544 and 54 are formed in the board 552 for inserting the feet on the side different from the side inserted in the area 550 of the electronic component.
6 and a signal line pattern 54 for guiding a signal from each hole
8 and 549 are provided.

【0023】従来の構造及び方法と本発明による構造及
び方法との、製造コスト、材料費、絶縁性能の関係を表
1に示す。
Table 1 shows the relationship between the manufacturing cost, the material cost and the insulation performance between the conventional structure and method and the structure and method according to the present invention.

【0024】[0024]

【表1】 [Table 1]

【0025】図5の実施例を製造する好適な方法とし
て、(1)まず、基板552の電子部品挿入用の穴53
6、538、544、546に電子部品518及び52
0を挿入し、(2)次に、電子部品を挿入したままの基
板552を自動半田付け装置等を用いて半田付けし、領
域550を電子部品によって支持させ、(3)最後に、
ニッパーなどで、スリットに残されたつなぎ部分540
及び542を切断して、図5に示される高絶縁区画付き
電子回路基板を作る、という方法が用いられる。
As a preferred method of manufacturing the embodiment shown in FIG. 5, (1) First, a hole 53 for inserting an electronic component in a substrate 552
6, 538, 544, and 546 have electronic components 518 and 52.
0, (2) Next, the board 552 in which the electronic component is still inserted is soldered by using an automatic soldering device or the like, and the region 550 is supported by the electronic component. (3) Finally,
The connection part 540 left in the slit with nippers etc.
And 542 are cut to make the electronic circuit board with high insulation compartments shown in FIG.

【0026】しかし、当業者はこれ以外の方法によって
も図5に示される基板を製造することができるであろ
う。
However, those skilled in the art will be able to manufacture the substrate shown in FIG. 5 by other methods.

【0027】図5では、高絶縁基板510には2つの電
子部品しか接続されず、回路も信号線516だけの場合
を例示したが、本発明はこれに限定されるものではな
い。高絶縁基板510上には、更に多くの回路及び電子
部品を載せることができ、基板510と512の接続/
支持に使われる電子部品の数を更に多くすることもでき
るし、基板510上に全端子が接続される部品があって
も構わない。多くの部品/回路を高絶縁区画510に載
せれば載せるほど、テフロンスタッドやクローバリーフ
を用いた実装よりも、基板上の端子の面積が小さいの
で、実装密度の点で有利になる。
Although FIG. 5 illustrates the case where only two electronic components are connected to the high insulation substrate 510 and the circuit is only the signal line 516, the present invention is not limited to this. More circuits and electronic components can be mounted on the high-insulation substrate 510, and the connection / connection between the substrates 510 and 512 can be performed.
It is possible to further increase the number of electronic components used for supporting, and there may be a component on the substrate 510 to which all terminals are connected. The more components / circuits mounted on the high-insulation section 510, the smaller the area of the terminals on the substrate, and the more advantageous the mounting density, as compared with the mounting using the Teflon stud or the clover leaf.

【0028】図7に、図5の実施例の改良型の構造を示
す。図7(1)は平面図を示し、図7(2)は同構造の
側面図を示す。図7は図6のスリット532及び534
にスルーホールメッキを施し、図5の基板510と51
2の間の部分にガード610ないし616を設けたもの
である。ガード610ないし616をアクティブガード
あるいはパッシブガードとして構成することにより、図
5の実施例より、穴522を介してのリークに強くな
る。
FIG. 7 shows an improved structure of the embodiment of FIG. FIG. 7 (1) shows a plan view and FIG. 7 (2) shows a side view of the structure. FIG. 7 shows the slits 532 and 534 of FIG.
Through-hole plating is applied to the substrates 510 and 51 of FIG.
Guards 610 to 616 are provided between the two. By configuring the guards 610 to 616 as active guards or passive guards, it is more resistant to leaks through the holes 522 than the embodiment of FIG.

【0029】図7のガード610と614、或はガード
612と616がつながっていないのは、製造時にスリ
ットにスルーホールメッキをした後につなぎ部分を切断
する製造方法に起因している。
The fact that the guards 610 and 614 or the guards 612 and 616 in FIG. 7 are not connected is due to the manufacturing method in which the connecting portion is cut after the slit is through-hole plated at the time of manufacturing.

【0030】すなわち、図7の実施例を製造する好適な
方法としては、(1)まず、基板512の電子部品挿入
用の穴に電子部品518及び520を挿入し、(2)次
に、電子部品を挿入したままの基板512を自動半田付
け装置等を用いて半田付けし、その際、スリット部分の
内側にもスルーホールメッキを施す。(3)最後に、ニ
ッパーなどで、スリットに残されたつなぎ部分を切断し
て、図7に示される高絶縁区画付き電子回路基板を作
る、という方法を用いる。
That is, as a preferred method for manufacturing the embodiment of FIG. 7, (1) first, the electronic components 518 and 520 are inserted into the holes for inserting the electronic components of the substrate 512, and (2) next, the electronic components are inserted. The substrate 512 with the components still inserted is soldered using an automatic soldering device or the like, and at this time, through hole plating is also applied to the inside of the slit portion. (3) Finally, a method is used in which the connecting portion left in the slit is cut with a nipper or the like to produce the electronic circuit board with the high insulation section shown in FIG. 7.

【0031】なお、ガード610ないし616を設ける
方法は、スルーホールメッキに限定されることはなく、
当業者には明らかなように、様々な方法及び材料を用い
て実施することができるし、また、同一周囲上にありな
がら分割されているガードも、当業者には明らかなよう
に、分割されないように、様々な方法及び材料を用いて
実施することができる。
The method of providing the guards 610 to 616 is not limited to through hole plating,
It will be apparent to those skilled in the art that various methods and materials can be used and that guards that are co-split but are not split, as will be apparent to those skilled in the art. As such, various methods and materials can be used.

【0032】別の実施例の側面図を図8に示す。図8で
は、高絶縁基板810が、親基板812と同一平面に無
く、電子部品814及び816によってのみ接続/支持
される。パターン818は高絶縁基板810上の信号線
である。高絶縁基板810は、親基板812との間に接
続された電子部品814及び816によってのみ支持さ
れ、高絶縁基板の周囲には空気しかないため、同様の効
果が期待される。
A side view of another embodiment is shown in FIG. In FIG. 8, the highly insulating substrate 810 is not coplanar with the parent substrate 812 and is only connected / supported by the electronic components 814 and 816. The pattern 818 is a signal line on the high insulation substrate 810. The high-insulation substrate 810 is supported only by the electronic components 814 and 816 connected between it and the parent substrate 812, and since there is only air around the high-insulation substrate, the same effect is expected.

【0033】更に、別の実施例の平面図を図9に示す。
図9では、高絶縁基板910が、親基板912と一辺だ
けが対向するように配置されている。高絶縁基板910
は、親基板912との間に接続された電子部品914な
いし918によってのみ支持される。このほかに、高絶
縁基板と親基板が対向する辺が、2辺の時と3辺の時も
電子部品によってのみ支持させることで、同様に実施す
ることができる。
Further, a plan view of another embodiment is shown in FIG.
In FIG. 9, the high-insulation substrate 910 is arranged so that only one side faces the parent substrate 912. Highly insulating substrate 910
Are supported only by the electronic components 914 to 918 connected to the parent board 912. In addition to this, even when the side where the high-insulation substrate and the parent substrate face each other has two sides and three sides, the same operation can be performed by supporting only the electronic component.

【0034】以上に、本発明の実施例を示したが、例示
の様式、配置、その他を限定するものではなく、必要に
応じて本発明の要旨を逸脱することなく構成の変形も許
容される。
Although the embodiments of the present invention have been described above, the exemplary forms, arrangements, and the like are not limited, and modifications of the configurations are allowed as necessary without departing from the gist of the present invention. .

【0035】[0035]

【発明の効果】以上のように、本発明を用いると、材料
費と作業コストの上昇を抑えながらも、高絶縁性能を備
えた高絶縁区画付き電子回路基板及びその製造方法を提
供することができる。また、絶縁部分の沿面距離を十分
とることができるので、汚れ付着による絶縁劣化に強い
(信頼性の高い)高絶縁区画付き電子回路基板及びその
製造方法を提供することができる。
As described above, according to the present invention, it is possible to provide an electronic circuit board with a high insulation section having a high insulation performance and a manufacturing method thereof while suppressing an increase in material cost and working cost. it can. Further, since the creepage distance of the insulating portion can be set sufficiently, it is possible to provide an electronic circuit board with a highly insulating section which is resistant to insulation deterioration due to adhesion of dirt (high reliability) and a method for manufacturing the same.

【図面の簡単な説明】[Brief description of drawings]

【図1】従来技術による、信号線をガードで囲む構造の
外観図。
FIG. 1 is an external view of a structure in which a signal line is surrounded by a guard according to a conventional technique.

【図2】図1の構造の改良型を示す、基板内部を透明に
した断面付き斜視図。
FIG. 2 is a perspective view with a cross section in which the inside of the substrate is transparent, showing a modified version of the structure of FIG.

【図3】手半田型テフロン端子(テフロンスタッド)を
用いた高絶縁線路の構造を示す図。(1)は同構造の側
面図で、(2)は平面図を示す。
FIG. 3 is a view showing a structure of a highly insulated line using a hand-soldered Teflon terminal (Teflon stud). (1) is a side view of the same structure, and (2) is a plan view.

【図4】自動半田型テフロン端子(クローバリーフ)を
用いた高絶縁線路の構造を示す図。(1)は同構造の側
面図で、(2)は平面図を示す。
FIG. 4 is a diagram showing a structure of a highly insulated line using an automatic soldering type Teflon terminal (crowbar leaf). (1) is a side view of the same structure, and (2) is a plan view.

【図5】本発明による、実施例の構造を示す図。(1)
は同構造の側面図で、(2)は平面図を示す。
FIG. 5 shows a structure of an embodiment according to the present invention. (1)
Is a side view of the same structure, and (2) is a plan view.

【図6】電子部品を実装する前の図5の電子回路基板5
12に相当する基板552の平面図。
FIG. 6 is an electronic circuit board 5 of FIG. 5 before mounting electronic components.
12 is a plan view of a substrate 552 corresponding to 12. FIG.

【図7】図5の実施例の改良型の構造を示す図。(1)
は同構造の側面図で、(2)は平面図を示す。
7 is a diagram showing an improved structure of the embodiment of FIG. (1)
Is a side view of the same structure, and (2) is a plan view.

【図8】本発明の別の実施例の図。FIG. 8 is a diagram of another embodiment of the present invention.

【図9】本発明の別の実施例の図。FIG. 9 is a diagram of another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

510:高絶縁基板 512:親基板 516:信号線路 518、520:電子部品 522:穴 532、534:スリット 536、538:部品挿入用穴 540、542:つなぎ部分 544、546:部品挿入用穴 548、549:信号線パターン 550:領域 552:基板 554:信号線パターン 610、612、616、614:ガード 510: Highly insulating substrate 512: Parent substrate 516: Signal line 518, 520: Electronic component 522: Hole 532, 534: Slit 536, 538: Component insertion hole 540, 542: Connection part 544, 546: Component insertion hole 548 549: Signal line pattern 550: Area 552: Substrate 554: Signal line pattern 610, 612, 616, 614: Guard

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】第1の電子回路基板と、第2の電子回路基
板と、複数の電子部品を有し、 前記第1と第2の電子回路基板は前記電子部品によって
のみ接続されることを特徴とする高絶縁区画付き電子回
路基板。
1. A first electronic circuit board, a second electronic circuit board, and a plurality of electronic components, wherein the first and second electronic circuit boards are connected only by the electronic components. A characteristic electronic circuit board with highly insulating compartments.
【請求項2】前記第2の電子回路基板は前記第1の電子
回路基板と同じ平面上にあることを特徴とする請求項1
に記載の電子回路基板。
2. The second electronic circuit board is on the same plane as the first electronic circuit board.
The electronic circuit board according to.
【請求項3】前記第2の電子回路基板は前記第1の電子
回路基板内の穴の中に配置されることを特徴とする請求
項1に記載の電子回路基板。
3. The electronic circuit board according to claim 1, wherein the second electronic circuit board is arranged in a hole in the first electronic circuit board.
【請求項4】前記第2の電子回路基板の外周の一部にガ
ードを設けたことを特徴とする請求項1ないし3に記載
の電子回路基板。
4. The electronic circuit board according to claim 1, wherein a guard is provided on a part of an outer periphery of the second electronic circuit board.
【請求項5】次の各ステップを有することを特徴とす
る、高絶縁区画付き電子回路基板製造方法。 (a)第1の電子回路基板上に、少なくとも1つの微小
接続部を残したスリットを周囲に備えた区画を設けるス
テップ、(b)前記区画の内外にまたがる電子部品を配
置し、前記電子部品を半田付けするステップ、(c)前
記区画の周囲に残された微小接続部を切断するステッ
プ。
5. A method for manufacturing an electronic circuit board with a high insulation section, which comprises the following steps. (A) a step of providing, on a first electronic circuit board, a section having a slit around which at least one minute connection portion is left, (b) arranging an electronic part that extends inside and outside the section, and Soldering, and (c) cutting the minute connection portion left around the compartment.
【請求項6】前記ステップ(b)において、前記半田付
けの際に、前記区画の周囲にガードを設けたことを特徴
とする請求項5に記載の製造方法。
6. The manufacturing method according to claim 5, wherein in the step (b), a guard is provided around the partition during the soldering.
JP22730995A 1995-08-11 1995-08-11 Electronic circuit board with high insulation section and its production Pending JPH0955571A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22730995A JPH0955571A (en) 1995-08-11 1995-08-11 Electronic circuit board with high insulation section and its production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22730995A JPH0955571A (en) 1995-08-11 1995-08-11 Electronic circuit board with high insulation section and its production

Publications (1)

Publication Number Publication Date
JPH0955571A true JPH0955571A (en) 1997-02-25

Family

ID=16858793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22730995A Pending JPH0955571A (en) 1995-08-11 1995-08-11 Electronic circuit board with high insulation section and its production

Country Status (1)

Country Link
JP (1) JPH0955571A (en)

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013155279A1 (en) 2012-04-13 2013-10-17 Histosonics, Inc. Systems and methods for obtaining large creepage isolation on printed circuit boards
CN104244571A (en) * 2013-06-19 2014-12-24 基思利仪器公司 Guarded printed circuit board islands
US9526923B2 (en) 2009-08-17 2016-12-27 Histosonics, Inc. Disposable acoustic coupling medium container
US9636133B2 (en) 2012-04-30 2017-05-02 The Regents Of The University Of Michigan Method of manufacturing an ultrasound system
US9642634B2 (en) 2005-09-22 2017-05-09 The Regents Of The University Of Michigan Pulsed cavitational ultrasound therapy
US9901753B2 (en) 2009-08-26 2018-02-27 The Regents Of The University Of Michigan Ultrasound lithotripsy and histotripsy for using controlled bubble cloud cavitation in fractionating urinary stones
US9943708B2 (en) 2009-08-26 2018-04-17 Histosonics, Inc. Automated control of micromanipulator arm for histotripsy prostate therapy while imaging via ultrasound transducers in real time
US10071266B2 (en) 2011-08-10 2018-09-11 The Regents Of The University Of Michigan Lesion generation through bone using histotripsy therapy without aberration correction
US10219815B2 (en) 2005-09-22 2019-03-05 The Regents Of The University Of Michigan Histotripsy for thrombolysis
US10293187B2 (en) 2013-07-03 2019-05-21 Histosonics, Inc. Histotripsy excitation sequences optimized for bubble cloud formation using shock scattering
US10780298B2 (en) 2013-08-22 2020-09-22 The Regents Of The University Of Michigan Histotripsy using very short monopolar ultrasound pulses
US11058399B2 (en) 2012-10-05 2021-07-13 The Regents Of The University Of Michigan Bubble-induced color doppler feedback during histotripsy
US11135454B2 (en) 2015-06-24 2021-10-05 The Regents Of The University Of Michigan Histotripsy therapy systems and methods for the treatment of brain tissue
US11432900B2 (en) 2013-07-03 2022-09-06 Histosonics, Inc. Articulating arm limiter for cavitational ultrasound therapy system
US11648424B2 (en) 2018-11-28 2023-05-16 Histosonics Inc. Histotripsy systems and methods
US11813485B2 (en) 2020-01-28 2023-11-14 The Regents Of The University Of Michigan Systems and methods for histotripsy immunosensitization

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11701134B2 (en) 2005-09-22 2023-07-18 The Regents Of The University Of Michigan Histotripsy for thrombolysis
US11364042B2 (en) 2005-09-22 2022-06-21 The Regents Of The University Of Michigan Histotripsy for thrombolysis
US10219815B2 (en) 2005-09-22 2019-03-05 The Regents Of The University Of Michigan Histotripsy for thrombolysis
US9642634B2 (en) 2005-09-22 2017-05-09 The Regents Of The University Of Michigan Pulsed cavitational ultrasound therapy
US9526923B2 (en) 2009-08-17 2016-12-27 Histosonics, Inc. Disposable acoustic coupling medium container
US9943708B2 (en) 2009-08-26 2018-04-17 Histosonics, Inc. Automated control of micromanipulator arm for histotripsy prostate therapy while imaging via ultrasound transducers in real time
US9901753B2 (en) 2009-08-26 2018-02-27 The Regents Of The University Of Michigan Ultrasound lithotripsy and histotripsy for using controlled bubble cloud cavitation in fractionating urinary stones
US10071266B2 (en) 2011-08-10 2018-09-11 The Regents Of The University Of Michigan Lesion generation through bone using histotripsy therapy without aberration correction
WO2013155279A1 (en) 2012-04-13 2013-10-17 Histosonics, Inc. Systems and methods for obtaining large creepage isolation on printed circuit boards
EP2836871A4 (en) * 2012-04-13 2015-12-23 Histosonics Inc Systems and methods for obtaining large creepage isolation on printed circuit boards
AU2013245840B2 (en) * 2012-04-13 2017-01-05 Histosonics, Inc. Systems and methods for obtaining large creepage isolation on printed circuit boards
US9636133B2 (en) 2012-04-30 2017-05-02 The Regents Of The University Of Michigan Method of manufacturing an ultrasound system
US11058399B2 (en) 2012-10-05 2021-07-13 The Regents Of The University Of Michigan Bubble-induced color doppler feedback during histotripsy
TWI608764B (en) * 2013-06-19 2017-12-11 吉時利儀器公司 Precision electrical measurement device and method for providing on a printed circuit board(pcb) a component connection area of the pcb having low dielectric absorption
JP2015005751A (en) * 2013-06-19 2015-01-08 ケースレー・インスツルメンツ・インコーポレイテッドKeithley Instruments,Inc. Printed-circuit board island and installation method of the same
US9326369B2 (en) 2013-06-19 2016-04-26 Keithley Instruments, Inc. Guarded printed circuit board islands
CN104244571A (en) * 2013-06-19 2014-12-24 基思利仪器公司 Guarded printed circuit board islands
EP2816877A1 (en) * 2013-06-19 2014-12-24 Keithley Instruments, Inc. Guarded printed circuit board islands
US11432900B2 (en) 2013-07-03 2022-09-06 Histosonics, Inc. Articulating arm limiter for cavitational ultrasound therapy system
US10293187B2 (en) 2013-07-03 2019-05-21 Histosonics, Inc. Histotripsy excitation sequences optimized for bubble cloud formation using shock scattering
US10780298B2 (en) 2013-08-22 2020-09-22 The Regents Of The University Of Michigan Histotripsy using very short monopolar ultrasound pulses
US11819712B2 (en) 2013-08-22 2023-11-21 The Regents Of The University Of Michigan Histotripsy using very short ultrasound pulses
US11135454B2 (en) 2015-06-24 2021-10-05 The Regents Of The University Of Michigan Histotripsy therapy systems and methods for the treatment of brain tissue
US11648424B2 (en) 2018-11-28 2023-05-16 Histosonics Inc. Histotripsy systems and methods
US11813484B2 (en) 2018-11-28 2023-11-14 Histosonics, Inc. Histotripsy systems and methods
US11980778B2 (en) 2018-11-28 2024-05-14 Histosonics, Inc. Histotripsy systems and methods
US11813485B2 (en) 2020-01-28 2023-11-14 The Regents Of The University Of Michigan Systems and methods for histotripsy immunosensitization

Similar Documents

Publication Publication Date Title
JPH0955571A (en) Electronic circuit board with high insulation section and its production
JP3253765B2 (en) Semiconductor device
US8591257B2 (en) Electrical connector having impedance matched intermediate connection points
US4339784A (en) Solder draw pad
US4004196A (en) Multi-layer panel board with single-in-line package for high speed switching logic
JPH09289052A (en) Packaged structure of module
JP2001230555A (en) Case for electronic unit
JPH02134890A (en) Circuit element mounting board
JPS627109A (en) Manufacture of network electronic component
JPH09307202A (en) Hybrid integrated circuit
JPH08321580A (en) Structure and manufacture fo hybrid integrated circuit device
JPH07122831A (en) Circuit board and manufacture thereof
JP2755255B2 (en) Semiconductor mounting substrate
JPH08298367A (en) Mounting method of capacitor with lead terminals and mounting structure
JPH10242597A (en) Printed wiring board
JPH0517901Y2 (en)
JPH03225890A (en) Printed wiring board
JPS63157076A (en) Chip test post
JPH0287694A (en) Structure and method for packaging of electronic part
JPH07326705A (en) Electronic parts and packaging method using the same
JPH0548237A (en) Circuit substrate
JP2004087748A (en) Printed distribution board
JPH0227797A (en) Shielding case
JPH0548239A (en) Forming method of circuit substrate
JPH09199669A (en) Printed wiring board module

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20040217

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050201

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050214

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050512

A02 Decision of refusal

Effective date: 20050629

Free format text: JAPANESE INTERMEDIATE CODE: A02