JPH0937250A - Image data decoder and image data decoding method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a decoded image very close to an original image by reducing a quantization error in the case of decoding compressed image data obtained by coding in the unit of blocks. SOLUTION: Each of noticed picture elements in compressed image data S2 is classified by using intra-block picture element data Q1 around the noticed picture element and an error δ1 of a decoded value from a true value is obtained by using a coefficient (w) depending on a class classification result CLASS among coefficients prepared for each class in advance 3 and a decoded error of the noticed picture element data Q1 is corrected by using the error δ1 as a correction value to obtain a decoded image S11 very close to the original image.

Description

Detailed Description of the Invention

[0001]

[Table of Contents] The present invention will be described in the following order. TECHNICAL FIELD OF THE INVENTION Conventional Technology (FIGS. 10 and 11) Problems to be Solved by the Invention Means for Solving the Problems Embodiments of the Invention (1) Overall Configuration (FIG. 1) (2) Class Classification Circuit Configuration example (2-1) Configuration example I (FIGS. 2 and 4) (2-2) Configuration example II (FIGS. 3 and 5) (3) Selection of coefficients (FIGS. 6 to 9) (4) Operation ( 5) Effects (6) Other Examples Effects of the invention

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data decoding apparatus and method, and can be applied to, for example, a compression decoder for decoding an image signal compressed and encoded for transmission and recording.

[0003]

2. Description of the Related Art Conventionally, in a so-called image signal transmission system for transmitting an image signal to a remote place such as a video conference system, or an apparatus for recording an image signal into a video tape recorder or a video disc recorder for reproduction. In order to use the transmission line and recording medium efficiently, the correlation between digitalized image signals is used to efficiently encode significant information, thereby reducing the amount of transmitted information and the amount of recorded information, thus improving the transmission efficiency. It is designed to improve recording efficiency.

Specifically, the amount of data to be transmitted is greatly reduced by highly efficient compression coding of image data. As a method of this high efficiency encoding, ADRC (Adapti
ve Dynamic Range Coding) has been proposed (see, for example, Japanese Patent Laid-Open No. 61-144989). ADRC divides the input image data into blocks composed of a plurality of pixels, and encodes each pixel data into a bit number smaller than the original quantization bit number in the block unit. More specifically, 2
A dynamic range defined by the maximum value and the minimum value of a plurality of pixels included in the dimensional block is obtained, and the image signal is highly efficient coded by performing coding adapted to this dynamic range.

An ADRC encoder that realizes this ADRC is constructed as shown in FIG. In FIG. 10, an ADRC encoder 1 converts an input image signal S1 into digital data of 8 bits per pixel by an analog digital conversion circuit (A / D) 2 and then supplies it to a block circuit 3. The block circuit 3 divides the image data into blocks of about 8 pixels × 8 lines.

The maximum value calculation circuit 4 finds the maximum pixel value MAX in the block, and the minimum value calculation circuit 5 finds the minimum pixel value MIN in the block. Then, the maximum pixel value MAX and the minimum pixel value MIN are given to the difference circuit 7, and the minimum pixel value MIN is given to the difference circuit 8 and the framing circuit 10. As a result, the difference circuit 7 outputs the dynamic range DR in the block, which is the framing circuit 1.
Sent to 0. In the difference circuit 8, a difference operation between each pixel value input via the delay circuit 6 and the minimum pixel value MIN is performed, and the difference value obtained as a result is sent to the adaptive quantization circuit 9.

When the pixel values in the block are L _i , the adaptive quantizing circuit 9 calculates

[Equation 1] Requantization is performed based on the calculation of. As a result, each pixel represented by 8 bits is represented by a quantization code Q _i of n bits smaller than this, and the image information amount is effectively reduced. The formatting circuit 10 formats the in-block dynamic range DR, the minimum pixel value MIN, and the quantization code Q _i according to the type of transmission line or recording system to form the final compressed image data S2. Thus, in the ADRC encoder 1, 1
Compressed image data S with a significantly reduced amount of information compared to the case where image information of 8 bits per pixel is transmitted as it is.
2 can be obtained.

An ADRC decoder for decoding the compression-encoded compressed image data S2 is constructed as shown in FIG. That is, when the ADRC decoder 11 inputs the compressed image data S2 to the frame decomposing circuit 12, it decomposes this into the minimum pixel value MIN, the intra-block dynamic range DR and the quantized code Q _i , among which the intra-block dynamic range DR and Quantization code Q _i
Is supplied to the adaptive dequantization circuit 13 and the minimum pixel value MIN is supplied to the addition circuit 14.

Here, the adaptive dequantization circuit 13 and the addition circuit 14 have the following equations.

[Equation 2] The decoded value L _i ′ for each pixel is obtained by performing the calculation of 1 and is sent to the block decomposition circuit 15 as the decoded image data S3. Block disassembly circuit 15 is AD
By performing the processing reverse to that of the block circuit 3 of the RC encoder 1 (FIG. 10), the decoded image data S3 is converted into a television time series. The block-decomposed decoded image data is analog-converted by the digital-analog conversion circuit 16, and thus the restored image signal S4 is obtained.

[0010]

However, the conventional AD
In RC encoding / decoding, a so-called approximate operation is performed in the division part when performing the operations of the expressions (1) and (2). Therefore, when the number of quantization bits of ADRC is small, there is a problem that the restored image quality deteriorates.

As one method for solving such a problem, conventionally, in consideration of the correlation of image signals, not only the decoded value is obtained only by the pixel to be decoded, but also the levels of the peripheral pixels are referred to. There has been proposed a decoding device that reduces a quantization error during decoding by obtaining a decoded value of a pixel to be decoded (Japanese Patent Laid-Open No. 1-200885).

However, in this type of decoding device, since only the local feature of the pixel closest to the decoding pixel of interest is referred to, there is an improvement effect, but a decoded value close to the true value is obtained. There are still insufficient problems. For example, in a region including pixels around the target decoded pixel, those pixel values may be offset to either of the pixel values of the original image as a whole (so-called offset variation). In such a case, even if the decoding target pixel is decoded by referring to the levels of the peripheral pixels, it is impossible to obtain an accurate decoded value because there is an error in the entire peripheral pixels.

The present invention has been made in consideration of the above points. By reducing the quantization error when decoding the compressed image data obtained by the block unit coding such as ADRC, the original image is reduced. It is intended to propose an image data decoding device and method capable of obtaining a very close restored image.

[0014]

In order to solve such a problem, according to the present invention, each pixel of interest in the compressed image data is classified into a class using block pixel data centered on the pixel of interest, and is classified in advance. The error amount from the true value of the decoded value is obtained by performing a predetermined calculation using the coefficient corresponding to the class classification result in the coefficient prepared for each, and the pixel data of interest is corrected using the error amount as a correction value. To be decrypted.

As a result, since the correction value can be obtained by using the coefficient prepared in advance, for example, in a region including the pixels around the target decoded pixel, those pixel values are entirely compared with the pixel values of the original image. As a result, even if the offset amount is set to either one, the error amount including the offset amount is effectively canceled by the calculated correction value.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

(1) Overall Configuration In FIG. 1 in which parts corresponding to those in FIG. 11 are assigned the same reference numerals, 20 indicates an ADRC decoder to which the image data decoding method according to the present invention is applied as a whole. The ADRC decoder 20 has a class classification adaptive processing unit 21. The class classification adaptation processing unit 21 performs class classification adaptation processing on the quantized code Q _i output from the frame decomposing circuit 12, thereby converting the quantized code Q _i into a quantized code Q _i ′ closer to the true value. After conversion, it is supplied to the adaptive inverse quantization circuit 13.

The class classification adaptive processing unit 21 inputs the quantization code Q _i to the class classification circuit 22, classifies the pixel of interest using the information around the quantization code Q _i of the pixel of interest, Class code CL representing the classification result
Output ASS. The coefficient ROM 23 stores the coefficient obtained for each class in advance by learning (the coefficient is a coefficient group including a plurality of coefficients), and the class code
The coefficient set w corresponding to CLASS is read.

The product-sum calculation circuit 24 uses the coefficient set w read from the coefficient ROM 23 and the quantization code Q _i of the peripheral pixel of the pixel of interest to obtain the following equation.

(Equation 3) The correction value δ _i for the pixel of interest is obtained by performing the linear linear combination operation represented by And adder circuit 25
In, the new quantization code Q _i ′ (= Q _i + δ _i ) for the pixel of interest is obtained by adding the correction value δ _i of the pixel of interest and the quantization code Q _i of the pixel of interest.

In the adaptive dequantization circuit 13 and the addition circuit 14, a new quantization code Q _i ′ formed by the class classification adaptive processing unit 21 is used,

(Equation 4) A decoded value L _i ″ is obtained by performing a decoding process based on the above, and this is output as decoded image data S10. The decoded image data S10 is restored by being sequentially passed through the block decomposition circuit 15 and the digital analog conversion circuit 16. It is the image signal S11.

(2) Example of Configuration of Class Classification Circuit Here, the class classification circuit 22 is configured as shown in FIG. 2 or FIG. 3, for example. Here, the class classification circuit 30 shown in FIG. 2 and the class classification circuit 40 shown in FIG. 3 basically code information on a block in a narrow range centered on the pixel of interest and information on blocks outside the block. , Which is output as class code CLASS.

In the compressed image data S2 obtained by encoding in block units like ADRC, the pixel of interest may be at the boundary of the encoding block. In such a case, the quantization code of the pixel of interest is used. Since the quantized code around and the quantized code around it exist in different coding blocks, the quantized code of interest and the quantized code around it are lost.

Therefore, in the ADRC decoder 20,
In practice, a block adjustment circuit (not shown) is provided in the preceding stage of the class classification circuit 22, the quantization code Q _i around the pixel of interest is once decoded by the block adjustment circuit, and the dynamic range DR of the coded block of the pixel of interest is decoded. And the minimum value M
The quantized code Q _i obtained by requantizing the decoded value based on IN is supplied to the class classification circuit 22.

(2-1) Configuration Example I First, the class classification circuit 30 shown in FIG. 2 will be described.
The class classification circuit 30 is a frame decomposition circuit 12 (FIG. 1).
Further, the quantized code Q _i input via the block adjusting circuit (not shown) is input to the first block circuit 31 and the second block circuit 32. As shown in FIG. 4, the first block forming circuit forms a first block by the pixel of interest and its eight surrounding pixels, and encodes this block data via a delay circuit 33 for timing adjustment. 34. The encoding circuit 34 arranges the quantized codes of the eight pixels around the target pixel arranged in a predetermined order based on the input block data, as the first class code D.
Output as 1. In this way, the first class code D1 representing the pixel level distribution pattern in the narrow range around the target pixel is formed.

As shown in FIG. 4, the second blocking circuit 32 forms a second block by eight pixels further outside the block formed by the first blocking circuit 31.
This block data is sent to the maximum value detection circuit 35 and the minimum value detection circuit 36. The maximum value detection circuit 35 and the minimum value detection circuit 36 detect the maximum value and the minimum value of the eight pixels, respectively, and send the detection results to the direction coding circuits 37 and 38.

The direction coding circuits 37 and 38 code the directions of the maximum value pixel and the minimum value pixel viewed from the center (that is, viewed from the target pixel). Since the directions viewed from the center are divided into eight types, the direction coding circuits 37 and 38 each output a direction code of 3 bits.
A combination of the direction code of the direction encoding circuit 37 and the direction code of the direction encoding circuit 38 is output as the second class code D2. In this way, the second class code D2 representing the direction of inclination of the image around the pixel of interest is formed.

First and second class codes D1 and D2
Are synthesized by the subsequent synthesizing circuit 39, and as a result, a final class code CLASS including the first and second class codes D1 and D2 is formed.
S is output to the coefficient ROM 23.

(2-2) Configuration Example II Next, the class classification circuit 40 shown in FIG. 3 will be described.
The class classification circuit 40 inputs the quantization code Q _i to the first block circuit 41 and the second block circuit 42. The first block circuit 41 forms the first block by the pixel of interest and the eight pixels around it, as in the case of the first block circuit 31 of FIG. In addition, the second block circuit 4
Similarly to the second blocking circuit 32 described above, the second 8
The pixel forms a second block.

Of the block data formed by the first block circuit 41, the quantized values of the eight pixels around the pixel of interest are sequentially supplied to the comparison circuit 43, and the quantized value of the pixel of interest is stored in the memory (D). It is given to the comparison circuit 43 via 44. In the comparison circuit 43, as shown in FIG. 5A, the magnitude of the quantized value of the pixel of interest and the quantized values of the eight pixels around it are sequentially compared. The encoding circuit 45 encodes the comparison result of the comparison circuit 43 with "1" or "0", and outputs this as the first class code D3.

The block data formed by the second block circuit 42 is supplied to the comparison circuit 47 via the delay circuit 46 for timing adjustment. Further, the block data formed by the first block circuit 41 is supplied to the comparison circuit 47 via the average value calculation circuit 48. As a result, in the comparison circuit 47, as shown in FIG. 5B, the average value of a total of 9 pixels of the target pixel and its 8 surrounding pixels and the 8 pixels outside thereof are compared in sequence. The coding circuit 49 codes the comparison result of the comparison circuit 47 into "1" or "0" and outputs it as the second class code D4.

In this way, the first class code D3
A second class code D4 representing the state of a wide range of pixels is formed in comparison with the above. Incidentally, the class classification circuit 40
When obtaining the second class code D4, the value of the pixel of interest is used as it is, and the average value is obtained in advance using 9 pixels including the neighboring 8 pixels without comparing with the surrounding peripheral pixels. And the outer 8 pixels are compared with each other, the influences of these can be obtained even when the pixel of interest is a singular point or noise is generated.
It is possible to form the second class code D4 that accurately represents the state of the periphery of the pixel of interest without reaching the number of 4.

First and second class codes D3 and D4
Are synthesized by the subsequent synthesizing circuit 50, and as a result, a final class code CLASS including the first and second class codes D3 and D4 is formed.
S is output to the coefficient ROM 23.

(3) Selection of Coefficients Next, how to select the coefficient set w for each class stored in the coefficient ROM 23 will be described. This coefficient set w is obtained by learning using original image data without image quality deterioration. FIG. 6 shows the structure of a learning circuit 60 for realizing this. The learning circuit 60 uses the learning image data S20 without deterioration.
Is input to the time-series conversion 61, the pixel value y of the pixel of interest and 8 pixels x _{1 to} x ₈ (not necessarily 8 pixels) in the periphery of the learning image data D 20 are 1 A time series conversion process for forming a block is performed, and these 9 pixels y and x _{1 to} x ₈ are supplied to the ADRC encoder 62.

The ADRC encoder 62 has the same configuration as that of the ADRC encoder 1 described above with reference to FIG. 10, and compresses and encodes the input image data to obtain the quantization code Q corresponding to each pixel value y, x _{1 to} x _8. Compressed image data S21 including _i , their dynamic range DR, and the minimum value MIN is generated, and the compressed image data S2 is generated.
1 is decoded by the ADRC decoder 63 having the same configuration as the conventional ADRC decoder 11 described above with reference to FIG.

Then, of the decoded pixel values obtained by the ADRC decoder 63, the decoded pixel value of the target pixel is supplied to the difference circuit 64. Further, the true pixel value y of the target pixel is supplied to the difference circuit 64 via the delay circuit 65 for timing adjustment. As a result, in the difference circuit 64, the ADR
The difference between the pixel value of the target pixel having a compression decoding error obtained via the C encoder 62 and the ADRC decoder 63 and the true pixel value y of the unprocessed target pixel is calculated,
The difference result is sent to the coefficient calculation circuit 66 as an error value δy.

The learning circuit 60 also sends the quantized code Q _i output from the ADRC encoder 62 to the class classification circuit 67. The class classification circuit 67 has the same configuration as the class classification circuit 22 (FIG. 1) described above, and forms a class code CLASS representing the class of the pixel of interest based on a plurality of quantization codes Q _i around the pixel of interest. , And sends the class code CLASS to the coefficient calculation circuit 66. Also, the quantization code Q output from the ADRC encoder 62
_i is given to the coefficient calculation circuit 66 via the delay circuit 68 for timing adjustment.

As described above, the coefficient calculating circuit 66 inputs the class code CLASS, the quantization codes Q _{1 to} Q ₈ around the target pixel and the error value δy from the true value of the target pixel, and the class code CLASS. For each represented class, the coefficient W representing the correlation between the error value δy and the quantized codes Q _{1 to} Q ₈ is obtained by learning using the least square method.

That is, the coefficient calculating circuit 66 firstly applies the coefficients w ₁ and w to the quantization codes Q ₁ , Q ₂ , ..., Q ₈ , respectively.
By multiplying by ₂ , ..., W ₈ , the error value δy is expressed by a linear linear combination of the surrounding quantization codes Q _{1 to} Q ₈ and the coefficients w _{1 to} w ₈ . Specifically, the coefficient calculation circuit 66 calculates, for each of the error values δy _{1 to} δy _r of the same class,
Quantization code Q _(RS) (however, R = 1, 2, ...
= 1, 2, ..., 8) and the coefficients w _{1 to} w ₈ are linearly combined to obtain the coefficients w _{1 to} w ₈ by the least squares method.

Explaining this, first, the error value δy
The determinant Y of _{1 to} δy _r is given by the following equation using the determinant X of the peripheral quantization code Q _{(RS) and} the determinant W of the coefficients w _{1 to} w _8.

(Equation 5) Can be expressed in the form of an observation equation. However, in the equation (5), r represents the number of target pixels of the same class.

Here, the coefficients w ₁ to w ₈ may be obtained by solving the simultaneous equations (5). This is solved by the method of least squares. That is, first, using the residual matrix E, the following equation (5) is obtained.

(Equation 6) It is re-expressed in the form of residual equation like.

[0041] Here, from equation (6) in order to determine the most probable value of each coefficient w ₁ to w _8, the condition that the ^{_{e 1 2 + e 2 2 +}} ...... + e r 2 to the minimum, i.e. the formula

(Equation 7) Each of the coefficients w _{1 to} w that satisfies the following eight conditions
Just find ₈ . Here, from the equation (6), the following equation

(Equation 8) And the condition of equation (7) is established for i = 1, 2, ..., 8

[Equation 9] Is obtained. Here, the following normal equation is obtained from the equations (6) and (9).

(Equation 10)

Since the normal equation represented by the equation (10) is a simultaneous equation with only eight unknowns, the coefficients w _{1 to} w ₈ which are the most probable values can be obtained. To be precise, in equation (10), it depends on w _i (ΣQ _jk Q _jl ).
(However, j = 1, ..., r, k = 1, ..., 8, l = 1,
If the matrix of 8) is regular, it can be solved. In reality, the simultaneous equations are solved using the Gauss-Jordan elimination method (sweep method).

In practice, the coefficient calculating circuit 66 is constructed as shown in FIG. That is, the coefficient calculation circuit 66 inputs the quantized codes Q _{1 to} Q _r and the error value δy to the normal equation generation circuit 70, and the normal equation generation circuit 70 causes the normal equation as expressed by the equation (10) for each class. An equation is generated, and a coefficient calculation w (w _{1 to} w ₈ ) for each class is obtained by the calculation of the sweeping method by the subsequent CPU calculation circuit 71.

The normal equation generating circuit 70 first multiplies each pixel by the multiplier array 72. The multiplier array 72 is configured as shown in FIG. 8, multiplies pixels by each cell represented by a square, and gives each multiplication result obtained by this to the subsequent adder memory 73.

The adder memory 73, as shown in FIG.
The multiplier array 72 is composed of an adder array 74 composed of a plurality of cells and a plurality of memory (or register) arrays 75A, 75B ,. The memory arrays 75A, 75B, ... Are provided for the number of classes indicated by the class code CLASS. Class code CL
In response to the output (class) of the class code decoder 77 that decodes the ASS, one memory array 75A, 75
B, ... Is selected, and the selected memory array 75A,
The stored values of 75B, ... Are fed back to the adder array 74. At this time, the addition result obtained by the adder array 74 is stored again in the corresponding memory arrays 75A, 75B, ....

In this way, the product-sum operation is performed by the multiplier array 72, the adder array 74 and the memory array 75, and the memory arrays 75A, 75B, ... For each class determined by the class code CLASS. Is selected, and the memory array 75A,
The contents of 75B, ... Are updated.

[0047] The position of each array (10) represented by [sum] Q _jk Q _jl according to w _i of the normal equation (where, j = 1, ......, r , k = 1, ......, 8, l = 1, ...
..., 8). As can be seen from the normal equation (10), if the upper right term is inverted, it becomes the same as the lower left term, so each array has a triangular shape.

In this way, the product-sum operation is performed for a certain period of time to generate a normal equation for each pixel position and for each class. The result of each term of the normal equation for each class is the memory array 75A corresponding to each class,
75B, ..., Then, the CPU for realizing each sweeping method operation by each term of the normal equation for each class.
It is calculated by the arithmetic circuit 71. As a result, the coefficient set w (w _{1 to} w ₈ ) for each class is obtained, and the coefficient set w (w
_{1 to} w ₈ ) are written to the address of the corresponding class of the coefficient ROM 23 (FIG. 1).

(4) Operation In the above configuration, the ADRC decoder 20 operates as the ADRC.
Quantization code Q _i of the compressed image data S2 formed by the encoding according to the above is input to the class classification circuit 22, and the class classification circuit 22 generates plural pixel data centered on the pixel of interest (quantization code of interest). (Quantization code) is collected to form a block, and the class code CLASS is generated based on the information of the block.

Then, the coefficient set w corresponding to the class code CLASS is read from the coefficient ROM 23 using the class code CLASS as a read address. Then, the product-sum calculation circuit 24 performs a product-sum calculation using the coefficient set w and the pixel data (quantization code) around the pixel of interest, thereby continuing the quantization code of interest Q _{i as it} is in the adaptive inverse quantization circuit 13 The error value δ _i is obtained from the true value generated when the decoding is performed.

The ADRC decoder 20 adds the error value δ _i to the quantized code Q _i in the adder circuit 25 to cancel the decoding error generated at the time of decoding in the adaptive inverse quantization circuit 13 in advance. As a result, the corrected quantized code Q _i ′ is decompressed and decoded in the adaptive dequantization circuit 13, so that the decoded pixel value substantially equal to the true value is output from the adaptive dequantization circuit 13.

Here, the coefficient set w used when calculating the error value δ _i is A used when forming the compressed image data S2.
The true value y included in the original image is used by the learning circuit 60 configured by the ADRC encoder 62 corresponding to the DRC encoder 1 (FIG. 10), the ADRC decoder 63 having the adaptive inverse quantization circuit 13, and the like. Since it is obtained by learning, the error value δ _{i based} on the true value y is used as a reference even if the compressed image data S2 fluctuates offset.
Can be obtained. Therefore, the ADRC decoder 20 can effectively cancel the offset variation and the compression error at the time of compression encoding by the error value δ _i .

(5) Effect According to the above configuration, when the compressed image data S2 compression-encoded with the bit number smaller than the original quantization bit number is decoded, the compressed image data S2 is per pixel of interest. The coefficient set w corresponding to the class classification result CLASS is selected from the coefficient sets w obtained by classifying and classifying the original pixel value (true value) y in advance.
The error value δ _i is calculated using the above, and the data is corrected according to the error value δ _i , whereby a restored image almost equal to the original image can be obtained.

(6) Other Embodiments In the above embodiments, the present invention is applied to the ADRC decoder 20 which decodes the compressed image data S2 obtained by ADRC. Is not limited to this, and for example, DCT (Discrete Cosine Transf
orm) encoding, DPCM (Differential Pulse Code Mo
dulation), BTC (Block Trancation Coding), and the like, and can be widely applied to the case of decoding image data compression-coded in block units.

In the above embodiment, the case where the image data decoding method according to the present invention is implemented by hardware as shown in FIG. 1 has been described, but the present invention is not limited to this, and compressed image data is calculated by a computer. Alternatively, the calculation processing may be performed by software.

Further, in the above-mentioned embodiment, the coefficient ROM is used as the coefficient storing means for storing the coefficient corresponding to the class.
However, the present invention is not limited to this, and a RAM (Random Access Memory), an SRAM, or the like may be used instead.

[0057]

As described above, according to the present invention, each pixel of interest in compressed image data is classified into a class using block pixel data centered on the pixel of interest, and a coefficient prepared in advance for each class. The error amount from the true value of the decoded value is obtained by performing a predetermined calculation using the coefficient corresponding to the classification result in the inside, and the decoding error of the pixel data of interest is corrected using the error amount as a correction value. As a result, a restored image very close to the original image can be obtained.

[Brief description of drawings]

FIG. 1A to which an image data decoding method according to the present invention is applied
It is a block diagram which shows the structure of a DRC decoder.

FIG. 2 is a block diagram showing a configuration example of a class classification circuit.

FIG. 3 is a block diagram showing a configuration example of a class classification circuit.

FIG. 4 is a schematic diagram for explaining a classification process by the class classification circuit of FIG.

5 is a schematic diagram for explaining a classification process by the class classification circuit of FIG.

FIG. 6 is a block diagram showing a configuration of a learning circuit for obtaining a coefficient.

FIG. 7 is a block diagram showing the configuration of a coefficient calculation circuit.

FIG. 8 is a schematic block diagram showing a configuration of a multiplier array of a coefficient calculation circuit.

FIG. 9 is a schematic block diagram showing the configuration of an adder memory of a coefficient calculation circuit.

FIG. 10 is a block diagram showing a configuration of an ADRC encoder.

FIG. 11 is a block diagram showing a configuration of a conventional ADRC decoder.

[Explanation of symbols]

1, 62 ... ADRC encoder, 9 ... Adaptive quantization circuit, 11, 20, 63 ... ADRC decoder, 13 ...
Adaptive dequantization, 21 ... Class classification adaptive processing unit 22,
30, 40, 67 ... Class classification circuit, 23 ... Coefficient R
OM, 60 ... Learning circuit, S1 ... Input image signal, S
2, S21 ... Compressed image data, S3, S10 ... Decoded image data, S4, S11 ... Decompressed image signal, MAX ...
... maximum pixel value, MIN ...... minimum pixel value, DR ...... dynamic range, Q _i, Q _i '...... quantization code, CLASS
…… Class code, w …… Coefficient set, δ _i …… Correction value, y
…… True value, δy …… Error data.

Claims (8)

[Claims] 1. A compressed image formed by an image encoding means which divides input image data into blocks consisting of a plurality of pixels and encodes each pixel data into a bit number smaller than the original quantization bit number in the block unit. An image data decoding device for decoding data, a class classification means for forming a block of a predetermined range centered on a pixel of interest from the compressed image data, and classifying the pixel of interest using pixel data in a block of the block. And a coefficient storage unit that stores a coefficient corresponding to each class classified by the class classification unit, outputs a coefficient of a class according to the classification result by the class classification unit, and a coefficient output from the coefficient storage unit. And the pixel data around the pixel of interest are used to perform an operation to obtain an error from the true value when the pixel of interest is decoded. Error amount calculation means for calculating the amount, correction means for correcting the data of the pixel of interest based on the error amount, and pixel data corrected by the correction means for the encoding method of the image encoding means. An image data decoding apparatus, comprising: a decoding unit that obtains decoded data by decoding using a decoding method corresponding to. 2. The class classification means collects peripheral pixels centered on the pixel of interest to form a first block, and collects pixels outside the first block. Second block forming means for forming a second block, first class code forming means for forming a first class code using the pixel data in the block of the first block, and And a second class code forming means for forming a second class code on the basis of the directions of the maximum value and the minimum value of the pixel level of the pixel in the block of the second block. The image data decoding apparatus according to claim 1, wherein a combination of the class codes is used as a class classification result. 3. The class classification means collects peripheral pixels centered on the pixel of interest to form a first block, and collects pixels outside the first block. Second block forming means for forming a second block, and the pixel level of the pixel in each block of the first block and the pixel level of the target pixel are set to "1" or "0".
A first class code forming means for forming a first class code by encoding into a logical value of, the pixel level of each pixel in each block of the second block and the pixel in block of the first block. And a second class code forming means for forming a second class code by encoding the magnitude of the average value of the pixel level into a logical value of "1" or "0". The image data decoding apparatus according to claim 1, wherein a combination of the class codes of is used as a classification result. 4. The coefficient stored in the coefficient storage means is obtained in advance by predetermined learning, and a learning circuit for performing the learning forms a block in a predetermined range centered on the pixel of interest from the compressed image data. Then, a class classification unit that classifies the pixel of interest using the pixel data in the block of the block, a true value of the pixel of interest, and a decoded value when the pixel of interest is decoded by the decoding unit A difference value calculating means for obtaining a difference value, and the difference value is represented by a linear linear combination of pixel data in a block used for the class classification and a predetermined coefficient for each class classified by the class classifying means, A coefficient calculating means for calculating the coefficient of the linear linear combination by learning of the least squares method, and storing the coefficient calculated by the coefficient calculating means in the coefficient storing means. Image data decoding apparatus according to claim 1, symptoms. 5. A compressed image formed by an image coding method in which input image data is divided into blocks composed of a plurality of pixels, and each pixel data is coded into a block number smaller than the original quantization bit number in the block unit. In the image data decoding method for decoding data, using the block step forming a block in a predetermined range centered on the pixel of interest from the compressed image data, and the pixel data in the block of the block formed by the block step. A class classification step for classifying the target pixel and a coefficient prepared in advance for each class are selected according to the classification result in the class classification step, and the target pixel is decoded using the coefficient. The error amount calculation step for calculating the error amount from the true value and the error amount obtained in the error amount calculation step are used. And a decoding step for decoding the corrected pixel data of interest by using a decoding method corresponding to the image coding method. 6. In the block step, peripheral pixels centering on the pixel of interest are collected to form a first block, and pixel data outside the first block is collected to form a second block. In the class classification step, a first class code is formed using the intra-block pixel data of the first block, and the maximum of the intra-block pixel data of the second block viewed from the target pixel is formed. The image data according to claim 5, wherein the second class code is formed based on the direction of the value and the minimum value, and the combination of the first and second class codes is used as the classification result. Decryption method. 7. In the block step, peripheral pixels centering on the pixel of interest are collected to form a first block, and pixels outside the first block are collected to form a second block. Then, in the class classification step, the size of the pixel data in each block of the first block and the pixel data of interest is coded into a logical value of "1" or "0" to obtain the first class code. At the same time, the magnitude of the pixel data in each block of the second block and the average value of the pixel data in the block of the first block is coded into a logical value of "1" or "0". Form a class code of 2, and the first and second
The image data decoding method according to claim 5, wherein a combination of the class codes of is used as a classification result. 8. The coefficient prepared in advance in the error amount calculation step forms a block in a predetermined range around the pixel of interest from the compressed image data, and uses the pixel data in the block of the block to generate the block of interest. A class step for classifying pixels, a true value of the pixel of interest, a difference value calculation step for obtaining a difference value between a decoded value when the pixel of interest is decoded using the decoding method, and the difference value For each of the classes classified in the class classification step, the linear pixel combination of the pixel data in the block used for the class classification and a predetermined coefficient is expressed, and the coefficient of the linear linear combination is obtained by learning the least squares method. The image data decoding method according to claim 5, wherein the image data is obtained by a learning step including.