JPH09280890A - Synchro/digital converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a synchro/digital converter capable of easily detecting failure of a synchro system. SOLUTION: A Scott transformer 1 receives an externally inputted synchro signal; two-phase SIN and COS signals outputted from the Scott transformer 1 are phase-detected by a reference signals of the synchro signals; the phase- detected outputs are squared at square circuits 7A and 7B respectively; the outputs of the square circuits are summed up at an adder 8; and a voltage comparison circuit 9 is provided to compare the output voltage of the adder to a threshold value.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchro / digital converter including a Scott transformer, a reference transformer, a resolver / digital converter, a reference abnormality detection circuit, and a buffer circuit, and a synchro signal abnormality detection circuit. The present invention relates to a synchro / digital converter.

[0002]

2. Description of the Related Art FIG. 5 shows an embodiment of a conventional synchro / digital converter, in which 1 is a synchro signal S.
1. A Scott transformer for converting a 3-wire synchro signal of synchro signal S2 and synchro signal S3 into a resolver signal of SIN and COS signals, and 2 is a reference for converting the reference signals R1 and R2 of the synchro signal into a voltage capable of being processed by a circuit. A transformer, 3 is a resolver / digital converter that outputs a digital amount corresponding to the synchro angle from the resolver signal and the reference signal, and 4 is a reference that monitors the amplitude, cycle, etc. of the reference signal and outputs a normal or abnormal result. The abnormality detection circuit 5 is a buffer circuit which holds the digital output and the output of the reference abnormality detection circuit 4 and has an interface function to the computer system.

In the conventional synchro / digital converter, the voltages VS3-S1, VS1-S2, VS2-S3 between the terminals of the synchro signal, which is constructed as described above, can be expressed as follows. At this time, θ is the synchronization angle.

[0004]

[Equation 1]

[0005]

[Equation 2]

[0006]

(Equation 3)

When the synchronizing signal is input, the resolver signals of SIN and COS described below are output to the output end of the Scott transformer 1. The output V1 on the SIN side can be expressed as follows. At this time, K is the transformer transformation ratio.

[0008]

(Equation 4)

The output V2 on the COS side can be expressed as follows.

[0010]

(Equation 5)

The resolver signal is input and the resolver / digital converter 3 outputs a digital amount corresponding to the angle. The output digital output is output from the buffer circuit 5 to the computer system. At this time, the reference abnormality detection circuit 4 monitors the output of the reference transformer 2 in order to detect an abnormality such as a connection error, disconnection, or short circuit in the reference signal of the synchro signal input from the external device. The reference abnormality detection circuit 4 outputs the abnormality result as a digital signal from the buffer circuit 5 when the amplitude and the cycle of the reference signal are disturbed, and warns the computer system of the abnormality.

[0012]

Most of the failures in the synchro / digital converter as described above have more failures in the synchro signal interface than in the synchro / digital converter itself. Typical examples of this interface failure are disconnection of the synchro system due to shock and vibration, leakage of connection occurring after temporary repair, short circuit, and incorrect connection due to grounding, etc. When these failures occur, conventional synchro / digital converters
For reference signal failures, the amplitude of that signal,
The reference abnormality detection circuit 4 can detect a cycle abnormality, but cannot detect a failure of the synchronizing system. There is a problem in that the discovery of a failure is delayed because the failure cannot be discovered without analyzing the data with a computer system.

The present invention has been made in order to solve the above problems, and an object thereof is to make it easier to find a failure by adding a failure detection function of a synchro system to a synchro / digital converter. There is.

[0014]

A synchro / digital converter according to a first aspect of the present invention is a Scott transformer for converting a synchro signal inputted from the outside into a two-phase signal of SIN and COS, and a synchro signal inputted in pair with the synchro signal. A reference transformer that transforms a reference signal into a voltage that can be processed by a circuit, a resolver / digital converter that inputs the output of the Scott transformer and the reference transformer and converts it into digital data, and outputs the data to a computer system that holds the digital data. A reference abnormality detection circuit that monitors the output of the buffer circuit and the reference transformer, detects voltage and cycle abnormality, and outputs an abnormality result to the buffer circuit, and phase-detects the two-phase signals of SIN and COS with the reference signals. Phase detection circuit, above phase detection Squaring circuits for the road output square, the 2
An adder for adding the output of the multiplying circuit, comparing the output of the adder with a reference voltage, and if the comparison result exceeds the threshold value, a voltage comparison circuit for outputting data to the buffer circuit as an abnormality of the synchro signal. It is equipped with.

In the synchro / digital converter according to the second aspect of the invention, the synchro signals inputted from the outside are converted into SIN and CO signals.
A Scott transformer for converting into a two-phase signal of S, a reference transformer for converting a reference signal input in pair with the synchro signal into a voltage capable of processing the circuit, and an output of the Scott transformer and the reference transformer are input and converted into digital data. Resolver / digital converter, buffer circuit that holds the digital data and outputs the data to the computer system, and monitor the output of the reference transformer to detect voltage and cycle abnormalities and output the abnormal result to the buffer circuit. Circuit, of the two-phase signals of SIN and COS, a -90 ° phase circuit that delays the phase of the SIN signal by 90 °, a phase detection circuit that phase-detects the output of the -90 ° phase circuit with a reference signal, and the SIN and COS Of the two-phase signals of
Phase detection circuit that detects the phase of the signal with the reference signal,
A subtracter that subtracts the outputs of the phase detection circuit, compares the output of the subtractor with a reference voltage, and outputs the data to the buffer circuit as an abnormality of the synchro signal if the comparison result exceeds the threshold value. It is provided with a voltage comparison circuit.

In the synchro / digital converter according to the third aspect of the present invention, the synchro signal inputted from the outside is converted into SIN, CO.
A Scott transformer for converting into a two-phase signal of S, a reference transformer for converting a reference signal input in pair with the synchro signal into a voltage capable of processing the circuit, and an output of the Scott transformer and the reference transformer are input and converted into digital data. Resolver / digital converter, buffer circuit that holds the digital data and outputs the data to the computer system, and monitor the output of the reference transformer to detect voltage and cycle abnormalities and output the abnormal result to the buffer circuit. A circuit, a + 90 ° phase circuit that advances the phase of the COS signal by 90 ° among the two-phase signals of SIN and COS, a phase detection circuit that phase-detects the output of the + 90 ° phase circuit with a reference signal, and 2 of the above SIN and COS. Of the phase signals, the SIN signal is the reference signal. Phase detection circuit for phase detection with, a subtractor for subtracting the outputs of the phase detection circuit, the output of the subtractor is compared with the reference voltage, and if the comparison result exceeds the threshold value, the sync signal is abnormal. A voltage comparison circuit for outputting data to the buffer circuit is provided.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1. 1 is a block diagram showing a first embodiment of the present invention, in which 1 is a Scott transformer and 2
Is a reference transformer, 3 is a resolver / digital converter, 4 is a reference abnormality detection circuit, 5 is a buffer circuit, and these are the same as in the prior art, and the phase detection circuits 6A and 6B are the output of the Scott transformer 1. ，
The COS signal is input, phase detection is performed with the reference signal output from the reference transformer 2, and the output is 7A,
The signal of SIN ² θ and COS ² θ is output by the square circuit of 7B. Further, the signals output from the squaring circuits 7A and 7B are added by the adder 8 and the output of the adder 8 is set to 9
The threshold value of the voltage comparator circuit is compared, and if a value greater than or equal to the threshold value is input, digital data is output to the buffer circuit 5 as an abnormal signal.

FIG. 4 is a block diagram showing details of the voltage comparison circuit 9. The signal output from the adder 8 is input to the + terminal of the 13A comparator, and further 1
Input to the-terminal of 3B. The two comparators are configured as window comparators and the comparator 13
The upper limit level of the threshold value of A is set, and the lower limit level of the threshold value is set by the comparator 13B.
When either level is exceeded, digital data is output to the buffer circuit 5 as an abnormal signal.

Next, the operation of the synchro / digital converter according to the first embodiment of the present invention will be described. In the synchro / digital converter having the above-mentioned configuration, when a failure such as an erroneous connection occurs in the synchro system of the input signal, the output of the Scott transformer does not output the values shown in "Equation 4" and "Equation 5" and is disturbed. Expected to be a value. In the normal case, when the phase detection circuits 6A and 6B perform phase detection, synchronous rectification is performed as follows. In the case of the phase detection circuit 6A, the output V1 '
Is as follows.

[0020]

(Equation 6)

At this time, assuming that KV is 1, the output V1 'is as follows.

[0022]

(Equation 7)

In the case of the phase detection circuit 6B, the output V2 'is as follows.

[0024]

(Equation 8)

At this time, assuming that KV is 1, the output V2 'is as follows.

[0026]

[Equation 9]

As a result, the output of the phase detection 6A is SINθ.
Is output, and COSθ is output as the output of the phase detection 6B, which is input to the squaring circuits 7A and 7B in the next stage and squared. As a result, the output of the squaring circuit 7A is SIN ² θ,
The output of the squaring circuit 7B is COS ² θ and is added by the adder 8 in the next stage.

As a result, the following values are obtained from the trigonometric function formula.

[0029]

(Equation 10)

When the addition result is 1 as described above, it is normal, but the determination is made by the voltage comparison circuit 9 in the next stage. Generally, in consideration of system tolerances such as variations in input signals and circuit errors, the upper and lower threshold values of the addition result have a range. The threshold values are the upper limit level and the lower limit level of the voltage comparison circuit 9. This value is adjusted and set by the system in which the synchro / digital converter is used. When the voltage comparison circuit 9 exceeds the upper limit level and the lower limit level, it is abnormal and if not exceeded, it is determined to be normal, and the output of the voltage comparison circuit 9 is used as a binary signal of digital data in the buffer circuit 5. Output to the computer system together with the synchro data output from the resolver / digital converter 3.

Embodiment 2 2 is a block diagram showing a second embodiment of the present invention, in which 1 is a Scott transformer, 2 is a reference transformer, 3 is a resolver /
Digital converter, 4 is a reference abnormality detection circuit, 5 is a buffer circuit, and these are the same as in the prior art,
11 of the two-phase signal output of the Scott transformer 1 is SI
The N signal is delayed in phase by 90 degrees by a 10 -90 ° phase circuit, and is phase-detected with the reference signal by the phase detection circuit 6A at the next stage to perform synchronous rectification. The other phase detection circuit 6B phase-detects the output of the COS signal of the Scott transformer 1 using the reference signal and synchronously rectifies it. Further, the outputs of the phase detection circuits 6A and 6B are subtracted by the subtractor 13 and the output of the subtractor 13 is compared with the threshold value of the voltage comparator circuit 10 and when a value equal to or more than the threshold value is input,
Digital data is output to the buffer circuit 5 as an abnormal signal.

Next, the operation of the synchro / digital converter according to the second embodiment of the present invention will be described. In the synchro / digital converter having the above-mentioned configuration, when a failure such as an erroneous connection occurs in the synchro system of the input signal, the output of the Scott transformer does not output the values shown in "Equation 4" and "Equation 5" and is disturbed. Expected to be a value. Under normal conditions, the SIN signal output of the Scott transformer 1 is delayed by 90 degrees in the -90 ° phase circuit 10 to become a COS signal due to the relationship between SIN and COS.

If the COS signal is phase-detected by the phase detection circuit 6A, the COS signal output of the Scott transformer 1 is further phase-detected by the phase detection circuit 6B, and each of them is subtracted by the subtractor 13, so that it is normal. Both have the same output and the output is zero. However, in general, the upper and lower threshold values of the subtraction result have a range in consideration of system tolerances such as variations in input signals and circuit errors. The threshold values are the upper limit level and the lower limit level of the voltage comparison circuit 9. This value is
Adjust and set the value depending on the system in which the digital converter is used. When the voltage comparison circuit 9 exceeds the upper limit level and the lower limit level, it is abnormal and if not exceeded, it is determined to be normal, and the output of the voltage comparison circuit 9 is used as a binary signal of digital data in the buffer circuit 5. Output to the computer system together with the synchro data output from the resolver / digital converter 3.

Embodiment 3. 3 is a block diagram showing a third embodiment of the present invention, in which 1 is a Scott transformer, 2 is a reference transformer, 3 is a resolver /
Digital converter, 4 is a reference abnormality detection circuit, 5 is a buffer circuit, and these are the same as in the prior art,
Reference numeral 11 represents CO out of the two-phase signal output of the Scott transformer 1.
The phase of the S signal is advanced by 90 degrees with 12 + 90 ° phase circuits.
The phase detection circuit 6B at the next stage detects the phase of the reference signal and performs synchronous rectification. The other phase detection circuit 6A phase-detects the output of the SIN signal of the Scott transformer 1 with the reference signal and synchronously rectifies it as in the above. Further, the outputs of the phase detection circuits 6A and 6B are subtracted by 13 subtractors, and the subtracter 1
The output of 3 is compared with the threshold value of the voltage comparison circuit of 10, and if a value greater than or equal to the threshold value is input, digital data is output to the buffer circuit of 5 as an abnormal signal.

Next, the operation of the synchro / digital converter according to the third embodiment of the present invention will be described. In the synchro / digital converter having the above-mentioned configuration, when a failure such as an erroneous connection occurs in the synchro system of the input signal, the output of the Scott transformer does not output the values shown in "Equation 4" and "Equation 5" and is disturbed. Expected to be a value. Under normal conditions, the COS signal output of the Scott transformer 1 is advanced by 90 degrees in the + 90 ° phase circuit 12 to become the SIN signal due to the relationship between SIN and COS.

In the normal case, the SIN signal is phase-detected by the phase detection circuit 6A, the COS signal output of the Scott transformer 1 is further phase-detected by the phase detection circuit 6B, and each of them is subtracted by the subtractor 13. Both have the same output and the output is zero. However, in general, the upper and lower threshold values of the subtraction result have a range in consideration of system tolerances such as variations in input signals and circuit errors. The threshold values are the upper limit level and the lower limit level of the voltage comparison circuit 9. This value is
Adjust and set the value depending on the system in which the digital converter is used. When the voltage comparison circuit 9 exceeds the upper limit level and the lower limit level, it is abnormal and if not exceeded, it is determined to be normal, and the output of the voltage comparison circuit 9 is used as a binary signal of digital data in the buffer circuit 5. Output to the computer system together with the synchro data output from the resolver / digital converter 3.

[0037]

According to the first aspect of the present invention, a Scott transformer for converting a synchro signal inputted from the outside into a two-phase signal of SIN and COS, and a reference signal inputted in pair with the synchro signal can be processed by a circuit. A reference transformer that transforms the voltage, a resolver / digital converter that inputs the outputs of the Scott transformer and the reference transformer and converts them into digital data, a buffer circuit that holds the digital data and outputs the data to a computer system, and the reference transformer A synchro / digital converter comprising a reference abnormality detection circuit for monitoring an output, detecting a voltage abnormality, a cycle abnormality, and outputting an abnormality result to the buffer circuit.
A phase detection circuit that phase-detects the two-phase signal of S with each reference signal, a square circuit that squares the output of the phase detection circuit, an adder that adds the outputs of the square circuit, and an output of the adder as a reference voltage. By comparing, if the comparison result exceeds the threshold value, by providing a voltage comparison circuit that outputs data to the buffer circuit as an abnormality of the synchro signal,
Synchro system disconnection, connection leak after temporary repair,
Faults due to erroneous connections due to short circuits, grounding, etc. can be instantly detected, so that the faults can be easily found.

According to the second embodiment of the present invention, a Scott transformer for converting a synchro signal inputted from the outside into a two-phase signal of SIN and COS, and a reference signal inputted in a pair with the synchro signal can be circuit-processed. A reference transformer that transforms the voltage, a resolver / digital converter that inputs the outputs of the Scott transformer and the reference transformer and converts them into digital data, a buffer circuit that holds the digital data and outputs the data to a computer system, and the reference transformer In the synchro / digital converter configured by the reference abnormality detection circuit that monitors the output, detects the voltage and the cycle abnormality, and outputs the abnormality result to the buffer circuit,
Of the two-phase signals of N and COS, the -90 ° phase circuit that delays the phase of the SIN signal by 90 °, the phase detection circuit that detects the phase of its output with the reference signal, and the COS signal of the two-phase signals of SIN and COS Phase detection circuit that detects the phase with a reference signal, a subtractor that subtracts the outputs of the phase detection circuit, and the output of the subtractor with a reference voltage.If the comparison result exceeds the threshold value, the synchronization By providing a voltage comparison circuit that outputs data to the buffer circuit as a signal abnormality, it is possible to instantly detect disconnection of the synchronization system, connection leakage that occurs after temporary repair, short circuit, ground fault, etc. The failure can be easily found.

According to the third embodiment of the present invention, a Scott transformer for converting a synchro signal inputted from the outside into a two-phase signal of SIN and COS, and a reference signal inputted in a pair with the synchro signal can be circuit-processed. A reference transformer that transforms the voltage, a resolver / digital converter that inputs the outputs of the Scott transformer and the reference transformer and converts them into digital data, a buffer circuit that holds the digital data and outputs the data to a computer system, and the reference transformer In the synchro / digital converter configured by the reference abnormality detection circuit that monitors the output, detects the voltage and the cycle abnormality, and outputs the abnormality result to the buffer circuit,
Of the two-phase signals of N and COS, a + 90 ° phase circuit for advancing the phase of the COS signal by 90 °, a phase detection circuit for phase-detecting the output of the COS signal with a reference signal, and two of the above SIN and COS
Of the phase signals, a phase detection circuit that phase-detects the SIN signal with a reference signal, a subtractor that subtracts the outputs of the phase detection circuit, the output of the subtractor is compared with a reference voltage, and the comparison result is a threshold value. If it exceeds, a voltage comparison circuit that outputs data to the buffer circuit as an abnormality of the synchro signal is provided, so that the synchro system disconnection, connection leakage that occurs after temporary repair, short circuit, grounding, etc. Since it can be detected at any time, the failure can be easily found.

[Brief description of drawings]

FIG. 1 is a diagram showing Embodiment 1 of a synchro / digital converter according to the present invention.

FIG. 2 is a diagram showing Embodiment 2 of the synchro / digital converter according to the present invention.

FIG. 3 is a diagram showing Embodiment 3 of the synchro / digital converter according to the present invention.

FIG. 4 is a diagram showing a voltage comparison circuit of the synchro / digital converter according to the present invention.

FIG. 5 is a diagram showing a conventional synchro / digital converter.

[Explanation of symbols]

1 Scott Transformer, 2 Reference Transformer, 3
Resolver / digital converter, 4 reference abnormality detection circuit, 5 buffer circuit, 6A, 6B phase detection circuit, 7A, 7B square circuit, 8 adder, 9 voltage comparison circuit, 10-90 ° phase circuit, 11 subtractor, 12
+ 90 ° phase circuit, 13A, 13B comparator.

Claims (3)

[Claims] 1. Synchronizing an externally input synchro signal with SI.
A Scott transformer for converting into a two-phase signal of N and COS, a reference transformer for converting a reference signal input in pair with the above-mentioned synchro signal into a voltage capable of processing the circuit, and digital data by inputting the outputs of the Scott transformer and the reference transformer. Resolver / digital converter for converting to, a buffer circuit for holding the above digital data and outputting the data to a computer system, and a reference for monitoring the output of the above reference transformer to detect voltage and cycle abnormalities and outputting an abnormal result to the above buffer circuit In a synchro / digital converter constituted by an abnormality detection circuit, a phase detection circuit for phase-detecting the two-phase signals of SIN and COS with reference signals, a squaring circuit for squaring the output of the phase detection circuit, and the above-mentioned 2 An adder that adds the outputs of the squaring circuit, The output of the adder is compared with a reference voltage, and if the comparison result exceeds a threshold value, a synchro signal is provided as a synchro signal abnormality and a voltage comparison circuit for outputting data to a buffer circuit is provided. / Digital converter. 2. Synchronizing the synchro signal input from the outside with SI
A Scott transformer for converting into a two-phase signal of N and COS, a reference transformer for converting a reference signal input in pair with the above-mentioned synchro signal into a voltage capable of processing the circuit, and digital data by inputting the outputs of the Scott transformer and the reference transformer. Resolver / digital converter for converting to, a buffer circuit for holding the above digital data and outputting the data to a computer system, and a reference for monitoring the output of the above reference transformer to detect voltage and cycle abnormalities and outputting an abnormal result to the above buffer circuit In the synchro / digital converter constituted by the abnormality detection circuit, SI of the two-phase signals of SIN and COS is SI
-90 ° phase circuit for delaying the phase of N signal by 90 °, above-
A phase detection circuit for detecting the output of the 90 ° phase circuit with a reference signal, of the two-phase signals SIN and COS,
A phase detection circuit that phase-detects the COS signal with a reference signal, a subtractor that subtracts the outputs of the phase detection circuit, and the output of the subtractor with a reference voltage. If the comparison result exceeds a threshold value, And a voltage comparison circuit that outputs data to the buffer circuit as an abnormality of the synchro signal. 3. Synchronizing the synchro signal input from the outside
A Scott transformer for converting a two-phase signal of N and COS, a reference transformer for converting a reference signal input in pair with the synchro signal into a voltage capable of processing a circuit, and digital data by inputting the outputs of the Scott transformer and the reference transformer. Resolver / digital converter for converting to, a buffer circuit for holding the above digital data and outputting the data to a computer system, and a reference for monitoring the output of the above reference transformer to detect voltage and cycle abnormalities and outputting an abnormal result to the above buffer circuit In the synchro / digital converter configured by the abnormality detection circuit, the CO of the two-phase signals of SIN and COS is
+ 90 ° phase circuit that advances the phase of S signal by 90 °, above +
A phase detection circuit for detecting the output of the 90 ° phase circuit with a reference signal, of the two-phase signals SIN and COS,
A phase detection circuit that phase-detects the SIN signal with a reference signal, a subtractor that subtracts the outputs of the phase detection circuit, and the output of the subtractor with a reference voltage. If the comparison result exceeds a threshold value, And a voltage comparison circuit that outputs data to the buffer circuit as an abnormality of the synchro signal.