JPH09246582A - Photovoltaic element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a photovoltaic element whose workability, durability and the like are enhanced and whose costs are reduced by a method wherein the diffusion reflectance of light at a specific wavelength of a substrate and/or of a rear reflection layer is set at a prescribed value and a photoelectric conversion layer contains at least silicon and germanium. SOLUTION: A rear reflection layer 102, a transparent conductive layer 103, an n-type semiconductor layer 104, an i-type conductive layer 105, a p-type semiconductor layer 106, a transparent electrode 107 and a pyroelectric electrode 108 are formed on a substrate 101. When the surface of the rear reflection layer 102 is a mirror surface, the rear reflection layer is stripped easily from the transparent conductive layer 103. The diffusion reflectance at a wavelength of 800nm on the surface of the rear reflection layer 102 is set at 3% or higher and 50% or lower. A photoelectric conversion layer is constituted of the p-type semiconductor layer 106, of the i-type semiconductor layer 105 and of the n-type semiconductor layer 104, and a pin junction is formed. A material which uses a group IV element such as Si, Ge or the like or a material which uses a group IV alloy such as SiGe, SiC or the like is used for the photoelectric conversion layer.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a photovoltaic device having a backside reflecting layer.

[0002]

2. Description of the Related Art Conventionally, in order to increase the conversion efficiency of a photovoltaic element, it has been known to provide a metal reflection layer on the side opposite to the light incident side of a photoelectric conversion layer to effectively utilize the incident light. There is. By providing a transparent conductive layer between the metal reflective layer and the photoelectric conversion layer, the components of the metal reflective layer are prevented from diffusing into the photoelectric conversion layer, and at the same time, when a short circuit occurs in the photoelectric conversion layer, an excess current flows. It is known that the liquid crystal can be prevented from flowing and the adhesion of the photoelectric conversion layer is further improved. This is disclosed in, for example, Japanese Patent Publication No. 59-43101 and Japanese Patent Publication No. 60.
-418878 and Japanese Patent Publication No. 60-84888. In addition, TiO between the metal layer and the photoelectric conversion layer
_The interposition of the _second transparent conductive layer is described in Y. Hamaka
wa, et. al, Appl. Phys. Lett. ,
43 (1983) p644.

Further, by forming a so-called texture structure in which the surface of the transparent conductive layer is made into a fine uneven shape,
It is known that light is scattered at the interface between the transparent conductive layer and the photoelectric conversion layer to achieve more effective light absorption. For example, T. Toedje, et. al, Proc. 16th
IEEE Photovoltaic Special
ist Conf. (1982) p1425.

[0004]

However, when a back electrode having such a structure is adopted and an attempt is made to actually manufacture a photovoltaic element, some problems arise from the viewpoint of workability and durability. Came.

[0005] For one thing, a typical uneven shape called a conventional so-called texture structure is described in Tiedje,
et. al, Proc. 16th IEEE Photo
Ovoltaic Specialist Conf.
It has been considered that those having pyramid-shaped irregularities as illustrated in (1982) p1423 have an excellent light confinement effect. However, when a transparent conductive layer is formed on a substrate having such a surface shape, the surface of the transparent conductive layer also has pyramid-shaped irregularities, so even if a transparent conductive layer is interposed between the back surface reflection layer and the semiconductor layer, The leak current of the photovoltaic element may increase through a defective portion of the layer, and the manufacturing yield of the photovoltaic element may decrease. In addition, the semiconductor layer formed on the surface having pyramid-shaped irregularities has a smaller effective film thickness than the semiconductor layer formed on the surface of the mirror surface, so that the doping layer etc. originally designed to be thinner is thinner. In some cases, the open-circuit voltage (Voc) and the fill factor (FF) of the photovoltaic element may be lower than those of the photovoltaic element formed on the mirror-finished substrate surface.

Further, for example, when Ag or Cu is used as the back metal reflection layer, the humidity is high, and when a positive bias voltage is applied to the back metal reflection layer, Ag or Cu is migrated to cause light incident side. It was found that the photovoltaic element was shunted (short-circuited) by conducting the electrode of. This phenomenon was remarkable when the back surface metal reflective layer had a concavo-convex shape (texture structure) having a size of about the wavelength of light.

Further, when Al is used as the back surface metal reflective layer, migration such as Ag and Cu does not occur, but when a texture structure is formed, the reflectance may decrease. Furthermore, when a transparent conductive layer is laminated on Al having a texture structure, the reflectance may be significantly reduced.

On the other hand, originally the substrate for the photovoltaic element is
From the viewpoint of characteristics and yield, those having a surface roughness as small as possible and being close to a mirror surface have been preferred and used. However, when the back surface reflection layer or the substrate and the back surface reflection layer are not formed in a concavo-convex shape but are formed on a mirror surface with a diffuse reflectance of 1% or less, the surface of the transparent conductive layer is also flat and light scattering on the back surface is small. , The problem that the light absorption of the semiconductor layer is not sufficient and the adhesion between the substrate and the back surface reflection layer or the back surface reflection layer and the transparent conductive layer or the transparent conductive layer and the semiconductor is insufficient depending on the combination of the materials of the substrate and the back surface electrode. In the process of manufacturing the photovoltaic element, peeling is likely to occur at any interface between the layers. Further, there is a problem that polishing the substrate to a mirror surface increases the manufacturing cost of the substrate and the manufacturing cost of the photovoltaic element.

The above-mentioned problems are caused by using a low-cost substrate such as a resin film or stainless steel, or by increasing the production speed by increasing the formation speed of the semiconductor layer, which is suitable for practical use at low cost. When the process is adopted, it is particularly remarkable and has been a factor of reducing the production yield of the photovoltaic element.

(Object of the Invention) The object of the present invention is to solve the above-mentioned problems of workability, yield and durability by making the substrate including the transparent conductive layer into a new structure, and yet An object of the present invention is to provide a thin-film photovoltaic element that increases light absorption of a semiconductor layer and can be produced at a high yield while being low in cost suitable for practical use, has high reliability, and has high photoelectric conversion efficiency.

[0011]

The inventors of the present invention have overcome the problems of workability and reliability described above and increase the light absorption of a semiconductor layer, while at the same time exhibiting excellent photo-processability and reliability. In order to obtain a power device, as a result of diligent examination of a new structure and a method for forming a back reflective layer and a transparent conductive layer interposed between the back reflective layer and a semiconductor layer, the photovoltaic device of the present invention having the following constitution It could be achieved by power devices.

That is, the diffuse reflectance of light having a wavelength of 800 nm on the substrate and / or the backside reflecting layer of the photovoltaic device in which the backside reflecting layer, the transparent conductive layer and the photoelectric conversion layer are sequentially laminated on the substrate is 3% or more and 50% or more. A photovoltaic element characterized by the following.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION The structure of a photovoltaic element according to the present invention and a method for manufacturing the same will be described below in more detail with reference to the drawings.

FIG. 1 is an example of a sectional view of a photovoltaic element for explaining the concept of the present invention in detail. However, the present invention is not limited to the photovoltaic device having the configuration of FIG. In FIG. 1, 101 is a substrate, 102 is a back metal reflective layer, 103 is a transparent conductive layer, 104 is an n-type semiconductor layer, 1
05 is an i-type semiconductor layer, 106 is a p-type semiconductor layer, 107 is a transparent electrode, and 108 is a current collecting electrode. FIG. 1 shows a configuration in which light enters from the p-type semiconductor layer side. In the case of a photovoltaic element having a configuration in which light enters from the n-type semiconductor layer side,
Is a p-type semiconductor layer, and 106 is an n-type semiconductor layer.

Further, the substrate 101 and the back metal reflection layer 102
An adhesive layer for improving the adhesiveness of the back metal reflective layer to the substrate may be inserted between the two.

FIG. 2 is an example of a sectional view of a stack type photovoltaic element for explaining the concept of the present invention in detail. The stack type photovoltaic device of the present invention shown in FIG.
It has a structure in which two pin junctions are stacked. 215 is a first pin junction counted from the light incident side, 216 is a second pin junction, and 217 is a third pin junction. These three pin junctions are formed on the substrate 201 on the backside metal reflection layer 2.
02 and the transparent conductive layer 203 are formed and laminated on the transparent conductive layer 203. The transparent electrode 2 is formed on the top of the three pin junctions.
13 and the collecting electrode 214 are formed to form a stacked photovoltaic element. The respective pin junctions are formed by n-type semiconductor layers 204, 207, 210, i-type semiconductor layers 205, 208, 211, p-type semiconductor layers 206,
It consists of 09 and 215. Further, as in the case of the photovoltaic element of FIG. 1, the arrangement of the doping layers and electrodes may be switched depending on the incident direction of light.

The layers of the photovoltaic element of the present invention will be described in detail below in the order of formation.

(Substrate) As a substrate suitable for the present invention, the surface shape of the substrate is controlled in order to suppress the leak current of the photovoltaic element, maintain a high manufacturing yield, and enhance the adhesion with the back surface reflection layer. It is a suitable range for. That is, the surface of the substrate is not a mirror surface and is not formed with pyramid-shaped irregularities, and has an appropriate surface roughness such that the diffuse reflectance of light having a wavelength of 800 nm is 3% or more and 50% or less. Is preferably used. By having such a surface shape on the substrate, the leakage current of the photovoltaic element is suppressed, the adhesion with the back surface reflection layer is enhanced, and the yield of the photovoltaic element manufacturing is improved, and the weather resistance and durability are improved. It is possible to improve the sex. However, when the back surface metal reflective layer has a large film thickness and can form a desired diffuse reflectance, a substrate having a diffuse reflectance other than the above range can also be used.

The material of the substrate may be a single crystalline material or a non-single crystalline material, and they may be electrically conductive or electrically insulating. . Further, they may be light-transmitting or non-light-transmitting, but preferably have a small amount of deformation and distortion and a desired strength. Specifically, Fe, Ni, Cr, Al, Mo, Au,
Metals such as Nb, Ta, V, Ti, Pt, Pb or alloys thereof, for example, thin plates such as brass and stainless steel and composites thereof, and polyester, polyethylene, polycarbonate, cellulose acetate, polypropylene, polyvinyl chloride, polychlorinated Vinylidene, polystyrene, polyamide, polyimide, a film or sheet of a heat-resistant synthetic resin such as epoxy or a composite of these with glass fiber, carbon fiber, boron fiber, metal fiber, etc., and thin plates of these metals, resin sheets, etc. Metallic thin film of different materials and / or SiO ₂ , Si on the surface
Insulating thin film such as ₃ N ₄ , Al ₂ O ₃ , AlN, etc. is sputtered,
Examples thereof include those subjected to surface coating treatment by a vapor deposition method, a plating method, etc., and glass, ceramics and the like. Among the above materials, stainless steel is particularly excellent in workability and durability.

If the substrate is electrically conductive such as metal, it may be used as an electrode for direct current extraction, or if it is electrically insulating such as synthetic resin, the surface on which the deposited film is formed. Al, Ag, Pt, Au, Ni, Ti, M
O, W, Fe, V, Cr, Cu, stainless steel, brass, nichrome, SnO ₂ , In ₂ O ₃ , ZnO, so-called metal simple substance or alloy such as ITO, and plating with transparent conductive oxide (TCO) It is desirable to perform surface treatment in advance by a method such as sputtering to form an electrode for extracting electric current.

Of course, even if the substrate is an electrically conductive one such as metal, the reflectance of long wavelength light on the substrate surface is improved, and mutual diffusion of constituent elements between the substrate material and the deposited film is performed. For the purpose of preventing the above, a different metal layer or the like may be provided on the side of the substrate on which the deposited film is formed.

The substrate may have a plate shape, a long belt shape, a cylindrical shape or the like, and its thickness is appropriately determined so that a photovoltaic element can be formed as desired. When the element is required to have flexibility, or when light is incident from the side of the substrate, it can be made as thin as possible within a range in which the function as the substrate is sufficiently exhibited. However, the thickness is usually 10 μm or more from the viewpoint of manufacturing and handling of the substrate, mechanical strength and the like.

(Backside Reflection Layer) The backside metal reflection layers 102 and 202 used in the present invention are arranged on the backside of the semiconductor layer in the light incident direction, and reflect the light which could not be absorbed by the semiconductor layer back to the semiconductor layer. Has the role of a light reflection layer. It also serves as the back electrode of the photovoltaic element.

The surface roughness of the back metal reflection layer is one of the features of the present invention, and it is not a mirror surface or a pyramid-shaped concavo-convex formed, but the diffuse reflectance of light having a wavelength of 800 nm is Those having an appropriate surface roughness of preferably 3% or more and 50% or less, more preferably 10% or more and 45% or less are suitably used. By such a back metal reflection layer, the adhesion between the back metal reflection layer and the transparent conductive layer is improved, the flexibility and controllability of the manufacturing process of the photovoltaic element are improved, and the metal of the back metal reflection layer is improved. Diffusion is suppressed,
The leak current of the photovoltaic element was reduced, the yield of manufacturing the photovoltaic element was improved, and the weather resistance and durability were improved. In addition, the orientation of the polycrystalline transparent conductive layer is improved, the average grain size of the polycrystalline transparent conductive layer is increased, and the variation in grain size is reduced, resulting in conical or pyramidal holes on the surface of the transparent conductive layer. Has become easier to form. As a result, the scattering of light on the surfaces of the back metal reflective layer and the transparent conductive layer was promoted, and the short-circuit current (Jsc) could be increased.

In a photovoltaic device having a plurality of pin junctions laminated thereon, a short wavelength light is usually absorbed by the pin junction on the light incident side and a long wavelength light is absorbed by the pin junction on the substrate side. Further, the light that could not be absorbed is reflected by this surface reflection layer and returned to the semiconductor layer. Here, it has been found that for long-wavelength light of 800 nm, the device characteristics are improved when the diffuse reflectance of the back surface reflection layer is 3% to 50%.

The surface of the back metal reflection layer has a shape which inherits the surface property of the substrate when the thickness of the back metal reflection layer is reduced to, for example, 0.1 μm or less. Further, when the thickness of the back metal reflection layer is increased to, for example, 1 μm or more, the surface becomes relatively flat.

The material of the back metal reflection layer is gold, silver,
Examples thereof include metals such as copper, aluminum, magnesium, nickel, iron, chromium, molybdenum, tungsten, titanium, cobalt, tantalum, niobium, and zirconium, and alloys such as stainless steel. Among these, metals having high reflectance such as aluminum, magnesium, copper, silver and gold, or alloys containing these high reflectance metals as a main component and other metals or silicon are particularly preferable. By using a metal with a high reflectance, the light that could not be completely absorbed by the semiconductor layer is reflected back to the semiconductor layer with a high reflectance,
The optical path length in the semiconductor layer increases, the light absorption of the semiconductor layer increases, and the short-circuit current (Jsc) of the photovoltaic element increases.

The back metal reflection layer may be formed by laminating two or more kinds of materials.

For forming the back metal reflection layer, various vapor deposition methods such as EB vapor deposition and sputter vapor deposition, various CVD methods, plating methods, printing methods and the like are used.

The method of forming the surface of the back metal reflection layer so as to have the diffuse reflectance in the above range depends on the material of the back metal reflection layer and the film formation method.
It is obtained by appropriately raising the substrate temperature during film formation. Alternatively, the film may be formed by polishing or etching after forming the film. It can also be obtained by forming a backside metal reflective layer on a substrate having a suitable diffuse reflectance.

(Transparent Conductive Layer) The transparent conductive layer 103 is disposed between the back surface metal reflective layer 102 and the semiconductor layer 104 mainly for the following purposes. First, diffuse reflection on the back surface of the photovoltaic element is improved, light is confined in the photovoltaic element by multiple interference by the thin film, the optical path length in the semiconductor layer is extended, and the short-circuit current (Jsc) of the photovoltaic element is increased. To increase. Next, it is necessary to prevent the photovoltaic element from shunting due to diffusion or migration of the metal of the back metal reflection layer which also serves as the back electrode to the semiconductor layer. Further, by providing the transparent conductive layer with a slight resistance value, the back surface metal reflective layer 102 provided with the semiconductor layer sandwiched therebetween.
This is to prevent a short circuit between the transparent electrode 107 and the transparent electrode 107 due to a defect such as a pinhole in the semiconductor layer.

The surface shape of the transparent conductive layer 103 is one of the features of the present invention, and the holes are dispersed. The shape of the holes is preferably conical or pyramidal. By having such a surface shape of the transparent conductive layer, light is effectively confined in the photovoltaic element, and a high short-circuit current (Jsc) is maintained even in a surface area smaller than that of the surface having the conventional pyramid-shaped unevenness. At the same time, it was possible to improve the open circuit voltage (Voc) and the fill factor (FF). Further, the adhesion between the transparent conductive layer and the semiconductor layer was improved, the shunt of the photovoltaic element was prevented, the production yield was improved, and the weather resistance and durability were improved.

Further, the average diameter of the conical or pyramidal holes is d, the average depth is h, the average density is ρ, and the coefficients C ₁ and C ₂ are C ₁ = h / d C ₂ = ρ × d ² , D is preferably 0.05 μm to 2
μm, more preferably 0.1 μm to 1.5 μm, most preferably 0.2 μm to 1 μm.

C ₁ is preferably 0.2 to 0.
It is desirable that it is 9, and more preferably 0.3 to 0.6.

C ₂ is preferably 0.02 to 1.0, more preferably 0.1 to 0.8.

Average diameter d of a conical or pyramidal hole,
By optimizing the coefficients C ₁ and C ₂ in such a range, the effect of further enhancing the effect of the present invention was obtained.

Further, the transparent conductive layer 103 is required to have a high transmittance in the wavelength region which can be absorbed by the semiconductor layer and an appropriate resistivity. Preferably, the transmittance of 650 nm or more is 80% or more, more preferably 85% or more, and optimally 90% or more. Also,
The resistivity is preferably 1 × 10 ⁻⁴ Ωcm or more, 1 × 10
^It is preferably ⁶ Ωcm or less, more preferably 1 × 10 ⁻² Ωcm or more and 5 × 10 ⁴ Ωcm or less.

The material of the transparent conductive layer 103 is In ₂
O ₃ , SnO ₂ , ITO (In ₂ O ₃ + SnO ₂ ), Zn
O, CdO, Cd ₂ SnO ₄ , TiO ₂ , Ta ₂ O ₅ , Bi ₂
A conductive oxide such as O ₃ , MoO ₃ , Na _x WO ₃ or a mixture thereof is preferably used. Further, an element (dopant) that changes the conductivity may be added to these compounds. Of the above materials, ZnO has an appropriate resistance value, and because it has C-axis orientation, it is easy to form conical or pyramidal holes on the surface, and the semiconductor layer It is particularly preferably used due to its durability against plasma and the like during formation.

As the element (dopant) for changing the conductivity, for example, when the transparent conductive layer 103 is ZnO,
Al, In, B, Ga, Si, F, etc., In the case of In ₂ O ₃ , Sn, F, Te, Ti, Sb, Pb, etc., and in the case of SnO ₂ , F, Sb, P, As, In, T
1, Te, W, Cl, Br, I and the like are preferably used.

As the method of forming the transparent conductive layer 103, various vapor deposition methods such as EB vapor deposition and sputter vapor deposition, and various C
A VD method, a spray method, a spin-on method, a dipping method and the like are preferably used.

(Method for Forming Holes on Transparent Conductive Layer Surface) As a method for forming conical or pyramidal holes dispersedly on the surface of the transparent conductive layer 103, when the transparent conductive layer is polycrystalline, There is a method of forming by controlling crystal growth of crystals, or a method of forming a transparent conductive layer and then etching in a vapor phase or a liquid phase.

As a method for controlling the crystal growth of the polycrystal, the surface condition of the back metal reflection layer forming the transparent conductive layer and the film forming conditions of the transparent conductive layer can be mentioned.

The surface state of the back reflection layer has a great influence on the initial state of crystal growth. If the irregularities are too large, the crystal nucleation density becomes too large, and the initial grain size of crystal growth becomes too small. In addition, when the surface of the back reflection layer is a mirror surface, a problem of peeling occurs between the back reflection layer and the transparent conductive layer. Therefore, when the diffuse reflectance of the surface of the back surface reflecting layer at a wavelength of 800 nm is 3% or more and 50% or less, an appropriate crystal nucleation density can be obtained, and a conical or pyramidal shape can be obtained. It is believed to promote crystal growth with the proper orientation to form the holes.

The preferred range of film forming conditions for the transparent conductive layer varies depending on the type of transparent conductive layer and the film forming method. The type and flow rate of gas, internal pressure, input power, film forming rate, substrate temperature, etc. It has a great influence. For example, when forming a ZnO film by DC magnetron sputtering, the gas type is A
R, Ne, Kr, Xe, Hg, O _{2 and the} like can be mentioned. The flow rate varies depending on the size of the apparatus and the exhaust speed, but for example, when the volume of the film forming space is 20 liters, 10 sccm to 100 sccm is desirable. The internal pressure during film formation is 1
It is preferably from ^10-4 Torr to 0.1 Torr. The suitable range of input power varies depending on the material to be formed,
When the size of the target is 15 cm in diameter, 100 W to 1000 W is desirable. In addition, the suitable range of the substrate temperature depends on the film formation rate, but the ZnO film formation rate is 1
When forming a film at μm / h, preferably 70 ° C. to 450
℃, more preferably from 100 ℃ to 350 ℃, optimally 1
It is desirable that the temperature is from 50 ° C to 250 ° C.

As described above, by combining the preferable surface state of the back metal reflection layer and the preferable film forming conditions of the transparent conductive layer, a polycrystal having a small grain size is formed in the vicinity of the interface with the back metal reflection layer. On top of that, polycrystals having a large grain size were formed in a columnar orientation, and conical or pyramidal holes were formed on the surface of the transparent conductive layer.

There is also a method of forming a conical hole or a pyramidal hole by etching in a vapor phase or a liquid phase after forming the transparent conductive layer.

More specifically, in the case of performing in the gas phase, gas etching, plasma etching, ion etching or the like can be used, and the etching gas is CF ₄ ,
C ₂ F ₆ , C ₃ F ₈ , C ₄ F ₁₀ , CHF ₃ , CH ₂ F ₂ , C
l ₂ , ClF ₃ , CCl ₄ , CCl ₂ F ₂ , CClF ₃ , CH
ClF ₂ , C ₂ Cl ₂ F ₄ , BCl ₃ , PCl ₃ , CBr
_{F 3, SF 6, SiF 4} , SiCl 4, HF, O 2, N 2, H
₂ , He, Ne, Ar, Xe and the like or a mixed gas thereof. In the case of plasma etching, the gas pressure is 10 ⁻³ Torr to 1 Torr, and the energy for generating plasma is DC or AC or 1
A high frequency such as an RF wave of 100 MHz or a microwave of 0.1 to 10 GHz can be used.

In the case where the liquid phase is used, examples of the acid include:
Sulfuric acid, hydrochloric acid, nitric acid, carbonic acid, phosphoric acid, hydrofluoric acid, chromic acid,
Sulfamic acid, oxalic acid, tartaric acid, citric acid, formic acid,
Lactic acid, glycolic acid, acetic acid, gluconic acid, succinic acid, malic acid, etc., or those diluted with water, or a mixture thereof can be used. Examples of the alkali include caustic soda, ammonium hydroxide,
Potassium hydroxide, sodium carbonate, sodium bicarbonate, sodium sesquicarbonate, first sodium phosphate, second sodium phosphate, third
Sodium phosphate, sodium pyrophosphate, toke polyphosphate sodium, tetrapolyphosphate sodium, trimetaphosphate sodium,
It is possible to use sodium tetrametaphosphate, sodium hexametaphosphate, sodium orthosilicate, sodium metasilicate, etc., or a mixture thereof diluted with water, or a mixed solution thereof. When etching is performed in a liquid phase, the etching liquid may be heated or energy such as ultrasonic waves may be applied.

Further, an annealing process may be performed after the etching process. When performing the annealing treatment, the annealing is performed in an atmosphere of air, water vapor, nitrogen, hydrogen, oxygen, an inert gas, or another gas at a temperature and time suitable for the material of the transparent conductive layer.

(Photoelectric conversion layer) As a material of the photoelectric conversion layer used in the present invention, a group IV element such as Si, C or Ge is used, or a group IV alloy such as SiGe, SiC or SiSn is used. Those using II-VI group elements such as CdS and CdTe, or CuInS
_{e 2, Cu (InGa) Se} 2, CuInS 2 , etc. I-I
The thing using the II-VI group element is used.

Among the above-mentioned semiconductor materials, a-Si: H (abbreviation of hydrogenated amorphous silicon) and a are the semiconductor materials particularly preferably used for the photovoltaic element of the present invention.
-Si: F, a-Si: H: F, a-SiGe: H, a
-SiGe: F, a-SiGe: H: F, a-SiC:
Examples thereof include group IV and group IV alloy-based amorphous semiconductor materials such as H, a-SiC: F, and a-SiC: H: F, microcrystalline semiconductor materials, or polycrystalline semiconductor materials.

Further, the photoelectric conversion layer can perform valence electron control and forbidden band width control. Specifically, a raw material compound containing an element that becomes a valence electron control agent or a band gap control agent when forming the photoelectric conversion layer is used alone, or the raw material gas for forming the deposited film is mixed with the diluent gas. It may be introduced into the membrane space.

Further, at least a part of the photoelectric conversion layer is p-type and n-type doped by valence electron control to form at least one set of pin junctions. By stacking a plurality of pin junctions, a so-called stack cell structure is formed.

As the method for forming the photoelectric conversion layer, various kinds of CVD such as microwave plasma CVD method, RF plasma CVD method, photo CVD method, thermal CVD method and MOCVD method are used.
Or by various evaporation methods such as EB evaporation, MBE, ion plating, ion beam method, sputtering method, spray method and printing method. As a method industrially adopted, a plasma CVD method in which a source gas is decomposed by plasma and deposited on a substrate is preferably used. Further, as the reaction device, a batch type device, a continuous film forming device, or the like can be used as desired.

The photoelectric conversion layer using a group IV or group IV alloy-based amorphous semiconductor material particularly suitable for the photovoltaic device of the present invention will be described in more detail below.

(1) i-type semiconductor layer (intrinsic semiconductor layer) In particular, in a photovoltaic device using a group IV or group IV alloy-based amorphous semiconductor material, the i-type layer used for the pin junction is On the other hand, it is an important layer for generating and transporting carriers.

As the i-type layer, a layer of only p-type or n-type can be used.

As described above, the group IV and group IV alloy-based non-single-crystal semiconductor materials contain hydrogen atoms (H, D) or halogen atoms (X), which have an important function.

Hydrogen atoms (H, D) or halogen atoms (X) contained in the i-type layer serve to compensate dangling bonds in the i-type layer, and carriers in the i-type layer. It improves the product of the mobility and the life of the. Also p
It has a function of compensating the interface state of each interface of the mold layer / i-type layer and the n-type layer / i-type layer, and has an effect of improving the photovoltaic power, the photocurrent, and the photoresponsiveness of the photovoltaic element. It is. The number of hydrogen atoms and / or halogen atoms contained in the i-type layer is 1 to
40 at% is mentioned as the optimum content. In particular, P
A preferable distribution form is one in which a large amount of hydrogen atoms and / or halogen atoms is distributed on each interface side of the n-type layer / i-type layer and the n-type layer / i-type layer. The preferred range of the content of atoms and / or halogen atoms is 1.1 to 2 times the content in the bulk. Further, it is preferable that the content of hydrogen atoms and / or halogen atoms is changed in accordance with the content of silicon atoms.

Further, in the stack type photovoltaic element, the material of the i-type semiconductor layer of the pin junction close to the light incident side is a material having a wide band gap, and the material far from the light incident side is p.
As a material for the in-junction i-type semiconductor layer, a material having a narrow band gap is preferably used. In the case of having three pin junctions, the respective absorption wavelength peaks are typically 500 nm, 650 nm, and 750 nm from the light incident side.
Before and after.

Amorphous silicon and amorphous silicon germanium are formed by elements that compensate for dangling bonds.
a-Si: H, a-Si: F, a-Si: H: F, a-
SiGe: H, a-SiGe: F, a-SiGe: H:
It is written as F or the like.

Further, it is suitable for the photovoltaic element of the present invention.
The characteristic of the i-type semiconductor layer is the content of hydrogen atoms.
(C_H) Is 1.0 to 25.0%, AM1.5, 100
mW / cm^Two Photoconductivity (σp) under the irradiation of pseudo sunlight
But 1.0 x 10^-7S / cm or more, dark conductivity (σd)
But 1.0 x 10^-9S / cm or less, constant photo
Urback Energy by Current Method (CPM)
But 55 meV or less, the localized level density is 10¹⁷/ Cm^ThreeLess than
The following are preferably used.

(2) p-type semiconductor layer or n-type semiconductor layer As the amorphous material (denoted as a-) or microcrystalline material (denoted as μc-) of the p-type semiconductor layer or n-type semiconductor layer, For example, a-Si: H, a-Si: HX, a-S
iC: H, a-SiC: HX, a-SiGe: H, a-
SiGe: HX, a-SiGeC: H, a-SiGe
C: HX, a-SiO: H, a-SiO: HX, a-S
iN: H, a-SiN: HX, a-SiON: H, a-
SiON: HX, a-SiOCN: H, a-SiOC
N: HX, μc-Si: H, μc-Si: HX, μc-
SiC: H, μc-SiC: HX, μc-SiO: H,
μc-SiO: HX, μc-SiN: H, μc-Si
N: HX, μc-SiGeC: H, μc-SiGeC:
HX, μc-SiON: H, μc-SiON: HX, μ
c-SiOCN: H, μc-SiOCN: HX, etc.
Type valence electron control agents (Group III atoms B, A in the periodic table)
1, Ga, In, TI) and n-type valence electron control agents (group V atoms of the periodic table P, As, Sb, Bi) added in a high concentration are listed as polycrystalline materials (poly-). Is displayed), for example, poly-SiH, poly-S
i: HX, poly-SiC: H, poly-SiC:
HX, poly-SiO: H, poly-SiO: H
X, poly-SiN: H, poly-SiN: HX,
poly-SiGeC: H, poly-SiGeC: H
X, poly-SiON: H, poly-SiON: H
X, poly-SiOCN: H, poly-SiOC
N: HX, poly-SiON: H, poly-SiO
N: HX, poly-Si, poly-SiC, poly
A p-type valence electron control agent for y-SiO, poly-SiN, etc. (Group III atom B, Al, Ga, In, Periodic Table)
TI) and n-type valence electron control agent (group V atom of the periodic table)
A material to which P, As, Sb, Bi) is added at a high concentration can be used.

Particularly, in the p-type layer or the n-type layer on the light incident side,
A crystalline semiconductor layer with little light absorption or an amorphous semiconductor layer with a wide band gap is suitable.

The amount of Group III atoms added to the p-type layer and the amount of Group V atoms added to the n-type layer were 0.
The optimal amount is 1 to 50 at%.

Hydrogen atoms (H, D) or halogen atoms contained in the p-type layer or the n-type layer serve to compensate dangling bonds of the p-type layer or the n-type layer, and the p-type layer or the n-type layer. To improve the doping efficiency. The number of hydrogen atoms or halogen atoms added to the p-type layer or the n-type layer is 0.
The optimum amount is 1 to 40 at%. In particular, when the p-type layer or the n-type layer is crystalline, the optimum amount of hydrogen atoms or halogen atoms is 0.1 to 8 at%. Further, a preferable distribution form is one in which the content of hydrogen atoms and / or halogen atoms is largely distributed on the interface side of each of the p-type layer / i-type layer and the n-type layer / i-type layer. The content of hydrogen atoms and / or halogen atoms is preferably in the range of 1.1 to 2 times the content in the bulk. Thus, the p-type layer / i-type layer and the n-type layer / i
By increasing the content of hydrogen atoms or halogen atoms near each interface of the mold layer, the defect level and mechanical strain near the interface can be reduced, and the photovoltaic power and light of the photovoltaic device of the present invention can be reduced. The current can be increased.

Regarding the electrical characteristics of the p-type layer and the n-type layer of the photovoltaic element, the activation energy is preferably 0.2 eV or less, and most preferably 0.1 eV or less. The non-resistance is preferably 100 Ωcm or less, and most preferably 1 Ωcm or less. Further, the layer thickness of the p-type layer and the n-type layer is 1 to
50 nm is preferred, and 3 to 10 nm is optimal.

Further, examples of the p-type semiconductor layer or the n-type semiconductor layer using the II-VI group element are CdS and CdT.
e, ZnO, ZnSe and the like, I-III-VI
Examples of the use of the group ₂ element include CuInSe ₂ , Cu (I
nGa) Se ₂ , CuInS ₂ , CuIn (Se,
S) ₂ , CuInGaSeTe, and the like.

(3) Method for forming photoelectric conversion layer In order to form a suitable group IV and group IV alloy-based amorphous semiconductor layer as a semiconductor layer of the photovoltaic device of the present invention, a suitable manufacturing method is as follows: It is a plasma CVD method using alternating current or high frequency of RF plasma CVD method or microwave plasma CVD method.

In the microwave plasma CVD method, a material gas such as a raw material gas and a diluent gas is introduced into a deposition chamber (vacuum chamber) which can be depressurized, and the internal pressure of the deposition chamber is kept constant while exhausting with a vacuum pump. The microwave oscillated by the microwave power source is guided by the waveguide and introduced into the deposition chamber through the dielectric window (alumina ceramics etc.) to cause plasma of the material glass to be decomposed and to be deposited in the deposition chamber. This is a method of forming a desired deposited film on the arranged substrate, and the deposited film applicable to the photovoltaic device can be formed under a wide range of deposition conditions.

When the semiconductor layer for the photovoltaic device of the present invention is deposited by the microwave plasma CVD method, the substrate temperature in the deposition chamber is 100 to 450 ° C., and the internal pressure is 0.5 to 30 m.
torr, microwave power 0.01 to 1 W / c
m ³ and the frequency of the microwave are preferably in the range of 0.1 to 10 GHz.

When depositing by the RF plasma CVD method, the substrate temperature in the deposition chamber is 100 to 350 ° C., the internal pressure is 0.1 to 10 torr, and the RF power is 0.001 to 0.001.
5.0 W / cm ² , deposition rate is 0.1-30 Å / se
c is mentioned as a suitable condition.

As a source gas suitable for depositing the group IV and group IV alloy-based amorphous semiconductor layers suitable for the photovoltaic device of the present invention, a gasifiable compound containing silicon atoms,
Examples thereof include a gasifiable compound containing a germanium atom, a gasifiable compound containing a carbon atom, and a mixed gas of the compounds.

A chain or cyclic silane compound is specifically used as the gasifiable compound containing silicon atoms. Specific examples include SiH ₄ , Si ₂ H ₆ and Si.
F ₄ , SiFH ₃ , SiF ₂ H ₂ , SiF ₃ H, Si ₃ H ₈ ,
SiD ₄ , SiHD ₃ , SiH ₂ D ₂ , SiH ₃ D, SiF
D ₃ , SiF ₂ D ₂ , Si ₂ D ₃ H ₃ , (SiF ₂ ) ₅ , (Si
F ₂ ) ₆ , (SiF ₂ ) ₄ , Si ₂ F ₆ , Si ₃ F ₈ , Si ₂ H ₂
F ₄ , Si ₂ H ₃ F ₃ , SiCl ₄ , (SiCl ₂ ) ₅ , Si
Br ₄ , (SiBr ₂ ) ₅ , Si ₂ Cl ₆ , SiHCl ₃ , S
Examples thereof include those in a gas state or those which can be easily gasified, such as iH ₂ Br ₂ , SiH ₂ Cl ₂ , and Si ₂ Cl ₃ F ₃ .

Specific examples of the gasifiable compound containing a germanium atom include GeH ₄ , GeD ₄ , GeF ₄ ,
GeFH ₃ , GeF ₂ H ₂ , GeF ₃ H, GeHD ₃ , Ge
_{H 2 D 2, GeH 3 D} , Ge 2 H 6, Ge 2 D 6 , and the like.

Carbon, oxygen, nitrogen and the like can be cited as the element for expanding the band gap of the i-type semiconductor layer used for forming the first p-type semiconductor layer of the photovoltaic element of the present invention.

Specific examples of the gasifiable compound containing a carbon atom include CH ₄ , CD ₄ , C _n H _{2n + 2} (n is an integer)
C _n H _{2n (n} is an _{integer), C 2 H 2, C} 6 H 6, CO 2, CO , and the like.

As the nitrogen-containing gas, N ₂ , NH ₃ , N
D ₃ , NO, NO ₂ , and N ₂ O.

Oxygen-containing gas includes O ₂ , CO, CO ₂ ,
NO, NO ₂ , N ₂ O, CH ₃ CH ₂ OH, CH ₃ OH and the like.

The substances introduced into the p-type layer or the n-type layer for controlling the valence electrons include Group III atoms and Group III atoms of the periodic table.

The substances effectively used as a starting material for introducing a Group III atom include B ₂ H ₆ , B ₄ H ₁₀ , B ₅ H ₉ , and B ₅ specifically for introducing a boroso atom. H ₁₁ , B
_{6 H 10, B 6 H 12} , B 6 H 14 hydride such as boron, BF _3, B
Examples thereof include halogenated boroso such as Cl ₃ . In addition, AlCl ₃ , GaCl ₃ , InCl ₃ , T
ICl _{3 and the} like can also be mentioned. Particularly, B ₂ H ₆ and BF ₃ are suitable.

What is effectively used as a starting material for introducing a Group V atom is specifically PH for introducing a phosphorus atom.
₃ , hydrogenated phosphorus such as P ₂ H ₄ , PH ₄ I, PF ₃ , PF ₅ , PC
Examples thereof include phosphorus halides such as l ₃ , PCl ₅ , PBr ₃ , PBr ₅ , and Pl ₃ . In addition, AsH ₃ , AsF ₃ , AsC
l ₃ , AsBr ₃ , AsF ₅ , SbH ₃ , SbF ₃ , Sb
F ₅ , SbCl ₃ , SbCl ₅ , BiH ₃ , BiCl ₃ ,
BiBr _{3 and the} like can also be mentioned. Especially PH ₃ , PF ₃
Is suitable.

The compounds capable of being gasified are H ₂ , H
The gas may be appropriately diluted with a gas such as e, Ne, Ar, Xe, or Kr and introduced into the deposition chamber.

In particular, microcrystalline or polycrystalline semiconductors and aS
When depositing a layer having a small light absorption or a wide band gap such as iC: H, the source gas is diluted 2 to 100 times with hydrogen gas, and a relatively high microwave power or RF power is introduced. Is preferred.

(Transparent Electrode) In the present invention, the transparent electrode 10
Reference numeral 7 is an electrode on the light incident side that transmits light, and also serves as an antireflection film by optimizing the film thickness. The transparent electrode 107 is required to have high transparency in the wavelength range in which the semiconductor layer can absorb and low resistivity. Preferably, the transmittance at a wavelength of 550 nm or more is 80% or more, more preferably 8% or more.
It is desirable that it be 5% or more. The resistivity is preferably 5 × 10 ⁻³ Ω / cm or less, more preferably 1 ×.
It is preferably 10 ⁻³ Ω / cm or less. The materials include In ₂ O ₃ , SnO ₂ , and ITO (In ₂ O ₃ + Sn
O ₂ ), ZnO, CdO, Cd ₂ SnO ₄ , TiO ₂ , Ta
A conductive oxide such as ₂ O ₅ , Bi ₂ O ₃ , MoO ₃ , and Na _x WO ₃ or a mixture thereof is suitably used.
Further, an element (dopant) that changes the conductivity may be added to these compounds.

As the element (dopant) for changing the conductivity, for example, when the transparent electrode 107 is ZnO, A
l, In, B, Ga, Si, F, etc., In the case of In ₂ O ₃ , Sn, F, Te, Ti, Sb, Pb, etc., and in the case of SnO ₂ , F, Sb, P, As, In, T
I, Te, W, Cl, Br, I and the like are preferably used.

The surface of the transparent electrode 107 (that is, the surface of the photovoltaic element excluding the surface protective layer) may be flat, but the surface of the transparent electrode 107 may be the same as the surface of the transparent conductive layer. It is more desirable that the conical or pyramidal holes corresponding to the conical or pyramidal holes are formed dispersed over the entire surface. This promotes the scattering of light at the light incident side of the photovoltaic element, particularly at the interface between the semiconductor layer and the transparent electrode above, and the light is scattered at both the light incident side and the back surface side of the semiconductor layer. The optical path length in the semiconductor layer is further extended, light absorption is increased, and the short circuit current (Js
c) was further increased.

As the method for forming the transparent electrode 107, various vapor deposition methods such as EB vapor deposition and sputter vapor deposition, and various C
A VD method, a spray method, a spin-on method, a dipping method and the like are preferably used.

(Collecting Electrode) In the present invention, the collecting electrode 1
08 is formed on a part of the transparent electrode 107 if necessary when the resistivity of the transparent electrode 107 cannot be sufficiently lowered,
It lowers the resistivity of the electrodes and lowers the series resistance of the photovoltaic element. Examples of the material include metals such as gold, silver, copper, aluminum, nickel, iron, chromium, molybdenum, tungsten, titanium, cobalt, tantalum, niobium, and zirconium; alloys such as stainless steel; and powdered metals. Paste and the like. Then, the shape is formed in a branch shape as shown in FIG. 4, for example, so as not to block incident light on the semiconductor layer as much as possible.

In the entire area of the photovoltaic device,
The area occupied by the collecting electrode is preferably 15% or less, more preferably 10% or less, and most preferably 5% or less.

Further, a mask is used for forming the pattern of the collecting electrode, and the forming method is vapor deposition, sputtering,
A plating method, a printing method, or the like is used.

When a photovoltaic device (module or panel) having a desired output voltage and output current is manufactured using the photovoltaic element of the present invention, the photovoltaic element of the present invention is connected in series or The electrodes are connected in parallel, a protective layer is formed on the front surface and the back surface, and output extraction electrodes and the like are attached. At this time, the substrate on which the photovoltaic element is formed may be arranged on another supporting substrate. When the photovoltaic elements of the present invention are connected in series, a diode for preventing backflow may be incorporated.

[0093]

EXAMPLES Hereinafter, the photovoltaic element of the present invention will be described in detail by producing a photovoltaic element and a photodiode made of a non-single crystal silicon semiconductor material, but the present invention is not limited to this. .

Example 1 (Optimum value of diffuse reflectance) A back surface reflecting layer on a stainless steel plate,
A pin-type photovoltaic element having the structure shown in FIG. 1 was prepared using the substrate having the transparent conductive layer formed thereon.

First, the substrate was manufactured.

As shown in Table 1-1, the stainless slab after the rolling treatment is subjected to various treatments such as etching treatment, skin pass treatment, polishing treatment, ultrasonic treatment with acid after photo-annealing or annealing pickling. Appropriately selected so as to obtain the shape and processed, and the thickness shown in Table 1-1 is 0.15 mm, 50 × 5
It was processed into a 0 mm ² SUS plate (not shown).

First, the back reflection layer shown in Table 1-1 was formed using the sputtering apparatus shown in FIG. The acid-treated stainless steel plate 502 is applied to the heater 503 of FIG.
And the deposition chamber 501 was evacuated from the exhaust port connected to the oil diffusion pump. Table 1 shows the temperature of the stainless steel plate.
When the temperature shown in 1 is reached and the pressure reaches 1 × 10 ⁻⁶ Torr, the valve 514 is opened and the mass flow controller 516 is adjusted to adjust the Ar gas to 10 to 50 sccm.
After the introduction, the conductance valve 513 adjusted the pressure to 3 to 10 mTorr. Power supply 506 to -3
DC power of 50 to −450 V or RF power of 200 to 500 W was applied to the target 504 to generate Ar plasma.

When the target shutter 507 was opened and the surface reflection layer shown in Table 1-1 having a layer thickness of 50 to 100 nm was formed on the surface of the stainless steel plate, the shutter was closed to extinguish the plasma and the preparation of the back surface reflection layer was completed. .

Further, a plurality of samples were obtained by appropriately changing the parameters. With respect to the substrate on which the back reflection layer was formed, the diffuse reflectance was partially measured. An integrating sphere is used to measure the diffuse reflectance. The light incident from the opening of the integrating sphere hits the substrate having the back surface reflection layer provided in the opening opposite to and is reflected. The light specularly reflected inside the integrating sphere is absorbed by the black body. The diffusely reflected light reaches the spectrophotometer (Hitachi U40co) installed on the upper part of the integrating sphere, and the wavelength is 800 nm.
The light intensity of is measured. The ratio of the intensity of the diffusely reflected light and the incident light is the diffuse reflectance.

To form the transparent conductive layer, first, Ar gas is introduced into the deposition chamber at 4 to 40 sccm and the substrate temperature is set at 200 to 45.
Sputtering power source 51 at 0 ° C., pressure 5 to 20 mTorr
0 to -350 to -450V DC power or 100 to
RF power of 400 W was applied to the ZnO target 508 to generate Ar plasma.

When the target shutter 511 was opened and a ZnO thin film layer having a layer thickness of 0.5 to 2.0 μm was formed on the reflective layer surface, the shutter was closed to extinguish the plasma. Further, a plurality of samples were obtained by appropriately changing the parameters.

The transparent conductive layer thus obtained is shown in Table 1.
When further surface etching was performed as shown in -1, it was performed as follows.

First, the substrate 522 having a transparent conductive layer formed thereon is brought into close contact with the heater 521 of the etching apparatus shown in FIG. 5B, and the deposition chamber 5 is opened from the exhaust port connected to the oil diffusion pump.
20 was evacuated. When the temperature of the stainless steel plate is stabilized at a desired temperature and the pressure becomes 1 × 10 ⁻⁶ Torr, the valve 524 is opened and the mass flow controller 53 is opened.
2, 533 is adjusted so that the etching gas is 5 to 100 sc
cm, and the pressure was adjusted to 1 to 20 mTorr by the conductance valve 523. DC power of −350 to −450 V from the power source 526 to the electrode 525 or 2
An RF of 00 to 500 W was applied to generate plasma.

After maintaining the plasma for a desired time, the plasma was extinguished and the surface treatment of the back reflection layer was completed. Furthermore, a plurality of samples were obtained by appropriately changing the parameters.

At the stage of forming the transparent conductive layer, the surface shape of a part of each substrate was observed with an electron microscope (SEM). As a result, a sample having conical or pyramidal holes as shown in FIG. 3 was obtained.

Next, an n layer, an i layer and a p layer were sequentially formed on the ZnO thin film layer by the multi-chamber separation type deposition apparatus shown in FIG. a-
The n layer made of Si and the p layer made of μc-Si are RFP.
The i-layer formed by the CVD method and made of a-Si is RFPCV
It was formed by the D method and the MWPCVD method. The production procedure was performed as follows.

First, all the transfer system and the deposition chamber were set to 10 ^-6 T.
A vacuum was drawn on the orr table. The substrate was set on the substrate holder 690 and placed in the load lock chamber 601. The load lock chamber was evacuated to a vacuum degree of 10 ^-3 Torr level by a mechanical booster pump / rotary pump (not shown), switched to a turbo molecular pump and evacuated to 10 ^-6 Torr level. Open the gate valve 606 to open the substrate holder 6
90 was transferred to the n-type layer transfer chamber 602. Gate valve 6
Close 06. The substrate was moved under the substrate heating heater 610, hydrogen gas was caused to flow, the pressure was made to be almost the same as the film formation pressure, and the substrate heating heater 610 was heated to the temperature shown in Table 1-1 and stabilized. Mass flow controller 63
6 to 639, stop valves 630 to 634, 641
The raw material gases shown in Table 1-1 for n-type layer deposition were supplied to the deposition chamber via 644. The RF power shown in Table 1-1 was supplied from the RF power source 622 to the RF introduction cup 620. The n-type layer having the layer thickness shown in Table 1-1 was deposited by the desired deposition time. The supply of the raw material gas for n-type layer deposition was stopped, and a turbo molecular pump was evacuated to a degree of vacuum of the order of 10 ⁻⁶ Torr. The substrate heating heater 610 is raised and the gate valve 607 is opened, and the substrate holder is set to MW-i or RF-i.
After moving to the transfer chamber 603, the gate valve 607 was closed. The substrate is transported under the substrate heating heater 611,
After lowering the substrate heating heater 611 to heat the substrate to the substrate temperatures shown in Table 1-1 to stabilize the substrate, the RF-i layer was deposited. The RF-i layer is supplied to the deposition chamber 618 through the MW-i or RF-i layer deposition gas supply facility (gas supply pipe 649, stop valves 650 to 655, 661 to 665, and mass flow controllers 656 to 660). i
The source gases shown in Table 1-1 for layer deposition were supplied. RF-
The degree of vacuum for depositing the i-layer was adjusted with an exhaust pump so that the degree of vacuum was as shown in Table 1-1. R (not shown) for the bias applying electrode 628
The desired RF power is introduced from the F power source, and RF plasma CV
The RF-i layer was deposited on the n-type layer in the layer thickness shown in Table 1-1 by the D method. The supply of the source gas was stopped, and the deposition chamber was evacuated to the 10 ⁻⁶ Torr level by a turbo molecular pump. At the same time, the substrate temperature was set and maintained at the temperature shown in Table 1-1 suitable for depositing the MW-i layer. Table 1 suitable for deposition of MW-i layer
The source gas indicated by -1 was supplied to the deposition chamber 618 from the gas supply facility for MW-i or RF-i layer deposition. The degree of vacuum in the deposition chamber was maintained at the degree of vacuum shown in Table 1-1 by an exhaust device such as a diffusion pump (not shown). The MW power shown in Table 1-1 was introduced into the deposition chamber 618 from a MW power source (not shown). At the same time, from the RF power source (not shown) to the bias electrode 628, Table 1-
The bias power shown in 1 was introduced. The shutter 650 is opened and M is formed on the substrate by the microwave plasma CVD method of the present invention.
A Wi layer was deposited. Then, the raw material gas shown in Table 1-1 suitable for depositing the MW-i layer is supplied from the gas supply facility for depositing the MW-i or RF-i layer to the deposition chamber 618 to form the MW-i layer having a predetermined layer thickness. After that, the shutter was closed and the MW power was stopped to stop the supply of the raw material gas. The inside of the deposition chamber 618 was evacuated to 10 ⁻⁶ Torr by a turbo molecular pump. RF is deposited on the MW-i layer in the same manner as the deposition of the RF-i layer.
The -i layer was deposited under the conditions shown in Table 1-1. Even after the deposition of the RF-i layer, the deposition chamber was evacuated to the 10 ⁻⁶ Torr level. The substrate heating heater 611 is separated from the substrate, and the gate valve 6
08 is opened and the substrate holder 690 is placed in the p-type layer transfer chamber 604.
Move to The gate valve 608 is closed, the substrate is moved to below the heater 612 for heating the substrate, and the substrate temperature is measured as shown in Table 1.
The substrate temperature shown in -1 is set and stabilized. H ₂ gas was supplied under the conditions shown in Table 1-1, and the RF power shown in Table 1-1 was introduced into the deposition chamber 619 to generate hydrogen plasma. After completing the hydrogen plasma treatment, a gas supply facility for p-type layer deposition (stop valves 670-674, 681-
684, the mass flow controllers 676 to 679), and the p-type layer deposition gas was supplied to the deposition chamber 619. The degree of vacuum in the deposition chamber was adjusted by an exhaust pump (not shown) so as to be the degree of vacuum shown in Table 1-1. RF in the RF introduction cup 621
The power shown in Table 1-1 was introduced from the power supply 623, and the p-type layer was deposited in the layer thickness shown in Table 1-1 by the RF plasma CVD method. The pin structure is formed on the substrate as described above.

Next, after stopping the inflow of gas and continuing to flow H ₂ gas for 5 minutes, the inflow of H ₂ gas was stopped, and the deposition chamber and the gas pipe were evacuated to 1 × 10 ⁻⁵ Torr.
The substrate was moved to the unload chamber 605. After sufficiently cooling the substrate, it was taken out.

Next, as a transparent electrode on the p-layer, as shown in Table 1-
The indium oxide shown in 1 was vacuum deposited by resistance heating vacuum deposition. Then, a mask with a comb-shaped hole is placed on the transparent electrode, and the comb-shaped collector electrode (FIG. 4) made of Cr / Ag / Cr is vacuumed by the electron beam vacuum evaporation method as shown in Table 1-1. It was vapor-deposited. Thus, the production of the photovoltaic device having the configuration of FIG. 1 is completed.

[0110]

[Table 1]

First, the results of the diffuse reflectance measurement on the substrate on which the back surface metal reflective layer is formed are shown.

The value of diffuse reflectance was in the range of 1% to 55% depending on the surface treatment on the stainless steel plate and the conditions for forming the reflective layer.

It was found that the surface of the transparent conductive layer can have various shapes depending on the shape of the stainless steel surface treated, the material and shape of the reflective layer, the film thickness of the transparent conductive layer, the deposition rate, the preparation temperature, and the like. Among them, focusing on conical or pyramidal holes, the holes were classified into those existing on the surface and those not existing.

Next, with respect to the photovoltaic elements produced in Example 1, three pieces were produced for each substrate, and each of the photovoltaic elements was further divided into 10 subcells. The efficiency (photovoltaic power / incident light power) was measured. Subsequently, a light deterioration test and a high temperature high humidity reverse bias (HHRB) deterioration test were performed.

The measurement of the initial photoelectric conversion efficiency can be obtained by setting the photovoltaic element under AM-1.5 (100 mW / cm ² ) light irradiation and measuring the V-1 characteristic.

◇ Photodegradation was measured by using a photovoltaic element whose initial photoelectric conversion efficiency was measured in advance, with a humidity of 50% and a temperature of 5%.
Decrease rate of photoelectric conversion efficiency under AM1.5 light irradiation after being installed in an environment of 0 ° C. and irradiated with AM-1.5 light for 500 hours (photoelectric conversion efficiency after photodegradation test / initial photoelectric conversion efficiency) Went by.

For the measurement of high temperature and high humidity reverse bias (HHRB) deterioration, a photovoltaic element whose initial photoelectric conversion efficiency was measured beforehand was installed in a dark place at a temperature of 80 ° C. and a humidity of 80%. A reverse bias of 0.7 V was applied to and held for 200 hours, and then the rate of decrease in photoelectric conversion efficiency under irradiation with AM1.5 light (HHRB) photoelectric conversion efficiency after deterioration test / initial photoelectric conversion efficiency).

These results are shown in FIG. 8-1, FIG. 8-2, and FIG.
-3. Numerical values are standardized on an arbitrary scale.

As a result of the measurement, with respect to the initial conversion efficiency, good characteristics were obtained when a substrate having a conical or pyramidal hole was used and when the diffuse reflectance on the back surface reflecting layer was 3% or more and 50% or less. Was given. This is mainly an open circuit voltage (Voc),
This is due to the improvement of the fill factor (FF). On the other hand, when the substrate having no conical or pyramidal hole was used, the value was generally lower than that when the hole was present.

Next, regarding the conversion efficiency after the photo-deterioration test, when there is a hole, when the diffuse reflectance on the back surface reflection layer is 3% or less or 50% or more compared to the case where the diffuse reflectance is 3% or more and 50% or less Became low. It is considered that this is due to an increase in series resistance due to peeling when the diffuse reflectance is 3% or less, and a decrease in shunt resistance due to the texture structure when the reflectance is 50% or more.

Regarding the conversion efficiency after the HHRB deterioration test, the same result as the measurement result after the light deterioration test was obtained.

As described above, the light using the substrate of the present invention, in which the diffuse reflectance of the surface of the back surface reflection layer is 3% or more and 50% or less, and the conical or pyramidal holes are dispersed on the surface of the transparent conductive layer It has been found that the photovoltaic element has better properties than conventional photovoltaic elements.

Example 2 (Optimum values of d, C ₁ and C ₂ ) Among the processing conditions for the SUS plate used in Example 1, the conditions for forming the backside metal reflective layer and the conditions for producing the transparent conductive layer, the backside was selected. The condition where the diffuse reflectance of the surface of the metal reflection layer is 3% or more and 50% or less, and the conical or pyramidal holes are present on the transparent conductive layer is selected, the condition is further divided, and another treatment method is added. A substrate was prepared by using the same method as in Example 1, and the photovoltaic having the configuration of FIG. 1 was formed on a substrate (not shown) having a thickness of 0.20 mm and 50 × 50 mm ² shown in Table 2-1. A device was produced.

First, the substrate was manufactured.

The stainless slab was treated under various conditions as shown in Table 2-1 and then subjected to process treatments such as surface etching treatment and polishing. Next, as in the first embodiment, FIG.
The backside metal reflective layer and the transparent conductive layer were formed under the conditions shown in Table 2-1 using the sputtering apparatus shown in FIG.

As with Example 1, part of the substrate on which the transparent conductive layer was formed was subjected to etching treatment on the surface of the conductive layer under the conditions shown in Table 2-1.

A part of the substrate after the above steps was left for evaluation, and the other substrates were formed with semiconductor layers under the conditions shown in Table 2-1 in the same manner as in Example 1.

After that, the substrate was placed in a table shown in Table 2-1 by the CVD apparatus.
A pin type semiconductor layer, an In ₂ O ₃ transparent electrode, and a collector electrode were formed under the conditions shown in 1 to prepare a photovoltaic element.

[0129]

[Table 2]

The photovoltaic element was prepared for each substrate under each condition, further divided into 10 subcells, and then the yield and the initial photoelectric conversion efficiency were examined, the adhesion test, the high temperature and high humidity reverse bias (HHRB). ) Each test of deterioration and deterioration of temperature and humidity was conducted.

◇ Regarding the adhesion test, the photovoltaic element was cut into 10 pieces at intervals of 1 mm in a grid pattern, and 10
After making 0 squares, cellophane adhesive tape was attached, and after sufficient attachment, it was peeled off momentarily, and the area of the peeled portion was evaluated.

For the measurement of temperature / humidity cycle deterioration, the photovoltaic element whose initial photoelectric conversion efficiency was previously measured was measured at a temperature of 80%.
Installed in a dark place at 80 ° C and 80% humidity for 4 hours, then about 9 hours
The temperature is lowered to −30 ° C. over 0 minutes and kept for 30 minutes, and the temperature is returned to 80 ° C. and humidity 80% again over 90 minutes. After repeating this cycle 15 times, the rate of decrease in photoelectric conversion efficiency under AM1.5 light irradiation (photoelectric conversion efficiency after temperature / humidity cycle deterioration test / initial photoelectric conversion efficiency) was used.

First, as in the case of Example 1, the surface shape of the substrate which has been subjected to the steps immediately before the formation of the semiconductor layer was observed, and a conical or pyramidal hole was observed using a stylus type surface roughness measuring instrument. The coefficient C1≡h / d was obtained by examining the average diameter as d (μm) and the average depth as h (μm). In addition, when the surface was observed, the number of conical or pyramidal holes within a range of 50 × 50 μm was checked to find the average density ρ.
Was calculated to obtain the coefficient C2≡ρ × d ² .

As a result, the average diameter d of the cone or pyramid
Was 0.03 to 5 μm.

Therefore, first, the coefficient C1 is applied to the conical or pyramidal holes having an average diameter of 0.03 to 5 μm.
The characteristics of the photovoltaic element were examined for each of the above items regardless of the values of C2 and C2.

The results are shown in Table 2-2. Numerical values are standardized values in each item.

As a result, the conical or pyramidal holes having an average diameter in the range of 0.05 μm to 2 μm were excellent in all characteristics, whereas the average diameter was 0.05.
If the thickness is less than μm, the characteristics are deteriorated due to an increase in series resistance caused by peeling due to adhesion, as in the case where no conical or pyramidal hole is present. In addition, the properties of the conical or pyramidal holes having an average diameter larger than 2 μm decreased due to the decrease of Jsc.

Based on the above results, the coefficients C1 and C2 were examined from the substrates having a conical or pyramidal average diameter in the range of 0.05 μm to 2 μm.

As a result, the coefficient C1 was 0.1 to 1.5, and the coefficient C2 was 0.01 to 1.5.

Then, the initial photoelectric conversion efficiency of the photovoltaic element formed on the substrate having the coefficient in these ranges was examined in the same manner as described above, and the high temperature and high humidity reverse bias (HHR) was used.
B) Deterioration and temperature / humidity deterioration tests were conducted to examine the characteristics.

The results are shown in Table 2-3, Table 2-4 and Table 2-5.
Shown in Numerical values are standardized values in each item.

As a result, when the coefficient C1 is in the range of 0.2 to 0.9 and the coefficient C2 is in the range of 0.02 to 1.0, all the characteristics are excellent, while C1 is 0. Two
Alternatively, when C2 is smaller than 0.02, the characteristic is deteriorated due to the decrease of Jsc, and C1 or C2 is 0.9.
Alternatively, when it is larger than 1.0, the characteristics are deteriorated due to the deterioration of Voc and FF.

As described above, the conical or pyramidal average diameter d of the present invention is 0.05 μm to 2.0 μm, the coefficient C1 is 0.2 to 0.9, and C2.
It has been found that the photovoltaic element using the substrate having a value of 0.02 to 1.0 has excellent characteristics.

[0144]

[Table 3]

[0145]

[Table 4]

[0146]

[Table 5]

[0147]

[Table 6]

Example 3 (Optimum value of diffuse reflectance / roll-to-roll manufacturing method) As in Example 1, a stainless plate was treated to have a length of 100 m, a width of 30 cm, and a thickness of 0.13 mm. Table 3-1
Using the band-shaped SUS sheet shown in
A triple type solar cell of FIG. 2 was produced using a deposition apparatus using the roll method.

First, the SUS sheet was rolled to 0.13 mm by a rolling machine, and after the treatment as shown in Table 3-1 was completed, the back surface metal was prepared by the roll-to-roll method under the conditions shown in Table 3-1. After forming the reflective layer, a part of the substrate was evaluated for reflectance in the same manner as in Example 1, and the other substrate was formed with a transparent conductive layer by a roll-to-roll method, and if necessary, the surface of the transparent conductive layer. The process was performed.

A part of the substrate which has undergone the steps up to this point is left for observing the surface of the substrate, and the other substrates are made into a photovoltaic element under the conditions shown in Table 3-1 by a CVD apparatus using a roll-to-roll method. did.

FIG. 7-a is a schematic view of a continuous photovoltaic device forming apparatus using the roll-to-roll method. This apparatus includes a substrate delivery chamber 710 and a plurality of deposition chambers 701-7.
13 and the substrate winding chamber 730 are sequentially arranged, and they are connected by a separation passage 714. Each deposition chamber has an exhaust port so that the inside can be evacuated.

The strip-shaped substrate 740 is taken up from the substrate delivery chamber to the substrate winding chamber through these deposition chamber and separation passage. At the same time, the gas can be introduced from the gas inlets of the deposition chambers and the separation passages, and the gas can be exhausted from the respective exhaust ports to form the respective layers. A halogen lamp heater (not shown) that overheats the substrate from the back side is installed inside each deposition chamber, and each deposition chamber is heated to a predetermined temperature. In addition, an RF electrode 71 is provided in each deposition chamber.
7 or a microwave applicator 718 is attached, and a raw material gas supply device (not shown) is connected to the raw material gas inlet 715. A bias electrode 720 is arranged in the deposition chambers 703 and 707 which are the deposition chambers of the MW-i layer, and an RF power source (not shown) is connected as a power source. The substrate delivery chamber has a delivery roll 721 and a guide roller 722 for applying an appropriate tension to the substrate and always keeping the substrate horizontal. The substrate take-up chamber has a take-up roll 723 and a guide roller 724.

FIG. 7-b is a view of the deposition chambers 701 to 713 as seen from above. Each deposition chamber has a source gas inlet 715 and an exhaust port 716, and the exhaust port has an oil diffusion pump mechanical booster pump or the like. A vacuum pump (not shown) is connected.

First, the above-mentioned SUS430BA sheet was wound around a delivery roll 721 (average curvature radius 30c
m), it is set in the substrate delivery chamber 710, and after passing through each deposition chamber, the end of the substrate is wound around the substrate winding roll 723. Evacuate the entire device with a vacuum pump,
The lamp heater in each deposition chamber is turned on to set the substrate temperature in each deposition chamber to a predetermined temperature. Scavenging gas inlet 7 when the pressure of the whole device falls below 1 mTorr
The scavenging gas as shown in FIG. 7A is introduced from 19 and the substrate is wound in the winding roll while moving in the direction of the arrow in the figure. Each raw material gas is made to flow into each deposition chamber. At this time, the flow rate of the gas flowing into each separation passage or the pressure of each deposition chamber is adjusted so that the raw material gas flowing into each deposition chamber is not diffused into another deposition chamber. Then R
F power, or MW power and RF bias power were introduced to generate plasma, and the first p was generated under the conditions shown in Table 6-1.
n1 layer in the deposition chamber 701 as an in-junction, deposition chamber 702,
An i1 layer is deposited in 703 and 704, a p1 layer is deposited in a deposition chamber 705, an n2 layer is deposited in the deposition chamber 706 as a second pin junction, an i2 layer is deposited in the deposition chambers 707, 708 and 709, and a p2 layer is deposited in a deposition chamber 710. , Deposition chamber 711 as a third pin junction
At the n3 layer, the deposition chamber 712 at the i3 layer, and the deposition chamber 713 at the p3 layer
The layers were deposited to form a photovoltaic device consisting of three layers of pin junctions.

When the winding of the substrate was completed, all the MW power source, RF power source and plasma were extinguished, and the inflow of the source gas and the scavenging gas was stopped. The entire device was leaked, and the take-up roll was taken out.

Next, a transparent electrode 213 was formed on the three-layer pin junction using the reactive sputtering apparatus under the conditions shown in Table 3-1.

Next, a wire grid consisting of a silver clad layer and a carbon layer using a urethane resin as a binder is formed around the copper wire on the transparent electrode 213 by heat fusion to form a current collecting electrode in a roll shape. 250m solar cell
It was cut into a size of mx 100 mm.

As described above, the production of a triple type solar cell using the roll-to-roll method was completed.

[0159]

[Table 7]

First, the result of the diffuse reflectance measurement on the substrate on which the back surface metal reflective layer is formed is shown as in Example 1.

The value of diffuse reflectance was in the range of 2% to 55% depending on the surface treatment on the stainless steel plate and the material of the reflecting layer.

As in Example 1, the surface of the transparent conductive layer may have various shapes depending on the shape of the stainless steel surface, the material and shape of the reflective layer, the film thickness of the transparent conductive layer, the deposition rate, the forming temperature, and the like. all right. Also, as in Example 1, focusing on the conical or pyramidal holes, the holes were classified into those existing on the surface and those not existing.

Next, with respect to the photovoltaic element prepared in Example 3, three pieces were prepared for each substrate and further divided into 10 subcells for all the photovoltaic elements. Conversion efficiency (photovoltaic power / incident light power)
Was measured. Subsequently, a light deterioration test and a high temperature high humidity reverse bias (HHRB) deterioration test were performed.

These results are shown in FIG. 9-1, FIG. 9-2, and FIG.
-3. Numerical values are standardized on an arbitrary scale.

As a result of the measurement, when the substrate having the conical or pyramidal holes is used for the initial conversion efficiency as in Example 1, the diffuse reflectance on the back surface reflecting layer is 3% or more and 50% or more.
Good characteristics were obtained in the following cases. This is mainly due to improvement in open circuit voltage (Voc) and fill factor (FF). In addition, when a substrate having no conical or pyramidal hole was used, the value was generally lower than that when a hole was present.

Next, regarding the conversion efficiency after the photo-deterioration test, when there is a hole, when the diffuse reflectance on the back surface reflection layer is 3% or less or 50% or more compared to the case where the diffuse reflectance is 3% or more and 50% or less. Became low. It is considered that this is due to an increase in series resistance due to peeling when the diffuse reflectance is 3% or less, and a decrease in shunt resistance due to the texture structure when the reflectance is 50% or more.

Regarding the conversion efficiency after the HHRB deterioration test, the same result as the measurement result after the light deterioration test was obtained.

As described above, the light using the substrate of the present invention, in which the diffuse reflectance on the surface of the back surface reflection layer is 3% or more and 50% or less, and the conical or pyramidal holes are dispersed on the surface of the transparent conductive layer, It has been found that the photovoltaic element has better properties than conventional photovoltaic elements.

Example 4 The pin solar cell of FIG. 1 was produced in the same manner as in Example 1 except that the back surface reflection layer was changed from Al to Cu.

The diffuse reflectance value was in the range of 2% to 70%.

When the initial photoelectric conversion efficiency, the conversion efficiency after the photodegradation test and the conversion efficiency after the HHRB deterioration test were measured in the same manner as in Example 1, the diffuse reflectance of the surface of the back reflective layer was 3%.
% To 50%, a photovoltaic element using a substrate in which conical or pyramidal holes are dispersed on the surface of a transparent conductive layer may have characteristics superior to those of conventional photovoltaic elements. Do you get it.

Example 5 The back reflection layer is made of Al to AlS.
1 (p of FIG. 1) in the same manner as in Example 1 except that the two-layer structure of i (10 to 100 nm, substrate temperature RT to 100 ° C.) and Al (50 to 100 nm, substrate temperature RT to 150 ° C.) was used.
An in-type solar cell was produced.

The diffuse reflectance value was in the range of 1% to 75%.

The initial photoelectric conversion efficiency, the conversion efficiency after the light deterioration test and the conversion efficiency after the HHRB deterioration test were measured in the same manner as in Example 1, and the diffuse reflectance of the surface of the back reflection layer was 3
% To 50%, a photovoltaic element using a substrate in which conical or pyramidal holes are dispersed on the surface of a transparent conductive layer may have characteristics superior to those of conventional photovoltaic elements. Do you get it.

[0175]

According to the inventions of claims 1 to 14, the following effects can be obtained.

Due to the moderately rough surface, the adhesion between the back reflective layer and the transparent conductive layer was improved. On the other hand, unlike the pyramid-type texture structure, the contact area between the back surface reflection layer and the transparent conductive layer is not too large, so diffusion of the metal in the back surface reflection layer (migration) can be suppressed, and the metal and the components of the transparent conductive layer It was possible to suppress the reaction and prevent a decrease in reflectance. This effect is remarkable in the case of aluminum which is preferably used as the back surface reflection layer. In addition, compared with the case where the back surface reflection layer is a mirror surface, the reaching light is diffused and reflected, so that the optical path length is extended and the incident light can be effectively used.

As a result, the series resistance was lowered, the leak current was reduced, the short-circuit current, the open circuit voltage and the fill factor were improved, and high conversion efficiency was obtained. Further, the controllability and the degree of freedom of the manufacturing process were improved, and at the same time, the high yield could be maintained. Further, as a result of the high temperature and high humidity cycle test, the salt water test, etc., the weather resistance was improved. Further, durability was improved as a result of mechanical strength tests such as a scratch test and a bending test.

Further, by using stainless steel as the substrate, it was easy to form the back surface reflection layer having a preferable diffuse reflectance.

Further, since holes are formed also on the surface of the photovoltaic element, the scattering of light at the interface between the photoelectric conversion layer and the upper transparent electrode is promoted, and the light is incident on the light incident side of the photoelectric conversion layer. Light was scattered on both the back surface side, the optical path length in the photoelectric conversion layer was further extended, the light absorption was increased, and the short-circuit current was further increased.

Further, by using zinc oxide as the transparent conductive layer, the transparent conductive layer has an appropriate resistance value, and the current flowing in the defective region of the photoelectric conversion layer is reduced, so that the photovoltaic element shunts. And the production yield was improved. Further, due to the C-axis orientation of zinc oxide, it became easy to form conical or pyramidal holes on the surface.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of a layer structure of a photovoltaic element of the present invention.

FIG. 2 is a diagram showing an example of a layer structure of the photovoltaic element of the present invention.

FIG. 3 a. b. c. d is an example of an electron micrograph of the transparent conductive layer thin film of the substrate of the photovoltaic element of the present invention.

FIG. 4 is a view showing a collecting electrode of the photovoltaic element of the present invention.

FIG. 5a is a diagram schematically showing a sputtering apparatus suitable for depositing the back surface reflection layer of the photovoltaic element of the present invention. FIG. 3b is a diagram schematically showing an etching apparatus suitable for processing the back surface reflection layer of the photovoltaic element of the present invention.

FIG. 6 is a diagram schematically showing a deposited film forming apparatus suitable for producing the photovoltaic element of the present invention.

FIG. 7 a is a diagram schematically showing a roll-to-roll type deposited film forming apparatus suitable for producing the photovoltaic element of the present invention. FIG. 3b is a schematic view of a roll-to-roll type deposited film forming apparatus suitable for producing the photovoltaic element of the present invention, viewed from above.

FIG. 8 is a graph showing the relationship between the initial conversion efficiency and the diffuse reflectance in the present invention used in Example 1 and the conventional photovoltaic device. 2 is a graph showing the relationship between the efficiency and the diffuse reflectance after the photodegradation test in the present invention used in Example 1 and the conventional photovoltaic device. 3 is Example 1
H in the present invention used in
It is a graph showing the relationship between the efficiency and the diffuse reflectance after the HRB deterioration test.

FIG. 9 is a graph showing the relationship between the initial conversion efficiency and the diffuse reflectance in the photovoltaic device of the present invention used in Example 3 and the conventional photovoltaic device. 2 is a graph showing the relationship between efficiency and diffuse reflectance after a photodegradation test in the present invention used in Example 3 and a conventional photovoltaic device. 3 is Example 3
H in the present invention used in
It is a graph showing the relationship between the efficiency and the diffuse reflectance after the HRB deterioration test.

[Explanation of symbols]

101, 201 Substrate 102, 202 Backside metal reflective layer 103, 203 Transparent conductive layer 104, 204, 207, 210 n-type semiconductor layer 105, 205, 208, 211 i-type semiconductor layer 106, 206, 209, 212 p-type semiconductor layer 107, 213 Transparent electrode 108, 214 Current collecting electrode 501, 520 Processing chamber 502, 522 Substrate 503, 521 Heater 504, 508 Target 506, 510, 526 Power supply 525 Electrode 507, 511 Shutter 512, 529 Pressure gauge 513, 523 Conductance valve 514, 515, 524, 527, 528, 530, 5
31 supply valve 516, 517, 532, 533 mass flow controller 600 deposition device 601 load lock chamber 602, 603, 604 transfer chamber 605 unload chamber 606, 607, 608, 609 gate valve 610, 611, 612 substrate heating heater 613 substrate transfer Rails 631 to 634, 641 to 644, 651 to 655, 6
61-666, 671-674, 681-684 Stop valve 636-639, 656-660, 676-679 Mass flow controller 617, 618, 619 Deposition chamber 620, 621 Electrode 622, 623, 624 RF power supply 628 Bias electrode 649 Gas supply Tube 650 Shutter 729 Feeding chamber 730 Winding chamber 701-713 Deposition chamber 714 Separation passage 715 Raw material gas inlet 716 Exhaust outlet 717 RF electrode 718 Microwave applicator 719 Scavenging gas inlet 720 Bias electrode 721 Sending roll 722, 724 Guide roller 723 Winding roll roll

Claims (11)

[Claims] 1. A diffuse reflectance of light having a wavelength of 800 nm of the substrate and / or the back surface reflection layer of a photovoltaic element in which at least a substrate, a back surface reflection layer, and a photoelectric conversion layer are sequentially laminated, is 3%.
It is 50% or more and 50% or less, and the photovoltaic element comprises at least silicon and germanium. 2. The photovoltaic element according to claim 1, wherein a transparent conductive layer is provided between the back surface reflection layer and the photoelectric conversion layer, and the transparent conductive layer has a hole on the surface thereof. 3. The photovoltaic element according to claim 2, wherein the transparent conductive layer contains zinc oxide. 4. The photovoltaic element according to claim 1, wherein the substrate is made of stainless steel. 5. The photovoltaic element according to claim 1, comprising at least one selected from gold, silver, copper, aluminum and magnesium. 6. The photovoltaic element according to claim 1, wherein the back surface reflection layer further contains silicon. 7. The photovoltaic element according to claim 1, wherein the back surface reflection layer has a structure in which a plurality of layers are laminated. 8. The photovoltaic element according to claim 2, wherein holes are further formed on the surface of the photoelectric conversion layer. 9. The photovoltaic element according to claim 1, wherein the photoelectric conversion layer has a plurality of pin junctions. 10. The photovoltaic element according to claim 1, wherein at least the pin junction closest to the substrate among the plurality of pin junctions contains germanium. 11. The photovoltaic element according to claim 1, wherein the photoelectric conversion layer is made of a non-single crystal semiconductor.