JPH09214261A - Power amplifier circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the power amplifier circuit increasing a maximum output power while avoiding adverse effect on other circuit such as a tuner. SOLUTION: In the power amplifier circuit having a push-pull output circuit, NPN TRs are employed for output transistors (TRs) Q2, Q5 for a push-side 1 and a pull-side 2 of the push-pull output circuit and the power amplifier circuit is provided with a boosting circuit boosting a power supply voltage and a changeover means SWO applying selectively a voltage generated in the boosting circuit 3 or the usual power supply voltage to a pre-stage circuit supplying a base current of the push-side output TR Q2. The changeover means SWO is switched by a mode control signal or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique effectively applied to a power amplifier circuit integrated into a semiconductor integrated circuit, and further to a power amplifier circuit having a push-pull type output circuit. For example, it is used for a power amplifier circuit for audio equipment. And about effective technology.

[0002]

2. Description of the Related Art Power amplifiers for audio equipment mounted on automobiles are strongly required to have high output specifications, but since the power source is obtained from a 12-volt automobile-mounted battery, conventional general acoustic A power amplifier circuit for equipment cannot obtain a sufficiently high output. As one of the techniques for obtaining a high output by using this limited power supply voltage, for example, as shown in FIG. 5, push driving is performed by a PNP transistor Q2 ′ and pull driving is performed by an NPN transistor Q5. There is a method using a push-pull type output circuit. This method is one of the characteristics of the bipolar transistor, which is the voltage V generated between the base and the emitter.
There is an advantage that high output can be obtained without loss of output power due to BE. However, when a power amplifier circuit having such an output circuit is integrated into a semiconductor integrated circuit, the NPN transistor is generally a vertical transistor, whereas
Since the NP transistor is a lateral transistor, it has a large area on the chip and is disadvantageous in terms of high integration.

A bootstrap circuit as shown in FIG. 6 can be considered as another method for increasing the output of the power amplifier circuit. Since this method can obtain a voltage higher than the power supply voltage, there is an advantage that even if an NPN transistor is used for push drive, a decrease in output power due to VBE can be prevented and a high output can be obtained. However, one power amplifier circuit requires one large capacitor (100 μF or more), and it is difficult to embed such a large-capacity capacitor in a semiconductor integrated circuit. Therefore, the disadvantage is that it must be an external component. have. as a result,
In the case of a multi-channel IC in which a plurality of power amplifier circuits are integrated in one chip, the number of external parts and terminals (pins) for connecting them are increased.

The present inventors have examined a method of incorporating a booster circuit such as a charge pump as a method of eliminating the increase in the number of parts. According to this method, since the booster circuit is operated by the high-frequency clock signal that is unrelated to the input signal of the power amplifier circuit, it is possible to supply the voltage from one booster circuit to the plurality of power amplifier circuits. The advantage is that the increase in the number of external parts can be suppressed.

[0005]

However, it has been clarified that the following problems occur in the power amplification circuit using the booster circuit.

That is, in a semiconductor integrated circuit device, the booster circuit is generally configured to perform a chopping operation with a clock having a short cycle in order to have a large power supply capability by using a relatively small capacity. However, this chopping operation causes noise with a high frequency that is several times the clock frequency.

On the other hand, most of the audio equipment mounted on automobiles and the portable audio equipment have a built-in tuner capable of receiving weak radio waves such as AM and FM radio, and the high frequency generated by the booster circuit is applied to this tuner. When noise enters through power wiring or radiation, it causes an obstacle such as a beat sound. Incidentally, it is generally known that a shield is effective as a method for suppressing such a jump in of high frequency noise. However, since it is necessary to radiate heat in a device with large power loss such as a power amplifier, it is difficult to provide a shield.

An object of the present invention is to provide a power amplifier circuit capable of increasing the maximum output power while avoiding adverse effects on other circuits such as a tuner.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

The outline of a typical invention among the inventions disclosed in the present application is as follows.

That is, in a power amplifier circuit having a push-pull type output circuit, both push-side and pull-side output transistors constituting the push-pull type output circuit are N transistors.
A booster circuit that is composed of a PN transistor and that generates a boosted voltage from the power supply voltage, and a voltage formed by this booster circuit or a normal power supply voltage is selected as a pre-stage circuit that supplies the base current of the push-side output transistor. And a switching means for supplying the electric power is provided, and the switching means is switched by a mode control signal or the like.

As a result, in an audio device having a built-in power amplifier circuit, an AM or FM in which a tuner operates
In the broadcast receiving mode, the booster circuit is stopped and the normal power supply voltage is supplied to the preceding circuit by the switching means, and the booster circuit is operated in the reproducing mode of the CD (compact disk) or the magnetic tape in which the tuner does not operate. By supplying the voltage to the preceding circuit, the same operation as that of the conventional power amplifier circuit can be performed at the time of receiving the AM or FM broadcast to prevent the trouble such as the beat sound due to the noise, and at the time of the CD reproduction or the magnetic tape. A large maximum output power can be obtained during reproduction.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of a main part of an embodiment in which the power amplifier circuit according to the present invention is applied to an acoustic amplifier.

The power amplifier circuit of this embodiment has a power supply voltage V
A push-pull type output circuit including NPN transistors Q2 and Q5 connected in series between cc and the ground point is provided. An NPN transistor Q1 that forms a Darlington circuit together with Q2 is connected to the preceding stage of the push-side transistor Q2 that forms the push-pull type output circuit. A constant current source I1 is connected between the base and collector of the transistor Q1, and an input terminal Vin is connected to the base of Q1 via diodes D1 and D2 for level shifting. The push drive circuit 1 is composed of the transistors Q1 and Q2, the constant current source I1, and the diodes D1 and D2.

On the other hand, a PNP transistor Q4 forming an inverted Darlington circuit together with Q5 is connected to the preceding stage of the pull-side transistor Q5 forming the push-pull output circuit. The input terminal Vin is connected to the base of the transistor Q4, and
An NPN transistor Q3 is connected between the emitter of Q4 and the power supply voltage Vcc, and the base of Q3 and the power supply voltage Vc are connected.
There is a constant current source I2 between C and the base of Q3 and Q5.
A diode D for level shifting between the collector of
3 and D4 are connected, and transistors Q3, Q4 and
The pull drive circuit 2 is composed of Q5, the constant current source I2, and the diodes D3 and D4.

Further, in this embodiment, the booster circuit 3 including a charge pump or the like and the power supply voltage terminal Vcc can be selectively connected to the collector of the transistor Q1 via the changeover switch SW0. The voltage Vp formed by the booster circuit 3 is set to a voltage higher than the power supply voltage Vcc by 2VBE or more. The change-over switch SW0 is configured to be changed over by the mode control signal MC or the like, and the booster circuit 3
Also, the mode control signal MC is configured to be in an operating state or a non-operating state.

The maximum output power in the power amplifier circuit of this embodiment is determined by the saturation voltage on the push side and the saturation voltage on the pull side. Since an inverted Darlington circuit composed of a PNP transistor Q4 and an NPN transistor Q5 is provided on the pull drive side, that is, the ground potential side, the base-emitter voltage VBE of each transistor is canceled out, and the input voltage and the output voltage are output. The voltage is maintained at almost the same potential up to near the ground potential to operate. Therefore, the saturation voltage on the pull side has a value close to the ground potential.

On the other hand, on the push side, that is, on the side of the power supply voltage Vcc, since the NPN transistors Q1 and Q2 are Darlington connected, a voltage drop corresponding to 2VBE occurs from the collector of Q1 to the emitter of Q2.
Therefore, when the switch SW0 is connected to the power supply voltage Vcc side, the collector potential of Q1 is Vcc, the saturation voltage is Vcc-2VBE, and 2VBE is the maximum output power loss. On the other hand, when the changeover switch SW0 is connected to the booster circuit 3 side, the collector potential of Q1 is V
Since the voltage drop loss due to VBE of Q1 and Q2 can be canceled out, the saturation voltage of the output on the Vcc side becomes Vp-2VBE (> Vcc).

An element such as a MOSFET can be used as the changeover switch SW0, and an AM or FM broadcast receiving mode in which a tuner operates, or a CD reproduction or magnetic field in which the tuner does not operate as a mode control signal MC. A signal for selectively specifying the tape reproduction mode is used.

FIG. 2 shows the configuration of a suitable acoustic device using the power amplifier circuit of the present invention. In FIG.
11 is a CD player, 12 is an FM tuner, and 13 is an AM
Tuners, 14 and 15 are power amplifier circuits to which the present invention is applied, 16 is a speaker, and 17 is a changeover switch for selectively transmitting the output signals of the CD reproducing device 11 and tuners 12 and 13 to the power amplifier circuits 14 and 15. , 18 are control circuits for the entire audio equipment. Although not particularly limited, in this embodiment, the output signals from the CD reproducing device 11 and the tuners 12 and 13 are configured to be input as differential signals to the power amplifier circuits 14 and 15, respectively, whereby the speaker 16 is configured. Each power amplifier circuit is driven with an amplitude twice as large as that of the power amplifier circuit to obtain a large amplification factor. Moreover, in this embodiment, the power amplifier circuits 14 and 15 are provided for four channels, and the booster circuit 3 is provided as a circuit common to these power amplifier circuits.

The control circuit 18 outputs the mode control signal MC to selectively operate the CD reproducing device 11 and the tuners 12 and 13, and switches the changeover switch 17 to output the output signal from the desired device to the power amplifier circuit 14. , 15
To be transmitted. Further, the mode control signal MC controls the booster circuit 3 to stop its operation in the AM or FM broadcast reception mode.
As a result, it is possible to prevent noise that accompanies the operation of the booster circuit 3 from entering the tuner and producing a beat sound or the like.

FIG. 3 shows a second power amplifier circuit according to the present invention.
The circuit diagram of the embodiment of FIG.

The basic configuration of the power amplifier circuit of this embodiment is almost the same as that of the first embodiment of FIG. The circuit of the second embodiment differs from the circuit of the first embodiment in that the voltage Vp of the booster circuit 3 and the power supply voltage Vcc are switched by the voltage switch SW0 in the first embodiment. In the second embodiment, the current is switched. In addition, in FIG. 2, the elements and circuits denoted by the same reference numerals as those shown in FIG. 1 indicate the same elements and circuits.

In this embodiment, the constant current source I1 in the embodiment of FIG. 1 is shown as a current mirror circuit. That is, Q7 of the PNP transistors Q6 and Q7 whose bases are commonly connected to form the current mirror circuit in FIG. 3 corresponds to the constant current source I1 in the circuit of FIG. The transistor Q6 is diode-connected with its base and collector coupled.
Note that Q21 and Q22 are PNP transistors corresponding to the constant current source I2 in the embodiment of FIG. 1, and are connected to transistors Q6 and Q8, which will be described later, to form a current mirror circuit, respectively.

Further, in this embodiment, the transistors Q6 and Q7 whose emitters are connected to the power supply voltage terminal Vcc to form a current mirror circuit, the NPN transistor Q1 whose base is connected to the collector of Q7, and the base of Q1. A circuit 4 including level shift diodes D1 and D2 connected between the input terminals Vin, and a transistor having the same circuit configuration as the circuit 4 and whose power supply voltage terminal is connected to the output terminal of the booster circuit 3 instead of Vcc. Q8, Q9,
A circuit 5 comprising Q10 and diodes D5, D6,
A differential current switching circuit 6 composed of a pair of NPN transistors Q11 and Q12 whose emitters are commonly connected to each other and a constant current source I3 which is connected to their common emitters.
Are provided.

The collector of the transistor Q6 forming the circuit 4 is the collector of the transistor Q12 forming the differential current switching circuit 6, and the collector of the transistor Q8 forming the circuit 5 is the differential current switching circuit. 6 is connected to the collectors of the transistors Q11, and the transistor Q1
The mode control signal MC and the reference voltage Vref are input to the base terminals of 1 and Q12, respectively.

Therefore, in the circuit of this embodiment, when the control signal MC has a positive value (MC> Vref), the transistor Q11 is turned on and the current of the constant current source I3 becomes Q.
11 and Q8, and transistors Q12 and Q
No current flows through 6. As a result, transistor Q1 is deactivated and Q10 is activated,
The circuit is driven by the voltage Vp of the booster circuit 3 and outputs Vcc.
The saturation voltage on the side is Vp-2VBE (> Vcc).

On the other hand, the control signal MC has a negative value (MC <Vre
In the case of (f), the transistor Q12 is turned on so that the current of the constant current source I3 flows through Q12 and Q6, and the current does not flow through the transistors Q11 and Q8. As a result, transistor Q10 is deactivated and Q1
Is activated, the circuit is driven by the original power supply voltage Vcc. At this time, since the operation of the booster circuit 3 is stopped by the control signal MC, it is possible to prevent the noise accompanying the operation of the booster circuit 3 from entering the tuner and generating a beat sound or the like.

Further, in this embodiment, the constant current source I2 is connected to the transistors Q6 and Q8 so as to form a current mirror circuit, respectively, and transistors Q21 and Q2 are connected.
Since it is configured by 2, the current is passed through Q21 of Q21 and Q22 when the current is flowing through the transistor Q6, and the current is passed through Q22 when the current is flowing through the transistor Q8. . As a result, the pull side drive circuit is operated with the optimum current I2 in both the mode operated by the power supply voltage Vcc and the mode operated by the voltage of the booster circuit 3.

In FIG. 3, the transistor Q10
A transistor Q23 connected in parallel with is a current monitoring transistor provided corresponding to a specific example of the booster circuit 3 described below, and makes the driving force of the booster circuit 3 variable according to the amplitude of the output voltage Vout. It is for doing. That is, the power amplifier circuit of this embodiment has the output voltage Vout.
When the amplitude of the output voltage Vout is large, it is necessary to increase the voltage supply capacity of the booster circuit 3. However, when the amplitude of the output voltage Vout is small, the voltage supply capacity of the booster circuit 3 may be small. Therefore, in this embodiment, the current flowing in the push side drive circuit is monitored and fed back to the booster circuit 3 to change its voltage supply capability. Specifically, a monitoring transistor Q23 is connected in parallel with the transistor Q10, a PNP transistor Q24 is connected between the collector of the transistor Q23 and the power supply voltage Vcc, and a PNP forming a current mirror circuit with the transistor Q24. A transistor Q25 is provided and its collector current is supplied to the booster circuit 3 as a feedback current If.

FIG. 4 shows a specific circuit example of the booster circuit 3.

The booster circuit of this embodiment has a power supply voltage terminal V
transistors QD1 and QD2 connected in series between cc and terminal T1, a capacitor C1 connected between terminal T1 and a ground point, and a series connection between power supply voltage terminal Vcc and a ground point. Transistor Q31, Q32, Q
33, and a capacitor C2 connected between a connection node n1 of the transistors Q31 and Q32 and a connection node n2 of the transistors D11 and D12. The bases and the emitters of the transistors QD1 and QD2 are coupled to each other to function as a diode.
The capacitors C1 and C2 are both connected to external terminals T1 and T2, T3 as external parts, the capacitor C2 acts as a smoothing capacitor, and the charging voltage thereof is supplied to the power amplification circuit of FIG. 3 as a boost voltage Vp.

A transistor Q34 forming a current mirror circuit is connected to the base terminal side of the transistor Q31, and the emitter of the transistor Q34 is the base of the transistor Q32 and the node n1.
The collector of Q34 is also connected to the collector of a PNP transistor Q41 that forms a current mirror circuit 31 together with the transistor Q40. The emitter terminal of the transistor Q32 has a PNP
The emitter of transistor Q35 is connected and this emitter is connected to the collector of the current mirror transistor Q41.

On the other hand, a transistor Q36 forming a current mirror circuit is connected to the base terminal side of the transistor Q33, the emitter of this transistor Q36 is connected to the ground point, and the collector is a current mirror circuit like the transistor Q41. PNs that make up 31
It is connected to the collector of the P-transistor Q43. A switching transistor Q37 having a base to which the clock signal CLK is input is connected between the collector of the current mirror transistor Q43 and the grounding point. Further, the base terminal of the transistor Q35 is connected to Q40 like the transistors Q41 and Q43.
Is connected to the emitter of a PNP transistor Q42 which forms the current mirror circuit 31, and
A resistor R1 and a reverse direction Zener diode Dz are connected in series between the collector of 42 and the ground point, and a limiter circuit 32 is constituted by the resistor R1, the Zener diode Dz and the transistor Q35.

An NPN is provided between the collector of the transistor Q40 forming the current mirror circuit 31 and the ground point.
Transistor Q51 is connected, and this transistor Q5
1 is a transistor Q5 forming a current mirror circuit
2 is connected, the collector of the monitor transistor Q30 in the power amplification circuit shown in FIG. 3 is connected to the bases of these transistors Q51, Q52, and collector currents corresponding to the feedback current If flow into Q51, Q52. It is configured to Then, the transistor Q5
2 has a base and a collector coupled to each other, and a transistor Q6 between the collector and the power supply voltage Vcc.
Transistor Q forming a current mirror circuit with 1
62 are connected. Further, an ON / OFF switch transistor Qs is connected between the collector of the transistor Q52 and the ground point, and a mode control signal MC is input to the base of the transistor Qs via a resistor R2. There is. The transistor Q6
A bias voltage Vb is supplied to the bases of 1 and Q62 from a constant voltage generating circuit (not shown) or from the outside, and a reference current Ib of a desired magnitude is supplied to the transistor Q52.

Next, the operation of the booster circuit configured as described above will be described.

When reproducing a CD or a magnetic tape, the mode control signal MC is set to the low level to bring the transistor Qs into the cutoff state. An appropriate bias voltage is supplied to the bases of the transistors Q61 and Q62 which form the current mirror circuit, and the reference current Ib is passed through the transistor Q52.
Transferred to 51. This causes a current to flow through the transistor Q40 that forms the current mirror circuit 31,
A collector current is also passed through 41 to Q43.

On the other hand, the clock signal CLK is input to the base of the transistor Q37 connected to the collector of the transistor Q43 from an oscillation circuit (not shown), and the transistor Q3 is in the low level period of the clock signal CLK.
When 7 is turned off, the current supplied from the current mirror circuit 31 is made to flow in the transistor Q36, and the current is also made to flow in the transistor Q33 which is current-mirror connected to the transistor Q36.
As a result, the electric charge is extracted from one terminal of the capacitor C2 via the transistor Q32, and the electric charge flows into the other terminal (on the side of the node n2) via the transistor QD1 and is set to the potential of Vcc-VBE. At this time, the current flowing out of the transistor Q41 forming the current mirror circuit 31 bypasses Q34 and flows through the node n3 to Q33 because the transistor Q33 is turned on, and the transistor Q3 on the power supply voltage Vcc side of the node n1.
No current flows through 1.

Next, when the clock signal CLK changes to the high level, the transistor Q37 is turned on and the current supplied from the current mirror circuit 31 flows into Q37, and the transistors Q36 and Q33 forming the current mirror circuit.
Current is prevented from flowing through. As a result, the current flowing out of the transistor Q41 forming the current mirror circuit 31 flows to the side of Q34, and the current also flows to the transistor Q31 connected to this in the current mirror circuit. This current flows to one side of the capacitor C2 (on the side of the node n1). The potential that flows into the terminal rises toward Vcc and is transmitted to the other terminal as it is, so the terminal potential on the node n2 side of the capacitor C2 rises, and the charged charge is transferred to the capacitor C1 via the transistor QD2. Then, the voltage of the capacitor C1 is gradually increased to the power supply voltage Vcc or higher.

Further, in this embodiment, as described above, the current monitoring the current flowing in the output circuit of the power amplifier circuit is fed back, and the boosting capability is determined according to the feedback current If. Is configured to be variable. That is, the current If fed back from the power amplification circuit is input to the base of the transistor Q52 through which the reference current Ib flows, and when the output power of the power amplification circuit increases, the collector current of the transistor Q51 connected in current mirror with the transistor Q52 increases. Then, this increased current flows into the transistor Q40 as the basic current of the current mirror circuit 31. Therefore, a current corresponding to the emitter size ratio of the current of Q40 to the current of Q40 flows through the transistor Q41 which is connected to the transistor Q40 in a current mirror to give the charge / discharge current of the capacitor C2, and the charge / discharge current of the capacitor C2 becomes the feedback current If. It increases with the increase. In other words, the power supply capacity of the booster circuit is increased as the output power of the power amplifier circuit is increased.

On the other hand, when the output power of the power amplifier circuit decreases, the feedback current If decreases, so that the transistor Q
The currents of 52 and Q51 decrease, and this decreased current flows through the transistor Q40 as the basic current of the current mirror circuit 31. Therefore, the transistor Q
The current flowing through 40 and Q41 decreases, and the capacitor C
The charge / discharge current of 2 decreases with the decrease of the feedback current If. That is, the power supply capability of the booster circuit is reduced as the output power of the power amplifier circuit is reduced. Moreover, in this embodiment, since the limiter circuit 32 is provided with the transistor Q35, the capacitor C2 is rapidly charged until the transistor Q35 is turned on, that is, while the potential of the node n3 is low, and when the voltage rises to a certain voltage, the transistor Q35 is turned on. Q35 is turned on and the clamp is applied.
As a result, there is an advantage that the boosting operation with a steep slope at the rising of the drive voltage is performed.

Further, in the booster circuit of this embodiment, a limiter circuit 32 for limiting the charging potential of the smoothing capacitor C1 so as not to rise above a certain level is provided on the booster capacitor C2 side. This limiter circuit 32
Controls the boosting capability by limiting the amplitude of the voltage on the node n1 side of the boosting capacitor C2 to control the smoothing capacitor C2.
It operates so as to limit the rise of the charging potential of unity. In this embodiment, the Zener diode Dz of the limiter circuit 32 is used.
Is set to about 6V, and when the potential of the node n3 exceeds the set potential (about 8V), the transistor Q35 turns on and a reverse current flows to the Zener diode Dz via Q35 and the resistor R1. As a result, the potential on the high level side of the node n3 is clamped. As a result, the voltage amplitude for driving the capacitor C2 is limited, and the boosting operation is limited.

Moreover, the booster circuit of this embodiment is constructed so that the boosting capability is variable by varying the clamp voltage according to the output power of the power amplifier circuit. That is, a transistor Q40 in which a current according to the feedback current If flows and a transistor Q42 connected in a current mirror are provided, and a resistor R1 is connected in series with a Zener diode Dz between the collector of this transistor and a ground point. Therefore, the voltage drop amount of the resistor R1 changes according to the feedback current If, that is, the output power of the power amplifier circuit, and the voltage at which the limiter circuit 32 operates also changes. That is, since the feedback current If is small while the output power of the power amplifier circuit is small, the current flowing through the transistor Q42 is also small, and the voltage drop across the resistor R1 is also small. Therefore, when the potential of the node n3 is slightly higher than the reverse voltage of the zener diode Dz by the base-emitter voltage VBE (about 0.7V) of the transistor Q35, the transistor Q35 is turned on and the zener from the node n3. A current flows toward the diode Dz.

However, since the feedback current If increases as the output power of the power amplifier circuit increases, the transistor Q
The current flowing through 42 increases, and the voltage drop across the resistor R1 also increases. Therefore, unless the potential of the node n3 becomes higher than the reverse voltage of the Zener diode Dz by VBE + (voltage drop of the resistor R1), the transistor Q35 turns on and the current does not flow from the node n3 toward the Zener diode Dz. That is, the voltage at which the limiter circuit 32 operates increases according to the output power of the power amplifier circuit. As a result, the amplitude for driving the boosting capacitor C2 is increased, the output power of the power amplifier circuit is increased, and the amount of charge transferred from the capacitor C2 to C1 is increased. It is possible to prevent the voltage Vp supplied from the circuit to the power amplifier circuit from decreasing.

The clock signal C is not particularly limited.
The oscillation circuit that supplies LK is also configured to stop its oscillation operation in response to the non-operation of the booster circuit 3 by the mode control signal MC.

In the above embodiment, the high resistance element R0 is connected between the power supply voltage Vcc and the external terminal T1 in parallel with the transistors QD1 and QD2 acting as diodes. The resistor R0 is provided for promptly leaking the electric charge stored in the capacitor C2 until the booster circuit is switched from the operating state to the non-operating state, and may be omitted.

As described above, in the above embodiment, in the power amplifier circuit having the push-pull type output circuit, both the push-side output transistor and the pull-side output transistor forming the push-pull type output circuit are NPN transistors. A booster circuit for boosting the power supply voltage and a switching means for selectively supplying the voltage formed by the booster circuit or the normal power supply voltage to the preceding circuit that supplies the base current of the push-side output transistor are provided. Since the means is switched by the mode control signal or the like, the booster circuit is stopped in the AM or FM broadcast receiving mode in which the tuner operates in the audio equipment having the power amplifier circuit, and the normal power supply voltage is changed by the switching means. To the CD player and the tuner does not work. In this mode, the voltage generated by operating the booster circuit can be supplied to the preceding circuit, so that when receiving AM or FM broadcasting, the same operation as that of the conventional power amplifier circuit is performed, and beat noise due to noise, etc. It is possible to prevent such troubles and to obtain a large maximum output power when reproducing a CD or reproducing a magnetic tape.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, the power amplifier circuit described in the above embodiments is merely an example, and the present invention is applicable to any type of power amplifier circuit as long as it is a circuit using NPN transistors for the push-side and pull-side transistors. Can also be applied, whereby the effect of improving the maximum output power can be obtained.

In the above description, the invention made by the present inventor has been mainly described as being applied to a suitable power amplifier circuit by being built in an audio equipment mounted on an automobile, which is the field of application of the invention. The present invention is not limited to this, and it can be used for general circuits having a push-pull type output circuit.

[0051]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, it is possible to realize a power amplifier circuit suitable for an audio device mounted on a vehicle, which can increase the maximum output power while avoiding adverse effects on other circuits such as a tuner.

[Brief description of drawings]

FIG. 1 is a main part circuit diagram showing an embodiment of a power amplifier circuit according to the present invention.

FIG. 2 is a circuit diagram showing a configuration example of a suitable audio device to which the power amplifier circuit according to the present invention is applied.

FIG. 3 is a circuit diagram showing a second embodiment of the power amplifier circuit according to the present invention.

FIG. 4 is a circuit diagram showing an example of a booster circuit.

FIG. 5 is a circuit diagram showing an example of a push-pull type output circuit used in a conventional power amplifier circuit.

FIG. 6 is a circuit diagram showing an example of a power amplifier circuit used for an acoustic amplifier, which has a high output.

[Explanation of symbols]

 1 Push side drive circuit 2 Pull side drive circuit 3 Booster circuit 4 Output transistor drive circuit 5 Output transistor drive circuit 6 Current switching circuit 31 Current mirror circuit 32 Limiter circuit

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Ritsushi Takeshita 5-20-1, Josuihoncho, Kodaira-shi, Tokyo In the semiconductor division of Hitachi, Ltd.

Claims (9)

[Claims] 1. A power amplifier circuit having a push-pull type output circuit in which two NPN transistors are connected in series between a first power supply voltage terminal and a second power supply voltage terminal. A booster circuit for generating a boosted voltage from a voltage, and a switch for selectively supplying the boosted voltage formed by the booster circuit or the first power supply voltage to a preceding circuit that supplies a base current to a push-side output transistor. Means for stopping the operation of the booster circuit in the first operation mode to supply the first power supply voltage to the preceding circuit to drive the output transistor, and to drive the booster circuit in the second operation mode. It is characterized in that the operated and boosted voltage is supplied to the preceding circuit to drive the base of the output transistor at a voltage higher than the first power supply voltage. Power amplifier circuit. 2. A power amplifier circuit having a push-pull type output circuit in which two NPN transistors are connected in series between a first power supply voltage terminal and a second power supply voltage terminal. A booster circuit for generating a boosted voltage from the voltage, two NPN pre-stage transistors each forming a Darlington circuit together with a push-side output transistor, and two current circuits for respectively supplying base currents to these pre-stage transistors. And a current switching means for supplying a current to one of these current circuits,
The first power supply voltage is applied to one of the two current circuits, and the voltage boosted by the booster circuit is applied to the other current circuit. In the first operation mode, the operation of the booster circuit is stopped and the first voltage is applied. Is supplied to the one current circuit to drive the output transistor, and in the second operation mode, the booster circuit is operated and the boosted voltage is supplied to the other current circuit to output the output transistor. A power amplifier circuit characterized in that a base is driven at a voltage higher than a first power supply voltage. 3. A monitor transistor for detecting a current flowing through the output circuit is provided, and the current flowing through the monitor transistor is fed back to the boost circuit to supply power to the boost circuit according to the amount of power consumption of the output circuit. The power amplification circuit according to claim 1 or 2, wherein the power amplification circuit is configured to change the ability. 4. A PNP transistor forming an inverted Darlington circuit together with the output transistor is connected in front of the pull-side output transistor.
4. The power amplifier circuit according to claim 1, 2 or 3, wherein the base of the P-transistor responds to an input signal. 5. An NPN transistor is connected to the emitter of the PNP transistor, a current circuit is connected to the base of the NPN transistor, and the current circuits form the two current circuits according to claim 2. The power amplifier circuit according to claim 4, wherein the power amplifier circuit is configured by a transistor and a transistor that is respectively connected to a current mirror. 6. The booster circuit comprises a pair of diode elements connected in series between a first power supply voltage terminal and an output terminal, and between the first power supply voltage terminal and the second power supply voltage terminal. A pair of switch elements connected in series to each other and complementarily switched based on a clock signal, and a pair of terminals capable of coupling a capacitor between the intermediate coupling node of these switching elements and the intermediate coupling node of the diode element. And a current source circuit that supplies a current for charging and discharging a capacitor to the switch element, and is configured to cut off the current of the current source circuit in the first operation mode. Claims 1, 2, 3, 4 or 5
The power amplifier circuit according to. 7. The booster circuit includes a limiter circuit for limiting the amplitude of the drive voltage of the capacitor, and the limiter circuit is a resistor in which a current corresponding to the feedback current flows and a clamp connected in series with the resistor. 7. The diode according to claim 6, wherein the amplitude of the drive voltage of the capacitor is limited by the reverse voltage of the clamping diode and the voltage generated by the voltage drop of the resistor. Power amplifier circuit. 8. A power amplifier circuit including the booster circuit is formed on one semiconductor chip, and the output terminal and the pair of terminals can be connected to a capacitor formed separately from the semiconductor chip. The power amplifier circuit according to claim 6, wherein the power amplifier circuit is configured as a terminal. 9. A car-mounted audio device comprising a tuner for receiving and processing a radio broadcast signal, a reproducing device for reproducing and amplifying sound information stored in a storage medium, and a control device for controlling these devices. In the playback device, the playback device includes the power amplification circuit according to any one of claims 1 to 8, and the control device sets the first operation mode when the broadcast is received when the tuner operates, and operates the playback device. A vehicle-mounted audio device, which is configured to form a mode control signal indicating a second operation mode when sound information is reproduced and to provide the power amplifier circuit as a switching signal.