JPH09200074A - Antenna switch - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain required attenuation when over-loaded without deteriorating the noise figure by connecting an attenuator in parallel with a reception main path via a single pole double-throw electronic switch by way of two single-throw electronic switches. SOLUTION: Each electronic switch is made up of a FET and a HEMT, and switches 3, 4 and an attenuator 5 with a switch 2 are integrated into one- chip. The length of a line being a component of the switches 3, 4 is selected sufficiently shorter than a wavelength of a passing signal and then a stray capacitance is small. In the case of usual reception, a moving arm of the switch 2 is thrown to the position of a terminal S1 and the switches 3, 4 are open. Thus, the input signal is not almost affected by the existence of the switches 3, 4 or the attenuator 5. When a signal from an electric field strength detection section in a reception section has a threshold level or over, the moving arm of the switch 2 is thrown to the position of a terminal Sn and the switches 3, 4 are closed. In this case, the signal received by the antenna 11 is accurately attenuated via the switch 3, the attenuator 5 and the switch 4, and the resulting signal is given to the reception section 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic switch for switching a transmission path of high frequency signals, and more particularly to an electronic switch suitable for a time division multiple access (TDMA) type digital mobile radio apparatus.

[0002]

2. Description of the Related Art In a general wireless device, a receiving section is designed with a priority on receiving a weak signal. However, in the case of a cordless telephone, there is a high possibility that the parent device and the child device will be used in a state where they are very close to each other. At this time, since a signal of an excessive level is input to the receiver, the signal is distorted in the receiver. In digital radios, this distortion causes an increase in data error rate and significantly deteriorates speech quality. In order to prevent this deterioration, a circuit device for attenuating the input signal level is provided at one or several places of the receiving section. One of the means is to insert an attenuator.

FIG. 2 shows an example of a conventional technique. An attenuator 13 is inserted between the antenna switch 12 and the receiving unit 9, and when the received electric field intensity signal from the received electric field intensity detecting unit in the receiving unit 9 is below a certain threshold, the attenuator 13 is set to through and reception is performed. When the electric field intensity signal is above a certain threshold, the attenuator 13 is set to have a certain amount of attenuation. Here, the threshold value and the attenuation amount may be set in multiple stages. Such attenuators include, for example, AT-250 and AT-272 manufactured by Meicom, USA. Also, the company's 2-pole double-throw switch SW-28.
There is also a method in which one arm of 9 is used as a through hole and a fixed attenuator is externally attached to the other arm. In any case, in these conventional techniques, since the circuit for controlling the insertion of the attenuator is inserted in series in the main path, there is an attenuation amount at the time of through, that is, an insertion loss. Therefore, the configuration of FIG. 2 has a problem that the total reception noise figure increases and the reception sensitivity deteriorates.

As another conventional example, there is a method in which the attenuator 13 is not provided in FIG. 2 and the receiving section 9 and the switch 12 are directly connected to each other and the arm of the switch 12 is closed to the TX side at the time of excessive input.
At this time, the received signal is attenuated by utilizing the isolation between the ANT terminal and the RX terminal of the switch 12. The advantage of this method is that no attenuator is inserted, so there is no deterioration in the noise figure. However, since the signal is attenuated using isolation, the amount of attenuation changes for each switch used, and there is a problem that an accurate amount of attenuation cannot be obtained.

[0005]

The problem to be solved by the present invention is to minimize the insertion loss from the receiving section to the antenna and to obtain an accurate attenuation amount.

[0006]

There is a single pole, double throw switch and attenuator, between the single pole terminal of the switch and the input (or output) terminal of the attenuator, and the double throw of the switch. A single-pole single-throw switch is inserted between one of the terminals and the output (or input) terminal of the attenuator, and all these circuit elements are integrated into a single chip.

In the TDMA radio apparatus, the antenna switch serves to transmit a signal from the antenna to the receiving unit during the receiving period and to transmit a signal from the transmitting unit to the antenna during the transmitting period. This antenna switch is composed of a single-pole double-throw switch, and according to the implementation means of the present invention, a switch for inserting an attenuator in parallel is provided in the originally existing main path (path between the antenna and the receiving section). , Main path insertion loss does not increase. When the signal needs to be attenuated, the main path is released and the attenuator is inserted, so that the required amount of attenuation can be accurately obtained by the attenuator.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A conceptual diagram of an embodiment is shown in FIG. Single pole, three throw electronic switch 2, two single pole, single throw switch 3,
4 and attenuator 5 are integrated inside the package 1 on one semiconductor chip. Internal terminal s of switch 2
c, s1, and s2 are terminals ANT of the package 1, respectively
It is connected to RX and TX. The internal terminals sc and s1 are respectively connected to one ends of single-pole single-throw switches 3 and 4,
An attenuator 5 is connected between the other ends of both switches. In this embodiment, the switch 3 has a midpoint terminal sn, but this terminal is not essential for achieving the object of the invention. The reception unit 9 and the transmission unit 10 are connected to terminals RX and T by transmission lines 7 and 8 each having a specific impedance.
The antenna 11 is connected to X and the antenna 11 is connected to the terminal ANT by the transmission line 6. A filter may be inserted in the transmission line 6 or 8.

The method of constructing the electronic switches 2, 3, 4 with electronic devices and the method of constructing the attenuator are known. The size of an electronic device depends on the power it handles. For example, when using a GaAs metal semiconductor field effect transistor (MESFET) having a gate length of 0.5 μm to handle power of about 100 mW, the gate width of the transistor is 2
It will be about mm. F having such a large gate width
The ET is generally used in parallel with a small FET having a gate width of 100 to 300 μm. Further, since the electric power handled by the receiving side path is 1/10 or less as compared with the transmitting side path, a small FET having a gate width of 300 μm or less may be used. It is possible to connect the internal terminal sc and the switch 3 and the internal terminal s1 and the switch 4 with a line of 1 mm or less. This length is 1/50 or less of the signal wavelength of about 2 GHz, which is almost negligible.

Next, the outline of the operation will be described. At the beginning of the reception period, the movable terminal of the switch 2 is set to the internal terminal s1,
The switches 3 and 4 are left open. When the received electric field strength signal from the received electric field strength detecting section in the receiving section 9 is equal to or lower than the first threshold value, the states of the switches 2, 3 and 4 are not changed. When the received electric field strength signal is equal to or higher than the first threshold value, the movable arm of the switch 2 is set to the internal terminal sn and the switches 3 and 4 are short-circuited. At this time, the signal received by the antenna 11 is input to the receiver 9 via the line 6, the switch 3, the attenuator 5, the switch 4, and the line 7. In this state, the received electric field strength signal is the second
When the threshold value is exceeded, the states of the switches 2, 3 and 4 are not changed. When the received electric field strength signal is less than or equal to the second threshold value, the movable terminal of the switch 2 is set to the internal terminal s1, and the switches 3 and 4 are set.
Returns to release. During the transmission period, the movable terminal of the switch 2 is set to the internal terminal s2 and the switches 3 and 4 are released. These controls are generally performed by a microprocessor in the controller not shown.

As is clear from the above description, during normal reception in which the received electric field strength is relatively small, the received signal passes only the originally existing switch 2 without passing through the switch for turning on / off the insertion of the attenuator. In addition, the switch 2 of FIG.
Since 3 and 4 are integrated on one semiconductor chip, the length of the line connecting the internal terminals s11 and s21 can be made sufficiently shorter than the wavelength of the high frequency signal passing therethrough, as described above. it can. Further, the capacitance of the electronic device forming the switch 3 or 4 is added to the internal terminals sn and s1, but these capacitances are sufficiently smaller than the capacitance between the package pins. Therefore, the increase in loss due to the structure shown in FIG. 1 is extremely small, and the switch of the present invention can be realized with the same level as the insertion loss of a single single-pole double-throw electronic switch. That is, the reception total noise figure of the wireless device using the antenna switch of the present invention is almost equal to the reception total noise figure when the single single-pole double-throw switch is used as the antenna switch. When signal attenuation is required, the movable arm of the switch 2 is turned on to the internal terminal sn and the switch 3,
By shorting 4 the signal is accurately attenuated as it goes through the attenuator 5. Further, since the switches 3 and 4 and the attenuator are integrated together with the switch 2 in one chip, it is obvious that they can be mounted in a smaller area than that of the prior art of FIG.

It is obvious that the object of the present invention can be achieved regardless of whether the attenuator 5 is a fixed attenuator, a continuously variable attenuator or a step variable attenuator.

A detailed embodiment is shown in FIG. In the figure, the electronic device that constitutes the switch is a field effect transistor (FET) or a hot electron transfer type transistor (HEM).
T) etc. FET is MOSFET, MESF
Either ET or junction type FET, single gate or dual gate, conductivity type n
It may be a p-type or a p-type. The terminal (ANT) 20 is an FET (Q
r) 30 and the source (sc, s) of the FET (Qt) 31
c ′) and the drain of the FET (Qa1) 32. Terminal (RX) 21 is FET (Qr) 30 and F
It is connected to the drain of ET (Qa2) 33. The terminal (TX) 22 is the drain (s2) of the FET (Qt) 31.
It is connected to the. FET (Qa1), FET (Qa
The sources of 2) are connected to the terminals of the attenuator 5, respectively. A switch corresponding to the switch 2 in FIG.
r) and the FET (Qt), the switch 3 in FIG.
The switches corresponding to 4 are FETs (Qa1) and F, respectively.
It is composed of ET (Qa2). In this embodiment, the attenuator 5 is of π type, the sources of the FET (Qa1) are connected to the resistors 37 and 38, and the FET (Qa2) is connected.
The resistors 37 and 39 are connected to the source of
The other end of 9 is grounded. The attenuator 5 may be T-shaped. The drain of the option FET (Qrs) 34 is connected to the drain (s1) of the FET (Qr), and the source thereof is grounded. Option FET (Qts)
The drain of 35 is connected to the drain (s2) of the FET (Qt), and the source thereof is grounded. Each of the dual gates of the FET 30 has a control terminal (CR
X) 23. The gates of the FETs 31 and 34 are connected to a control terminal (CTX) 24 via a resistor R, respectively. The dual gates of the FETs 32 and 33 are connected to a control terminal (CAT) 26 via a resistor R, respectively. The dual gates of the FET 35 are each connected to the control terminal (CRs) 25 via the resistor R. The same symbols are used for control signal names and control terminal names. All the above FETs and resistors are integrated on a one-chip semiconductor substrate and enclosed in a package 1.

Next, Table 1 shows an operation state table of this embodiment.

[0015]

[Table 1]

In Table 1, when the level of the control signal is "1", the FET connected to it becomes conductive (ON), and when the level of the control signal is "0", it is connected to F.
ET shall be non-conducting (OFF). Terminal AN
FET (Qt), (Qr
s) is turned on and the other FETs are turned off. Terminal AN
FE when connecting between T and RX without passing through an attenuator
T (Qr) and (Qts) are turned on and the other FETs are turned off. FET (Qa1), (Qa2), (Qts) when connecting between terminals ANT and RX via an attenuator
Is turned on and the other FETs are turned off.

The effect of the embodiment of FIG. 3 is the same as the effect of the embodiment of FIG.

Although the option FET is not related to the object of the present invention, its function will be briefly described. The FET (Qts) for option uses the terminal ANT via the capacitance between the source and drain of the FET (Qt) in which noise and unnecessary signals entering the terminal TX are not conducted when the terminals ANT-RX are conducted. It is provided to prevent you from jumping into. Option FET (Qrs) is the terminal AN
When T-TX is conducting, it is provided to prevent noise and unnecessary signals coming into the terminal RX from jumping to the terminal ANT by the capacitance between the source and drain of the non-conducting FET (Qr). .

Another embodiment is shown in FIGS. In both of the embodiments, the present invention is applied to an antenna switch of a diversity radio device, FIG. 4 is a conceptual diagram thereof, and FIG. 5 is a detailed diagram thereof.

In FIG. 4, inside the package 51, single-pole double-throw switches 52 and 53, single-pole single-throw switches 54 and 55,
57 and 58 and attenuators 56 and 59 are integrated on one chip. The switch 52 is controlled by the control signal CN1, and its internal terminals s1c, s12, s11 are connected to the external terminals A1, R1, Tc, respectively. The switch 53 is controlled by the control signal CN2, and its internal terminals s2c, s22, s21 are respectively external terminals A2, R.
2, connected to Tc. One ends of switches 54 and 56 are connected to the internal terminals sc1 and s12, respectively, and the other ends of both switches are connected to the attenuator 56. One ends of switches 57 and 58 are connected to the internal terminals sc2 and s22, respectively, and the other ends of both switches are connected to an attenuator 59. Switches 54 and 55 and switches 57 and 58
Are controlled by control signals CA1 and CA2, respectively.
The terminal A1 is connected to the antenna (I) 11 via the transmission line 6,
The terminal A2 is an antenna (II) 11 'through the transmission line 6'.
Connected to. The terminal R1 is connected to the receiving unit (I) 9 via the transmission line 7, and the terminal R2 is connected to the receiving unit (II) 9'via the transmission line 7 '. The terminal Tc is connected to the transmitter 10 via the transmission line 8. The operation of this embodiment is basically the same as the operation of the embodiment of FIG. However, switch 5
4, 55 and switches 57, 58 are controlled by control signals CA1, CA2 determined by the magnitude of the received electric field strength signals detected inside the receivers I, II, respectively. The effect of this embodiment is the same as the effect of the embodiment of FIG.

In the embodiment of FIG. 5, the electronic device forming the switch is composed of a field effect transistor (FET), a hot electron transfer type transistor (HEMT) or the like. F
ET may be any of MOSFET, MESFET and junction type FET, and may be either single gate or dual gate, and the conductivity type may be n type or p type. The terminal (A1) 60 is a FET (Qr1) 81 and a FET (Qt).
1) It is connected to the source of 82 and the drain of FET (Q11) 88. The terminal (R1) 63 is an FET (Qr
1) 81 and the drain of the FET (Q12) 89. The terminal (Tc) 62 is connected to the FET (Qt1) 82 and F
It is connected to the drain of ET (Qt2) 84. FE
The sources of T (Q11) and FET (Q12) are connected to the terminals of the attenuator 56, respectively. Switch 52 of FIG.
The switch corresponding to is FET (Qr1), FET (Qt
1), and the switches corresponding to the switches 54 and 55 in FIG. 1 are FET (Q11) and FET (Q1), respectively.
2). The terminal (A2) 61 is an FET (Q
r2) 83 and FET (Qt2) 84 source and FE
It is connected to the drain of T (Q21) 90. The terminal (R2) 64 is a FET (Qr2) 83 and a FET (Q2
2) It is connected to the drain of 91. FET (Q2
The sources of 1) and FET (Q22) are attenuators 59, respectively.
Terminal. The switches corresponding to the switch 53 of FIG. 4 are composed of FETs (Qr2) and FET (Qt2), and the switches corresponding to the switches 57 and 58 of FIG. 1 are composed of FET (Q21) and FET (Q22), respectively. . In this embodiment, the attenuator 56 is of a π type, and the source of the FET (Q11) has a resistor 92,
93 is connected, and a resistor 9 is connected to the source of the FET (Q12).
2, 94 are connected, and the other ends of the resistors 93, 94 are grounded. The attenuator 56 is a π type
Resistors 92 and 93 are connected to the source of (Q11)
Resistors 92 and 94 are connected to the source of ET (Q12), and the other ends of the resistors 93 and 94 are grounded. The drain of the option FET (Q1s) 85 is FET (Qr
It is connected to the drain of 1) and its source is grounded. The drain of the option FET (Qts) 87 is F
It is connected to the drains of ET (Qt1) and FET (Qt2), and the sources thereof are grounded. FET for option
The drain of the (Q2s) 86 is connected to the drain of the FET (Qr2), and the source thereof is grounded. FET8
The dual gates of 1 are connected to the control terminals (C
R1) 66. The dual gates of the FET 83 are each connected to the control terminal (CR2) 69 via the resistor R. The gates of the FETs 82 and 85 are resistors R, respectively.
Is connected to the control terminal (CT1) 65 via. F
The gates of the ETs 84 and 86 are connected to the control terminal (CT2) 68 via a resistor R, respectively. The dual gates of the FETs 88 and 89 each have a control terminal (CA
1) Connected to 67. The dual gates of the FETs 90 and 91 each have a control terminal (CA2) 70 via a resistor R.
It is connected to the. The dual gates of the FET 87 are each connected to the control terminal (Cts) 71 via the resistor R. The same symbols are used for control signal names and control terminal names. All the above FETs and resistors are integrated on a one-chip semiconductor substrate and enclosed in a package 51.

Next, the operation state table of this embodiment is shown in Table 2,
It is shown in Table 3.

[0023]

[Table 2]

[0024]

[Table 3]

In Tables 2 and 3, the control signal level is set to "1".
When it is set, the FET connected to it is conductive (ON)
However, when the level of the control signal is set to "0", the FET connected to it becomes non-conductive (OFF). The meaning of "x0" and "x1" in the control signal column in the table may be any level, but it is preferable to set the level to "0" for "x0" and set the level to "1" for "x1". It indicates that it is preferable to set. "X in the FET column
The meanings of "0" and "x1" are the same, and are set to "OFF" or "ON" according to the control signal. For example, in order to output the high frequency signal input to the terminal A1 to the terminal R1 via the attenuator 56, at least the FET (Q11), FE
Turn on T (Q12) to turn on FET (Qr1), FET
(Qt1) and FET (Q1s) are turned off. Remaining F
Of ET, FET (Q21), FET (Q22), F
ET (Qts) is turned on, FET (Qr2), FET
(Qt2) and FET (Q2s) are preferably turned off. The same applies to other operating state settings.

The effects of this embodiment are the same as the effects of the embodiment of FIG.

[0027]

When the switch according to the present invention is used, the mounting area is reduced, which is effective in reducing the size of the portable wireless device. In addition, the total reception noise figure is improved, the reception sensitivity is improved, and the communication range is expanded.

[Brief description of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a conventional technique.

FIG. 3 is an explanatory diagram showing a detailed configuration of the embodiment of FIG.

FIG. 4 is a block diagram showing another embodiment of the present invention.

5 is an explanatory diagram showing a detailed configuration of the embodiment of FIG.

[Explanation of symbols]

 1, 51 ... Package, 2, 52, 53 ... Single-pole double-throw electronic switch, 5, 56, 59 ... Attenuator, 9 ... Receiver, 10 ... Transmitter, 11 ... Antenna, 31-35, 81-91 ... Electronic devices, 37-39, 92-97 ... Resistors.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasushi Shigeno 5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock company Hitachi Semiconductor Division

Claims (4)

[Claims] 1. A single-pole, double-throw (or single-pole, three-throw) switch and attenuator integrated on one chip.
Inserting a single-pole single-throw switch between the single-pole terminal portion of the switch and the terminal portion of the attenuator, and between one of the double-throw terminals of the switch and the terminal portion of the attenuator. Characteristic antenna switch. 2. The single-pole double-throw switch and the single-pole single-throw switch according to claim 1, wherein the single-pole double-throw switch is a connection in which the sources of the first FET and the second FET are connected to each other. Is a single-pole terminal AT, the drains of the unconnected first FET and second FET are double-throw terminals RX and TX, respectively, and the drain of the third FET and the second FET
, The source of the third FET and the input (or output) terminal of the attenuator are connected, and the drain of the fourth FET and the drain (or source) of the second FET are connected to each other. To connect the source (or drain) of the fourth FET and the output terminal of the attenuator to each F
ET is single gate FET or dual gate FE
A control signal for turning on / off the FET is applied to the gate of each FET, and a terminal AT and a terminal TX are provided.
An antenna switch, wherein a high-frequency signal can be input / output between the terminals AT and RX via the first FET or via the attenuator. 3. A single-gate FET or a dual-gate FET capable of grounding the terminal in an alternating current manner is connected to at least one of the terminals TX and RX, and these terminals are grounded by a control signal. F
Antenna switch that turns ET on and off. 4. The antenna switch according to claim 3, wherein the attenuation amount of the attenuator is variable.