JPH0851576A - High image quality television receiver with two-screen display function - Google Patents
High image quality television receiver with two-screen display functionInfo
- Publication number
- JPH0851576A JPH0851576A JP13551795A JP13551795A JPH0851576A JP H0851576 A JPH0851576 A JP H0851576A JP 13551795 A JP13551795 A JP 13551795A JP 13551795 A JP13551795 A JP 13551795A JP H0851576 A JPH0851576 A JP H0851576A
- Authority
- JP
- Japan
- Prior art keywords
- screen
- image
- signal
- television receiver
- display function
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Color Television Systems (AREA)
- Processing Of Color Television Signals (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、一画面に動画と静止画
を同時に表示することのできるテレビジョン受信機に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver capable of simultaneously displaying a moving picture and a still picture on one screen.
【0002】[0002]
【従来の技術】近年、テレビジョン受信機におけるブラ
ウン管画面の有効活用をはかるために、本来のテレビ画
面の一部に他のテレビ番組を縮小して写し出す、いわゆ
る小画面挿入(PinP)テレビが発表されている(特開
昭54−98116号公報参照)。このPinP(ピクチ
ヤ・イン・ピクチヤ)の考え方を以下図8〜図11によ
り簡単に説明する。2. Description of the Related Art In recent years, in order to make effective use of a CRT screen in a television receiver, a so-called small screen insertion (PinP) TV, which reduces and projects other TV programs on a part of the original TV screen, is announced. (See Japanese Patent Laid-Open No. 54-98116). The concept of this PinP (picture-in-picture) will be briefly described below with reference to FIGS.
【0003】図8はPinP画面の概念図であり、101
がテレビジョン受信機、102がブラウン管、103が
親画面部、104が他の番組画面を縮小して挿入した小
画面部であり、親画面、小画面はおのおの独立して選局
できる形式となっている。図9に小画面挿入方法の一例
を示す。Iが縮小前の小画面、IIが小画面を挿入した親
画面である。画面縮小率を(縮小後の走査周期)/(原
信号の走査周期)とすると小画面の画面縮小率を縦横1
/3とした場合、小画面Iの画面から走査線を3本に1
本抜き取り、かつ水平周期を1/3に時間圧縮して親画
面との同期合せを行なったあと親画面に挿入する。走査
線〜は縮小前後の走査線の一部を示したものであ
る。FIG. 8 is a conceptual diagram of a PinP screen.
Is a television receiver, 102 is a cathode ray tube, 103 is a main screen portion, 104 is a small screen portion into which another program screen is reduced and inserted, and the main screen and the small screen are in a format in which they can be independently selected. ing. FIG. 9 shows an example of a small screen insertion method. I is the small screen before reduction, and II is the parent screen in which the small screen is inserted. If the screen reduction ratio is (scan period after reduction) / (scan period of original signal), the screen reduction ratio of a small screen is 1 in the horizontal and vertical directions.
When set to / 3, the number of scanning lines from the screen of the small screen I to 1
This is extracted, and the horizontal period is time-compressed to 1/3 to synchronize with the main screen and then inserted into the main screen. Scan line-shows a part of the scan line before and after reduction.
【0004】図10に小画面挿入の状態を時間軸で示
す。Iは小画面の縮小前の映像信号、IIは小画面を挿入
した親画面の映像信号である。小画面の映像信号Iか
ら、図9に示したように、3本に1本ずつ走査線を抜き
出してアナログまたはデジタルのフィールドメモリIII
に書き込み、親画面の映像信号IIの小画面挿入位置(太
線部)で3倍のクロックを用いて読み出すことにより、
2画面テレビジョン信号とすることができる。この時フ
ィールドメモリIIIはA,B2フィールド分が必要とな
る。すなわちメモリAを読み出している時、メモリBに
は次のフィールドを書き込み、メモリBを読み出してい
る時、メモリAには次のフィールドを書き込む。FIG. 10 shows a state of inserting a small screen on a time axis. I is the video signal of the small screen before reduction, and II is the video signal of the parent screen in which the small screen is inserted. From the video signal I of the small screen, as shown in FIG. 9, one scanning line is extracted for every three lines and an analog or digital field memory III is extracted.
, And read out using the triple clock at the small screen insertion position (thick line part) of the video signal II of the main screen,
It can be a two-screen television signal. At this time, the field memory III requires A and B2 fields. That is, when reading the memory A, the next field is written to the memory B, and when reading the memory B, the next field is written to the memory A.
【0005】図11にPinPテレビの従来例の構成を示
す。同図において、401はアンテナ、402は小画面
挿入回路、403は映像処理回路、404はブラウン
管、405は親画面用チューナ、406はIF・映像検
波回路、407は同期分離回路、408は小画面用チュ
ーナ、409はIF・映像検波回路、410は同期分離
回路、411,412はフィールドメモリA,B、41
3は書込み用クロック発生回路、414は読出用クロッ
ク発生回路である。FIG. 11 shows the configuration of a conventional PinP television. In the figure, 401 is an antenna, 402 is a small screen insertion circuit, 403 is a video processing circuit, 404 is a cathode ray tube, 405 is a main screen tuner, 406 is an IF / video detection circuit, 407 is a sync separation circuit, and 408 is a small screen. Tuner, 409 IF / video detection circuit, 410 sync separation circuit, 411, 412 field memories A, B, 41
Reference numeral 3 is a write clock generation circuit, and 414 is a read clock generation circuit.
【0006】チューナ408、IF・映像検波回路40
9で得た小画面用映像信号は同期分離回路410でタイ
ミングを取った書込み用クロック発生回路413によ
り、例えばAフィールドメモリ411に書込まれる。こ
の間Bフィールドメモリ412に書込まれている1フィ
ールド前の映像信号は、親画面の映像信号から同期分離
回路407で分離した同期信号にしたがって挿入タイミ
ングを決められた読出し用クロック発生回路414のク
ロックにより読み出され、小画面挿入回路402により
親画面の映像信号に挿入される。ここで子画面用のフィ
ールドメモリへの書込みを停止すれば、静止した映像が
得られる。Tuner 408, IF / video detection circuit 40
The small-screen video signal obtained in step 9 is written in, for example, the A field memory 411 by the write clock generation circuit 413 which is timed by the sync separation circuit 410. During this period, the video signal of one field before written in the B field memory 412 is the clock of the read clock generation circuit 414 whose insertion timing is determined according to the sync signal separated by the sync separation circuit 407 from the video signal of the parent screen. Is read out and inserted into the video signal of the parent screen by the small screen insertion circuit 402. If the writing to the field memory for the small screen is stopped here, a still image can be obtained.
【0007】所で以上説明した従来のPinPテレビにお
ける子画面は、走査線数を例えば1/3、水平周期のサ
ンプル数を例えば100と少なくしているため、画質が
粗く、細かい文字まで読むことができないという欠点が
あった。また実用的に他チャンネルの番組を同時に選局
して見る必要性、換言すれば見たいという要求が少な
く、従って実用上の存在意義が疑わしいなどの問題もあ
った。The child screen of the conventional PinP television described above has a scan line number of, for example, ⅓ and a horizontal period sample number of, for example, 100, so that the image quality is rough and fine characters can be read. There was a drawback that you couldn't. In addition, there is also a problem that it is practically not necessary to simultaneously select and watch programs on other channels, in other words, there is a small demand to watch the programs, and thus the significance of existence in practical use is doubtful.
【0008】[0008]
【発明が解決しようとする課題】本発明は、上述のよう
な従来の技術的事情にかんがみなされたものであり、従
って本発明の目的は、親画面であると子画面であるとに
かかわりなく、画像が高画質である2画面表示機能付高
画質テレビジョン受信機を提供することにある。The present invention has been made in view of the above-mentioned conventional technical circumstances, and therefore the object of the present invention is regardless of whether it is a parent screen or a child screen. , To provide a high-definition television receiver with a two-screen display function, which has a high image quality.
【0009】[0009]
【課題を解決するための手段】この目的を達成するため
に、本発明では、ラインメモリとフィールドメモリを有
し、静止画に切り替えられたときには、フィールドメモ
リに記憶された画像と動画とを、同等のサイズで同一画
面上で両方の画像を見ることのできる2画面表示機能付
きのテレビジョン受信機であることを特徴とする。In order to achieve this object, the present invention has a line memory and a field memory, and when a still image is switched, an image and a moving image stored in the field memory, It is characterized in that it is a television receiver with a two-screen display function that allows both images to be viewed on the same screen with the same size.
【0010】[0010]
【作用】本発明によれば、ラインメモリとフィールドメ
モリを備えることにより、静止画に切り替えられたとき
には、フィールドメモリに記憶された画像と動画とを、
同等のサイズで同一画面上で両方の画像を見ることがで
きる。According to the present invention, by providing the line memory and the field memory, when the still image is switched, the image and the moving image stored in the field memory are
You can see both images on the same screen with the same size.
【0011】[0011]
【実施例】以下、本発明の一実施例を図1ににより説明
する。図1は本発明によるテレビジョン受信機の機能を
示すブロック図であり、同図において501は走査線変
換回路、502は偏向回路であり、図11におけるのと
同一部分には同一符号を付している。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a block diagram showing the function of the television receiver according to the present invention. In FIG. 1, reference numeral 501 is a scanning line conversion circuit, 502 is a deflection circuit, and the same parts as in FIG. ing.
【0012】次に、本発明の実施例の動作について説明
する。アンテナ401、チューナ405、IF・映像検
波回路406で処理された映像信号は、同期分離回路4
07により同期信号を分離し、さらに2倍の繰り返し周
波数をもつ水平同期信号を発生する。この2倍の周波数
の水平同期信号と垂直同期信号とにより、偏向回路50
2は走査系を駆動する。走査線変換回路501で変換さ
れた映像信号は、映像処理回路403により各種のコン
トロール(例えば、コントラスト,色相,飽和度,画質
等)が施された後、ブラウン管404に表示される。Next, the operation of the embodiment of the present invention will be described. The video signal processed by the antenna 401, the tuner 405, and the IF / video detection circuit 406 is the sync separation circuit 4
The sync signal is separated by 07, and a horizontal sync signal having a double repetition frequency is generated. The deflection circuit 50 is driven by the horizontal synchronizing signal and the vertical synchronizing signal having twice this frequency.
2 drives the scanning system. The video signal converted by the scanning line conversion circuit 501 is displayed on the cathode ray tube 404 after being subjected to various controls (for example, contrast, hue, saturation, image quality, etc.) by the video processing circuit 403.
【0013】次に、走査線変換回路501について図2
に詳細なブロック図を示し、その動作を説明する。Next, the scanning line conversion circuit 501 is shown in FIG.
A detailed block diagram is shown in FIG.
【0014】図2において601は輝度信号入力端子、
602はフィールドメモリ、603はスイッチ
(S1)、604,605はラインバッファメモリ、6
06はスイッチ(S2)、607はスイッチ(S3)、6
08,609,610はラインメモリ、611はスイッ
チ(S4)、612は平均器、613は信号多重器、6
14は輝度信号出力端子、615は同期信号入力端子、
616は制御回路、617は画面切換スイッチ(S5)
である。In FIG. 2, reference numeral 601 denotes a luminance signal input terminal,
602 is a field memory, 603 is a switch (S 1 ), 604 and 605 are line buffer memories, 6
06 is a switch (S 2 ), 607 is a switch (S 3 ), 6
Reference numerals 08, 609 and 610 are line memories, 611 is a switch (S 4 ), 612 is an averager, 613 is a signal multiplexer, 6
14 is a luminance signal output terminal, 615 is a synchronization signal input terminal,
616 is a control circuit, and 617 is a screen changeover switch (S 5 ).
Is.
【0015】最初に輝度信号について説明する。まず、
入力端子601に輝度信号が入力した時、フィールドメ
モリ602は1フィールド分の映像を記憶する。記憶さ
れている画面はフィールド毎に新しい画面が書込まれる
ため、現在の映像とフィールドメモリに記憶された映像
は常に1フィールドずれている。画面切換スイッチ61
7を2画面に切換えると、制御回路616から出力され
る制御信号によりフィールドメモリ602が制御され
て、その書込みが停止し読出しだけの状態となる。同状
態の時、フィールドメモリ602の出力には静止した画
像情報が出力される。First, the luminance signal will be described. First,
When a luminance signal is input to the input terminal 601, the field memory 602 stores an image for one field. Since a new screen is written for each field in the stored screen, the current video and the video stored in the field memory are always shifted by one field. Screen switch 61
When 7 is switched to 2 screens, the field memory 602 is controlled by the control signal output from the control circuit 616, the writing is stopped and only the reading is performed. In the same state, still image information is output to the output of the field memory 602.
【0016】この画像情報はスイッチ(S1)603に
よりラインバッファメモリ604,605のいずれか一
方が選択されて書き込まれる。一方のラインバッファメ
モリ(例えば604)が書込みの時、もう一方のライン
バッファメモリ(例えば605)は読出し状態となり、
スイッチ(S2)606と接続されて画像情報が出力さ
れる。このラインバッファは書込み時の4倍の速さのク
ロックで画像情報を読出すため、水平周波数が通常の2
倍のテレビジョンに写せば、画像は水平方向に1/2に
圧縮される。This image information is written by selecting one of the line buffer memories 604 and 605 by the switch (S 1 ) 603. When one line buffer memory (eg 604) is writing, the other line buffer memory (eg 605) is in a read state,
Image information is output by being connected to the switch (S 2 ) 606. Since this line buffer reads image information at a clock which is four times as fast as writing, the horizontal frequency is 2
If it is displayed on a double television, the image is horizontally compressed to 1/2.
【0017】次にもう一方の信号の流れているラインメ
モリの動作について説明する。入力端子601から輝度
信号が入力した時、スイッチ(S3)607は水平周期
毎に切り換わり、次段のラインメモリのいずれか一つに
信号を接続する。ラインメモリは図5に示すように書込
み(W)は通常の速さで行ない、読出し(R)は書込み
時の2倍の速さで読出す。これを3つのラインメモリが
図5に示すようなタイミングで交互に繰返すことにより
連絡した2倍の速さの映像信号が得られる。スイッチ
(S4)611はラインメモリから出力してきた映像信
号を図5A,Bのように切り換えて2系統の連続した映
像信号を出力する。Next, the operation of the line memory in which the other signal is flowing will be described. When a luminance signal is input from the input terminal 601, the switch (S 3 ) 607 switches every horizontal period and connects the signal to any one of the line memories in the next stage. In the line memory, as shown in FIG. 5, writing (W) is performed at a normal speed and reading (R) is performed at a speed twice as fast as writing. This is repeated by the three line memories at the timings shown in FIG. 5 so that a video signal at twice the speed of communication can be obtained. The switch (S 4 ) 611 switches the video signal output from the line memory as shown in FIGS. 5A and 5B and outputs two continuous video signals.
【0018】尚、A信号列とB信号列は常にA信号列の
方がB信号列より1/2水平周期だけ遅れている。The A signal train and the B signal train are always delayed by 1/2 horizontal cycle from the B signal train.
【0019】このA信号列とB信号列を平均器612に
より平均をとれば、図5Cに示すように上下の走査線間
に新たに上下走査線の平均をとった走査線が補間された
高画質な信号が得られる。また、平均器612におい
て、A信号列かB信号列のどちらか一方だけを取りだせ
ば、走査線が2度繰返しの高画質な信号が得られる。こ
こで、図2中の画面切換スイッチ(S5)617を2画
面側に切換えた時、制御回路616から出力される制御
信号により3つのラインメモリ608,609,610
は、書込み時に映像情報の量を半分にし、読出しは書込
み時の2倍の速さで読出す。If the A signal sequence and the B signal sequence are averaged by the averaging device 612, a scanning line obtained by newly averaging the upper and lower scanning lines is interpolated between the upper and lower scanning lines as shown in FIG. 5C. An image quality signal can be obtained. Further, if only one of the A signal train and the B signal train is taken out by the averaging device 612, a high-quality signal in which the scanning line is repeated twice can be obtained. Here, when the screen selector switch (S 5 ) 617 in FIG. 2 is switched to the 2 screen side, three line memories 608, 609, 610 are generated by the control signal output from the control circuit 616.
Halves the amount of video information at the time of writing, and reads at twice the speed of reading.
【0020】その様子を図6を用いて説明する。同図の
長方形は一つのラインメモリを示し、その中の1区切り
が1サンプルのはいるマスを示す。同図(a)は通常の
ラインメモリの動作を示し映像情報が順番に1から書込
まれる。(b)は2画面時のラインメモリの様子を示し
ており、映像情報は1から順番に送られてくるが、書込
み時に映像情報を1つおきに書込む事によって情報量を
半分にする。The situation will be described with reference to FIG. The rectangle in the same figure shows one line memory, and one division in the rectangle shows a cell in which one sample is inserted. FIG. 1A shows the operation of a normal line memory, and video information is written from 1 in order. (B) shows the state of the line memory in the case of two screens, and the video information is sent in order from 1, but the information amount is halved by writing every other video information at the time of writing.
【0021】読出しは通常通りに頭から2倍の速さで読
出すことにより、出力には水平方向に1/2に圧縮され
た映像情報が得られる。また信号多重器613により、
図7に見られるように画面の真中で左側に動画、右側に
静止画を写し出す操作をする事により、同図に見られる
ような所望画像の静止画をその動画と同時に見ることが
できる。画面切換スイッチ(S5)617を通常画面に
切換えれば、画面は1画面となり通常の動画を見ること
ができる。The reading is performed at a speed twice as fast as the head as usual, so that the image information compressed in the horizontal direction by 1/2 can be obtained at the output. Also, by the signal multiplexer 613,
As shown in FIG. 7, by performing an operation of projecting a moving image on the left side and a still image on the right side in the center of the screen, a still image of a desired image as shown in the figure can be viewed at the same time as the moving image. If the screen change switch (S 5 ) 617 is switched to the normal screen, the screen becomes one screen and a normal moving image can be viewed.
【0022】次に色差信号について説明する。図3は図
1中の走査線変換回路501の色差信号の処理を示すブ
ロック図であり、620,621は色差信号入力端子、
622は色差信号多重器、623は色差信号分離器、6
24,625は色差信号出力端子である。また、図2と
同一部分には同一符号を付し、その動作は輝度信号の場
合と同じなので説明を省略する。Next, the color difference signal will be described. FIG. 3 is a block diagram showing the processing of the color difference signal of the scanning line conversion circuit 501 in FIG. 1, 620 and 621 are color difference signal input terminals,
622 is a color difference signal multiplexer, 623 is a color difference signal separator, 6
Reference numerals 24 and 625 are color difference signal output terminals. Further, the same parts as those in FIG. 2 are denoted by the same reference numerals, and the operation thereof is the same as that of the case of the luminance signal, and thus the description thereof will be omitted.
【0023】色差信号(R−Y,B−Y)が色差信号入
力端子620,621にそれぞれ図4イ,ロに示すよう
に入力した時、色差信号多重器622は図4ハに示すよ
うに2つの色差信号を点順次に多重する。When the color difference signals (RY, BY) are input to the color difference signal input terminals 620 and 621 as shown in FIGS. 4A and 4B, respectively, the color difference signal multiplexer 622 is arranged as shown in FIG. Two color difference signals are dot-sequentially multiplexed.
【0024】ここで色差信号は輝度信号に比べて情報量
が半分になるが、色差信号の周波数帯域が輝度信号のそ
れに比べて狭いので、視覚上何ら問題はない。Here, the color difference signal has half the information amount as compared with the luminance signal, but since the frequency band of the color difference signal is narrower than that of the luminance signal, there is no visual problem.
【0025】こうして多重された色差信号は輝度信号と
同様に処理され色差信号分離器623に入力される。色
差信号分離器623は、色差信号多重器622と逆の操
作を行う。つまり、点順次に多重された色差信号を交互
に2系統の出力に取り出す事により、色差信号出力端子
624,625には分離された色差信号(R−Y,B−
Y)が得られる。The color difference signals thus multiplexed are processed in the same manner as the luminance signal and input to the color difference signal separator 623. The color difference signal separator 623 performs an operation reverse to that of the color difference signal multiplexer 622. That is, the color-difference signals multiplexed in a dot-sequential manner are alternately taken out to the outputs of the two systems, so that the separated color-difference signals (RY, B- are output to the color-difference signal output terminals 624 and 625.
Y) is obtained.
【0026】また、静止画を白黒画面として表示する場
合には、図3のフィールドメモリ602、スイッチ(S
1)603、ラインバッファ604,605、スイッチ
(S2)606を取り去るだけで実現できる。When displaying a still image as a monochrome screen, the field memory 602 and switch (S
1 ) 603, line buffers 604, 605, and switch (S 2 ) 606 can be removed.
【0027】[0027]
【発明の効果】本発明によれば、ラインメモリとフィー
ルドメモリを備えることにより、静止画に切り替えられ
たときには、フィールドメモリに記憶された画像と動画
とを、同等のサイズで同一画面上で両方の画像を見るこ
とができる効果がある。According to the present invention, by providing a line memory and a field memory, when switching to a still image, both the image and the moving image stored in the field memory are of the same size on the same screen. There is an effect that you can see the image.
【図1】本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.
【図2】輝度信号の走査線変換回路の一具体例を示すブ
ロック図である。FIG. 2 is a block diagram showing a specific example of a scanning line conversion circuit for a luminance signal.
【図3】色差信号の走査線変換回路の一具体例を示すブ
ロック図である。FIG. 3 is a block diagram showing a specific example of a scanning line conversion circuit for color difference signals.
【図4】色差信号の多重方法を説明する模式図である。FIG. 4 is a schematic diagram illustrating a method of multiplexing color difference signals.
【図5】ラインメモリの動作を示すタイミング図であ
る。FIG. 5 is a timing chart showing the operation of the line memory.
【図6】2画面時のラインメモリの動作を説明する模式
図である。FIG. 6 is a schematic diagram for explaining the operation of the line memory when there are two screens.
【図7】本発明による2画面テレビの画面の概念図であ
る。FIG. 7 is a conceptual diagram of a screen of a dual screen television according to the present invention.
【図8】PinP(ピクチヤ・イン・ピクチヤ)画面の概
念図である。FIG. 8 is a conceptual diagram of a PinP (picture-in-picture) screen.
【図9】小画面挿入法を説明するための説明図である。FIG. 9 is an explanatory diagram for explaining a small screen insertion method.
【図10】小画面挿入法を説明するための説明図であ
る。FIG. 10 is an explanatory diagram for explaining a small screen insertion method.
【図11】従来の小画面挿入テレビを示すブロック図で
ある。FIG. 11 is a block diagram showing a conventional small screen insertion television.
401…アンテナ、403…映像処理回路、404…ブ
ラウン管、405…チューナ、406…IF・映像検波
回路、407…同期分離回路、501…走査線変換回
路、502…偏向回路、601…輝度信号入力端子、6
02…フィールドメモリ、603…スイッチ(S1)、
604,605…ラインバッファ、606…スイッチ
(S2)、607…スイッチ(S3)、608,609,
610…ラインメモリ、611…スイッチ(S4)、6
12…平均器、613…信号多重器、614…輝度信号
出力端子、615…同期信号入力端子、616…制御回
路、617…画面切換スイッチ(S5)、620,62
1…色差信号入力端子、622…色差信号多重器、62
3…色差信号分離器、624,625…色差信号出力端
子401 ... Antenna, 403 ... Image processing circuit, 404 ... CRT, 405 ... Tuner, 406 ... IF / video detection circuit, 407 ... Sync separation circuit, 501 ... Scan line conversion circuit, 502 ... Deflection circuit, 601 ... Luminance signal input terminal , 6
02 ... field memory, 603 ... switch (S 1 ),
604, 605 ... Line buffer, 606 ... Switch (S 2 ), 607 ... Switch (S 3 ), 608, 609,
610 ... Line memory, 611 ... Switch (S 4 ), 6
12 ... Averager, 613 ... Signal multiplexer, 614 ... Luminance signal output terminal, 615 ... Sync signal input terminal, 616 ... Control circuit, 617 ... Screen changeover switch (S 5 ), 620, 62
1 ... Color difference signal input terminal, 622 ... Color difference signal multiplexer, 62
3 ... Color difference signal separator, 624, 625 ... Color difference signal output terminal
Claims (3)
映像信号を記憶し画像を水平方向に圧縮することができ
る記憶圧縮手段と、同一画面上に、前記圧縮手段から出
力された動画像と、前記記憶圧縮手段から出力された静
止画像とを切り替える切り替え手段と、を有し、同時に
2つの画面を表示することのできることを特徴とする2
画面表示機能付高画質テレビジョン受信機。1. A compression unit for horizontally compressing an image,
A storage compression unit capable of storing a video signal and compressing an image in the horizontal direction, and a switch for switching between a moving image output from the compression unit and a still image output from the storage compression unit on the same screen. And a means capable of displaying two screens at the same time.
High-definition television receiver with screen display function.
テレビジョン受信機において、前記圧縮手段及び前記記
憶圧縮手段は、各々水平方向に1/2に圧縮することを
特徴とする2画面表示機能付高画質テレビジョン受信
機。2. The high-definition television receiver with a dual-screen display function according to claim 1, wherein the compression means and the storage compression means each compress horizontally to 1/2. High-definition television receiver with display function.
テレビジョン受信機において、入力信号をY/C分離す
ることによって得られる2つの色差信号は、点順次に多
重してから前記圧縮手段及び前記記憶圧縮手段において
処理することを特徴とする2画面表示機能付高画質テレ
ビジョン受信機。3. The high-definition television receiver with a dual-screen display function according to claim 1, wherein two color difference signals obtained by Y / C separating the input signals are point-sequentially multiplexed and then compressed. High-definition television receiver with a dual-screen display function, characterized in that processing is performed by the means and the storage compression means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13551795A JPH0851576A (en) | 1995-06-02 | 1995-06-02 | High image quality television receiver with two-screen display function |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13551795A JPH0851576A (en) | 1995-06-02 | 1995-06-02 | High image quality television receiver with two-screen display function |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4828685A Division JPH0638649B2 (en) | 1985-03-13 | 1985-03-13 | High-definition television receiver with dual-screen display function |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0851576A true JPH0851576A (en) | 1996-02-20 |
Family
ID=15153622
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13551795A Pending JPH0851576A (en) | 1995-06-02 | 1995-06-02 | High image quality television receiver with two-screen display function |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0851576A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6247280A (en) * | 1985-08-26 | 1987-02-28 | Hitachi Ltd | High definition television receiving having two screen display function |
JPH0846889A (en) * | 1995-06-02 | 1996-02-16 | Hitachi Ltd | High image quality television receiver with two-screen display function |
JPH0851575A (en) * | 1995-06-02 | 1996-02-20 | Hitachi Ltd | High image quality television receiver with two-screen display function |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57109477A (en) * | 1980-12-26 | 1982-07-07 | Hitachi Ltd | Two picture television receiver |
JPS6017072B2 (en) * | 1978-09-05 | 1985-04-30 | 三菱電機株式会社 | red hot metal detector |
JPH0846889A (en) * | 1995-06-02 | 1996-02-16 | Hitachi Ltd | High image quality television receiver with two-screen display function |
JPH0851575A (en) * | 1995-06-02 | 1996-02-20 | Hitachi Ltd | High image quality television receiver with two-screen display function |
-
1995
- 1995-06-02 JP JP13551795A patent/JPH0851576A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6017072B2 (en) * | 1978-09-05 | 1985-04-30 | 三菱電機株式会社 | red hot metal detector |
JPS57109477A (en) * | 1980-12-26 | 1982-07-07 | Hitachi Ltd | Two picture television receiver |
JPH0846889A (en) * | 1995-06-02 | 1996-02-16 | Hitachi Ltd | High image quality television receiver with two-screen display function |
JPH0851575A (en) * | 1995-06-02 | 1996-02-20 | Hitachi Ltd | High image quality television receiver with two-screen display function |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6247280A (en) * | 1985-08-26 | 1987-02-28 | Hitachi Ltd | High definition television receiving having two screen display function |
JPH0846889A (en) * | 1995-06-02 | 1996-02-16 | Hitachi Ltd | High image quality television receiver with two-screen display function |
JPH0851575A (en) * | 1995-06-02 | 1996-02-20 | Hitachi Ltd | High image quality television receiver with two-screen display function |
JP2713699B2 (en) * | 1995-06-02 | 1998-02-16 | 株式会社日立製作所 | High-definition television receiver with two-screen display function |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100255907B1 (en) | Image signal processor and tv signal processing device | |
EP0716543B1 (en) | Multi-picture television receiver | |
EP0717562B1 (en) | Method and apparatus for displaying two video pictures simultaneously | |
JPH03135179A (en) | Picture-in-picture circuit device for television equipment | |
JP2713699B2 (en) | High-definition television receiver with two-screen display function | |
JPH0851576A (en) | High image quality television receiver with two-screen display function | |
JPH0846889A (en) | High image quality television receiver with two-screen display function | |
JP2685432B2 (en) | Television receiver with two-screen display function | |
JPH0512907B2 (en) | ||
JPH0638649B2 (en) | High-definition television receiver with dual-screen display function | |
KR100385975B1 (en) | Apparatus for converting video format and method thereof | |
JP2993460B2 (en) | Television receiver with two-screen display function | |
JP2749032B2 (en) | Television receiver | |
JPS62108680A (en) | Television receiver | |
JP2545853B2 (en) | Television receiver capable of simultaneously displaying multi-system signals | |
JP3712287B2 (en) | Video image display method | |
KR0148187B1 (en) | Double screen and pip circuit | |
JP2545631B2 (en) | Television receiver | |
JP2690790B2 (en) | Television receiver | |
JPH0998393A (en) | Television receiver for teletext broadcasting | |
JP3258754B2 (en) | Television receiver | |
JPS6047792B2 (en) | 2-screen color television receiver | |
EP0838944A1 (en) | TV receiver with teletext function | |
JPH0998389A (en) | Television receiver for teletext broadcasting | |
JPH09116829A (en) | Multi-screen television receiver |