JPH08335864A - Mos analog switch - Google Patents

Abstract

PURPOSE: To provide a MOS analog switch which reduces the field through noise generated at the time of turning off a switch. CONSTITUTION: When switches 13 and 14 are in the turning-on state, the switch 14 is turned off, and next, the switch 13 is turned off, and finally, the switch 14 is turned on, thereby cancelling the field through noise, which is generated at the time of turning off the switch 13, by turning-on of the switch 14. Thus, the field through noise for switching is reduced.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a MOS (Complementary M
etal Oxide Semiconductor) analog switch,
In particular, applying this MOS analog switch to the sample and hold circuit, switching (switch ON and OF
F) Reduction of feedthrough noise generated when

[0002]

2. Description of the Related Art In a MOS transistor, parasitic capacitances such as inter-electrode capacitances Cgs and Cgd formed by overlapping a gate electrode between a source and a drain region and junction capacitances Css and Cds formed by a source and a drain region between a substrate. There is capacity.

On the other hand, the problem with the analog switch is that the control signal leaks from the gate to the source and drain when the switch is off because of the parasitic capacitances Cgs and Cgd existing between the gate and the source and drain. That is. Therefore, an error voltage Verror (Verror = Vout−Vin), which is the difference between the output voltage Vout and the input voltage Vin, is generated. The error voltage Verror is hereinafter referred to as feedthrough noise.

[0004]

This feedthrough noise has a problem that it causes an output voltage deviation in the sample hold circuit.

An object of the present invention is to provide a MOS analog switch which reduces the feedthrough noise of the above MOS analog switch.

[0006]

The MOS analog switch of the present invention is an analog switch Q1 of a MOS transistor Q1.
In contrast, the MOS transistor Q2 (switch Q2) is connected in series. Q1 can be turned on and off by the control signals S1 and S2 that control the switches of Q1 and Q2.
The feed-through noise generated in 2 is canceled by the feed-through noise generated by Q2.

[0007]

The MOS transistor Q2 is connected in series to the drain side of the transistor Q1 with respect to the analog switch of the MOS transistor Q1 as described above. The transistors Q1 and Q2 are transistors having the same gate length and gate width. ON and OFF by control signals S1 and S2 that control the switches of the transistors Q1 and Q2.
Shall be allowed.

The input voltage Vin is the source side of the transistor Q1 and the output voltage Vout is the drain side of the transistor Q2.

When the transistors Q1 and Q2 are in the ON state, the input voltage is equal to the output voltage. Therefore, the relationship between the input voltage and the output voltage is (Equation 1).

[0010]

[Equation 1]

Next, the transistor Q2 is turned off. At this time, feedthrough noise Verror occurs due to the gate-source capacitance Cgd2 of the transistor Q2. Therefore, the relationship between the input voltage and the output voltage is (Equation 2).

[0012]

[Equation 2]

Next, the transistor Q2 is turned off, and the transistor Q1 is turned off. At this time, since the transistor Q2 is in the OFF state, the relationship between the input voltage and the output voltage remains unchanged (Equation 3).

Next, the transistor Q1 is turned off while the transistor Q1 is turned off. At this time, since the feedthrough noise Verror is canceled, the input voltage and the output voltage become equal to each other as shown in (Equation 1).

As a result, the feedthrough noise caused by turning the switch off can be reduced.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of an embodiment of a MOS analog switch of the present invention. Where 11 is the input voltage, 12 is the output voltage, 13 and 14 are MOS transistors, and 15 and 1
6 is ON of the transistors 13 and 14, and
Control signal for controlling the OFF state, 17 is the transistor 1
3, reference numeral 3 denotes a gate-drain capacitance, 18 denotes a gate-source capacitance of the transistor 14, 19 denotes a gate-drain capacitance of the transistor 14, and 10 denotes a capacitor for holding an output voltage. The transistors 13 and 14
As the transistor, a transistor having the same gate length and gate width is used.

The switching operation of the transistors 13 and 14 is shown in FIG. In the state 1, the transistors 13 and 14 are turned on. At this time, input voltage 11
And the output voltage 12 are equal.

Next, state 2, that is, the transistor 13 described above.
The transistor 14 is turned off with the transistor turned on. At this time, by turning off the transistor 14, feedthrough noise occurs in the output voltage 12.

Next, state 3, that is, the transistor 14
With the transistor turned off, turn off the transistor 13
To

Next, state 4, that is, the transistor 13 described above.
With the transistor turned off, the transistor 14 is turned on. At this time, by turning on the transistor 14, the feedthrough noise generated in the output voltage 12 is canceled.

The structure of a conventional analog switch is shown in FIG. Where 31 is the input voltage, 32 is the output voltage, and 33 is
MOS transistor, 34 is O of the transistor 33
N is a control signal for controlling the OFF state, 35 is the gate-source capacitance of the transistor 33, 36 is the gate-drain capacitance of the transistor 33, and 37 is the output voltage 32.
Respectively show capacitors for holding.

When the transistor 33 is turned off,
Feedthrough noise occurs in the output voltage. Therefore, by adopting the configuration shown in FIG. 1 and performing the switching operation shown in FIG. 2, feedthrough noise can be reduced.

[0023]

According to the present invention, two MOS transistors are connected in series,
By switching, it is possible to reduce the feedthrough noise generated during switching.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a sample hold circuit according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of an operation of a sample hold circuit according to an embodiment of the present invention.

FIG. 3 is a block diagram of a conventional sample hold circuit.

[Explanation of symbols]

11, 31 Input voltage 12, 32 Output voltage 13, 14, 33 MOS transistor 15, 16, 34 Transistor control signal 17, 19, 36 Transistor gate-drain parasitic capacitance 18, 35 Transistor gate-source parasitic capacitance 10, 37 Capacitor

Claims (1)

[Claims] 1. A MOS transistor Q1 and a MOS transistor Q2.
In an analog switch in which is connected in series, the switching operation of Q1 and Q2 is performed by turning on Q1 and Q2, then turning off Q2, then turning off Q1, and then turning on.
A MOS analog switch characterized by turning on Q2.