JPH0827808B2 - Test data editing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A device for editing test data for logic simulation, which comprises means for graphically displaying test data corresponding to external terminal pins of an integrated circuit, and is provided for any pin. By displaying the undefined area of the test data in a line when the corresponding test data is defined,
This makes it easy to grasp the number of patterns defined for each pin and enables efficient test data editing.

[Industrial applications]

The present invention relates to a test data editing device, and more particularly, when designing a logic IC (integrated circuit) or a logic LSI (large-scale integrated circuit) such as a gate array or a standard cell using a CAD (computer-aided design) system. And a device having a function of designating an external terminal pin of the logic IC or logic LSI, inputting data of a test pattern corresponding to the pin, and editing test data for logic simulation.

[Prior art and problems to be solved by the invention]

When editing test data for logic simulation using a CAD system, the procedure usually used is that the operator first uses an IC or LSI from the keyboard.
The data for designating the external terminal pin is input, and subsequently the data of the test pattern corresponding to the pin is input. Pin data is the external terminal name, such as VCC (power), CLK (clock), D (data), B (bus)
Etc. and its attributes, that is, designation of I (for signal input) or O (for signal output). On the other hand, in the test pattern data, the data of the signal actually input is input to the pin having the attribute for signal input, and the expected value data to be output is input to the pin having the attribute of signal output. , Defined by the combination of timing data and pattern data. The test data described in this way is called "text", but each data entered from the keyboard based on this text method is displayed as it is on the CRT (cathode ray tube) display. That is, it is displayed in the state of the language form at the time of key input.

FIG. 5 shows a display example of test data as an example of the conventional type, and FIG. 6 shows waveforms representing the display contents of FIG. In Fig. 5, DSP represents the display screen, V
, D0, D1, ..., CC, B0, B1, ..., External terminal names, I and O are attributes, and L5, H2, L1 ,. For example, the data corresponding to the terminal B1 for the bidirectional signal (in the signal output mode) is at the low (L) level until the time of 50 (ns), rises at that time, and goes high (up to the time of 70 (ns)). H) level is maintained, the signal falls at that point, changes similarly thereafter, and finally changes at 140 (ns).

As is clear from the display example shown in FIG. 5, according to the conventional test data editing mode, the test data corresponding to the external pin is displayed in the language mode. It is difficult to immediately and accurately recognize that the displayed contents shown in the figure represent the waveform shown in FIG. 6, and therefore, when the operator inputs the test data once displayed, the operator can check the input later. Has a problem in that the work becomes extremely complicated and may cause an input error by the operator in some cases, which inevitably reduces the efficiency of editing the test data as a whole.

Further, the test data of each pin shown in FIG. 5 are all composed of the same number, that is, 15 patterns, but according to the conventional form, even if the number of patterns of each pin is considered to be the same, it is calculated by the operator. There is a case where they do not match due to mistakes or the like, and it is extremely difficult to immediately and accurately recognize the final pattern for each pin. In other words, there is a problem that the number of patterns defined for each pin cannot be easily grasped.

The present invention was created in view of the above-mentioned problems in the prior art, and minimizes operator's input error, and enables easy input check of test data, particularly easy grasp of the number of patterns defined for each pin. In addition, it is an object of the present invention to provide a test data editing device that can improve the efficiency of test data editing.

[Means for solving the problem]

FIG. 1 shows a principle block diagram of a test data editing apparatus according to the present invention.

In FIG. 1, reference numeral 1 is a data input means for inputting data PDi designating an external terminal pin of the integrated circuit and logic simulation test data TDi corresponding to the pin. Reference numeral 2 denotes display means for displaying each data input from the data input means 1. Three
Is a display control means having a function of displaying data PDi indicating a pin input from the data input means 1 on the display means 2 and graphically displaying test data TDi corresponding to the pin. There is.

Reference numeral 4 is an undefined area designating means, and when the definition of the test data corresponding to the designated arbitrary pin is completed, the display control means 3 instructs the display means 2 to send the test data corresponding to the arbitrary pin. It is for instructing to display the undefined area of the line.

[Work]

When the pin data PDi and the test data TDi are input from the data input unit 1, the display control unit 3 normally displays the data PDi on the display unit 2, and the test data TDi
Is displayed graphically. In this case, when the definition of the test data corresponding to the specified arbitrary pin, that is, the input of the test data is completed, the undefined area designating unit 4 receives the command from the display control unit 3 and corresponds to the arbitrary pin. The undefined area of the test data to be displayed is displayed on the display means 2 in the form of a line.

Therefore, the operator can immediately and easily grasp up to what point the test data corresponding to an arbitrary pin is defined by visually recognizing the undefined area displayed on the line. This contributes to the efficiency of editing the test data and further helps to reduce the operator's input error.

〔Example〕

FIG. 2 shows a schematic CAD system configuration to which a test data editing apparatus according to an embodiment of the present invention is applied. In the figure, 20 is a system bus including a data bus, a control bus, etc.
21, a display 22, a memory 23, an MPU (microprocessor unit) 24 and a mouse 25 are connected to each other.

The keyboard 21 includes, in addition to ordinary keys such as ten keys and alphabets, change (change), deletion (delete), insertion (insert) of data displayed on the screen of the display 22.
Equipped with function keys to move. The keyboard 21 is for inputting data indicating an IC or LSI external terminal pin and data for a test pattern corresponding to this pin, and corresponds to the data input means 1 shown in FIG. . The data indicating a pin is a pin name, for example, VCC (power supply), CLK (clock), D (data), B (bus), etc. and its attributes, that is, I (for signal input) or O (for signal output). It is defined by a combination of the designation and, and in the actual input operation, data is input by operating the ten keys and the alphabet keys. On the other hand, for the test pattern data,
Timing is set using the direction keys, and test pattern data is input using the ten keys and the alphabet keys. For example, when inputting positive pulse data at the time of 20 (ns) as data for signal input, first operate the right direction directional key twice,
Then, the "1" key may be operated.

The display 22 is for displaying each data input from the keyboard 21, and displays the data designating the pin, that is, the pin name and its attribute as usual, and the test pattern data in the form of waveform display. To display a graphic. In this case, regarding the test data of the pin having the attribute for signal output, the state of the language form at the time of key input, that is, "H" or "L", is displayed along with the waveform display.
Is displayed. The display 22 corresponds to the display means 2 shown in FIG. The memory 23 is for storing each data input from the keyboard 21 in addition to the program representing the processing performed by the MPU 24.

The MPU 24 executes predetermined processing based on the program stored in the memory 23, and its basic function is as follows.
Each data input from the keyboard 21 is temporarily stored in the memory 23, and the display 22 is made to display the pin names and their attributes normally, and the test pattern data is displayed graphically in the form of a waveform display. . In this case, the MPU 24 causes the waveform display and the language form state (“H” or “L”) at the time of key input to be displayed for the test data of the pin having the attribute for signal output. Therefore, depending on whether or not the characters "H" or "L" are displayed on the screen of the display device 22, the operator determines whether the pin is a signal output pin or a signal input pin. Can be recognized easily, immediately and accurately.

Another function of the MPU24 is that when the definition of the test data corresponding to any specified pin is completed,
On the other hand, it has a function of controlling to display the undefined area of the test data corresponding to the arbitrary pin as a line. This allows the operator to define to what point the test data corresponding to a given pin is defined, in other words,
The number of patterns defined for the pin can be grasped easily and immediately. The MPU 24 corresponds to the display control means 3 and the undefined area designating means 4 shown in FIG.

The mouse 25 is used when a figure or the like is created on the screen of the display 22 based on a manual operation.

FIG. 3 shows a flow chart for explaining test data editing by the apparatus shown in FIG.

First, in step 301, the name of the test data to be edited is defined, and in step 302, the IC or LSI pin number N and the variable i are initialized. In the next step 303, pin Pi names such as VCC, CLK, D, B, etc., and attributes for instructing signal input (I) or signal output (O) are defined. Steps 301 to 303 are executed by an input operation from the keyboard 21. The variable i assigned to the pin Pi name does not follow the pin arrangement order, but follows the pin data input order defined by the operator. Next steps
In 304, the test data name entered from the keyboard 21,
The pin name and its attribute are displayed on the display 22.

In step 305, the test data TDi (in this case T
The input operation of D ₁ ) is performed via the keyboard 21. In the actual input operation, first use the directional key, usually the right directional key, to move the cursor on the screen to set the timing data, and then use the alphabet keys or numeric keypad to input the pattern data. . This pattern data is "1" or "0" for a pin having an I (for signal input) attribute, and O
The pin having the attribute (for signal output) is “H” or “L”. In the next step 306, the input test data TDi is displayed graphically. In this case, when the attribute of the pin is "O", the character display of the test data is performed together with the graphic display as described above. As a result, it is possible to intuitively distinguish between the signal input pin and the signal output pin.

In step 307, the designated pin Pi (P in this case P
_The test data was further defined for ₁ ) (YES)
Whether or not (NO) is judged by MPU24, and judgment is YES
If NO, go to step 308; if NO, go to step 3
Go to 09. In step 308, the continuous display, that is, the graphic display in step 306 is continued, and step 3
Return to 07. In step 309, in response to the command from the MPU 24, the display unit 22 displays the test data TD corresponding to the designated pin P _1.
One undefined area, that is, the portion after the final pattern in the area which has already been graphically displayed on the screen, is displayed as a line.

In the next step 310, the data displayed on the screen of the display 22, that is, the test data name, the pin name, the attribute and the test data are stored in the memory 23, and step 311
Then, test data for logical simulation is created. Steps 310 and 311 are executed by the MPU 24. In the next step 312, it is judged whether the value of the variable i is equal to the value of the number of pins N (YES) or not (NO), and the judgment is YES.
If the determination is NO, the flow ends. If the determination is NO, the process proceeds to step 313. In step 313, the value of i is incremented (i = 2 in this case), and the process returns to step 303.

FIG. 4 shows an example of test data display on the display of the apparatus shown in FIG. In the figure, B3 to B0 are pin names representing the B (bus) terminals in the signal input (I) mode, and D1
Reference numerals 5 to D12 respectively represent pin names representing D (data) terminals for signal output (O). Further, DSP indicates a display screen, and a hatched portion A represents an undefined area of test data. According to the apparatus of this embodiment, the portion A is displayed by a "purple" line. As a result, the operator can immediately, easily, and accurately recognize the final pattern of the test data for each pin and the time point. For example, in the example shown in FIG. 4, it can be confirmed at a glance that the numbers of patterns of the pins B2 and B1 are both 8 and the time points of the final patterns match.

Further, since the test data is graphically displayed, it is possible to intuitively grasp the change of the signal, which enables the input error to be minimized and the test data to be easily checked.

〔The invention's effect〕

As described above, according to the present invention, the operator's input error is minimized, the test data is easily input, and in particular, the number of patterns defined for each pin is easily grasped.
It is possible to improve the efficiency of editing test data.

[Brief description of drawings]

FIG. 1 is a block diagram showing the principle of a test data editing apparatus according to the present invention, FIG. 2 is a CAD system configuration diagram to which an embodiment of the present invention is applied, and FIG. 3 is an explanation of test data editing by the apparatus of FIG. FIG. 4 is a diagram showing an example of test data display by the display of FIG. 2, FIG. 5 is a diagram showing an example of conventional test data display, and FIG. 6 is a display of FIG. It is a waveform diagram showing the contents. (Explanation of symbols) 1 ... data input means, 2 ... display means, 3 ... display control means, 4 ... undefined area indicating means, PDi ... pin data, TDi ... test data.

Claims (1)

[Claims] 1. A means (1) for inputting data (PDi) designating an external terminal pin of an integrated circuit and test data (TDi) for logic simulation corresponding to the pin.
A means (2) for displaying each data inputted from the data input means, and a data (PDi) indicating a pin inputted from the data input means on the display means, Display control means (3) for graphically displaying the test data (TDi) corresponding to the pin, and the display means by a command from the display control means when the definition of the test data corresponding to the specified arbitrary pin is completed. And a means (4) for instructing to display the undefined area of the test data corresponding to the arbitrary pin in a line.