JPH08167608A - Wirings structure and liquid crystal element - Google Patents
Wirings structure and liquid crystal elementInfo
- Publication number
- JPH08167608A JPH08167608A JP6312220A JP31222094A JPH08167608A JP H08167608 A JPH08167608 A JP H08167608A JP 6312220 A JP6312220 A JP 6312220A JP 31222094 A JP31222094 A JP 31222094A JP H08167608 A JPH08167608 A JP H08167608A
- Authority
- JP
- Japan
- Prior art keywords
- formation
- liquid crystal
- conductive member
- crystal element
- standard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 32
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 33
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims abstract description 12
- 239000004020 conductor Substances 0.000 claims description 23
- 229910006404 SnO 2 Inorganic materials 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 9
- 239000010409 thin film Substances 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 abstract description 5
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 abstract 2
- 230000004913 activation Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 9
- 229910052782 aluminium Inorganic materials 0.000 description 7
- 239000010408 film Substances 0.000 description 7
- 229910052804 chromium Inorganic materials 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 238000006479 redox reaction Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/13629—Multilayer wirings
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Liquid Crystal (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、液晶素子の画素電極等
に用いられるインジウム錫酸化物を導電部材と接続する
配線構造に関するもので、接続抵抗の低減を図ったもの
である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring structure for connecting indium tin oxide used for a pixel electrode or the like of a liquid crystal element to a conductive member, and is intended to reduce connection resistance.
【０００２】[0002]
【従来の技術】液晶素子は、１つの基板上に、薄膜トラ
ンジスタなどのスイッチング素子と、透明な画素電極が
形成され、この基板と対になるもう１つの基板との間に
液晶を挟み込み、さらに偏光板や配向膜、必要に応じて
カラーフィルタ等が配置されて概略構成される。こうし
た液晶素子を具備してなる液晶表示装置は、軽量、小
型、薄型化が容易で、さらに消費電力が低いなどの特長
を有している。2. Description of the Related Art A liquid crystal element is one in which a switching element such as a thin film transistor and a transparent pixel electrode are formed on one substrate, and a liquid crystal is sandwiched between this substrate and another substrate to form a polarized light. A plate, an alignment film, and, if necessary, a color filter and the like are arranged to be generally configured. A liquid crystal display device including such a liquid crystal element has features such as light weight, small size, easy thinning, and low power consumption.
【０００３】こうした液晶素子の要部を図４に示す。図
４に示す液晶素子においては、ガラスなどの透明な基板
１０上に、走査電極線と接続したＣｕなどの導電部材か
らなるゲート電極１２と、インジウム錫酸化物（以下、
ＩＴＯと略記する）からなる導電部材で形成された画素
電極１４が形成される。そして、これらを覆うように、
ＳｉＮxなどの絶縁材からなる絶縁層１６が積層されて
いる。さらに、ゲート電極１２の上方であって絶縁層１
６上には、アモルファスシリコン（ａ−Ｓｉ）からなる
半導体層１８が設けられ、さらにその半導体層１８上に
アルミニウムやＣｒ等の導電部材からなるソース電極２
０とドレイン電極２２とが形成されて概略構成されてい
る。この際、半導体層１８の最上層は、リンまたは不純
物イオンをドープしたアモルファスシリコン（ｎ+ａ−
Ｓｉ）からなる所謂オーミックコンタクト層２４とされ
ている。また、ドレイン電極２２は、絶縁層１６に開け
られたコンタクトホール２６を介して基板１０上に形成
された画素電極１４に接続されている。FIG. 4 shows the main part of such a liquid crystal element. In the liquid crystal element shown in FIG. 4, on a transparent substrate 10 such as glass, a gate electrode 12 made of a conductive member such as Cu connected to a scanning electrode line and an indium tin oxide (hereinafter, referred to as
The pixel electrode 14 is formed of a conductive member made of ITO (abbreviated as ITO). And to cover these,
An insulating layer 16 made of an insulating material such as SiN x is laminated. Furthermore, the insulating layer 1 is formed above the gate electrode 12.
A semiconductor layer 18 made of amorphous silicon (a-Si) is provided on the semiconductor layer 6, and the source electrode 2 made of a conductive material such as aluminum or Cr is further provided on the semiconductor layer 18.
0 and the drain electrode 22 are formed to have a schematic configuration. At this time, the uppermost layer of the semiconductor layer 18 is amorphous silicon (n + a −) doped with phosphorus or impurity ions.
It is a so-called ohmic contact layer 24 made of Si). The drain electrode 22 is connected to the pixel electrode 14 formed on the substrate 10 via a contact hole 26 formed in the insulating layer 16.
【０００４】また、図示していないが、これら絶縁層１
６とソース電極２０とドレイン電極２２などを覆って、
絶縁材からなるパシベーション層等が設けられる。さら
にまた、液晶素子として、このパシベーション層には配
向膜が形成され、この配向膜の上方には、間隔をおいて
配向膜を備えた透明基板が配置される。そして、対とな
った両基板の配向膜間に液晶が封入される。こうした液
晶素子では、画素電極により液晶の分子に電界を印加す
ると、液晶分子の配向制御ができるようになっている。Although not shown, these insulating layers 1
6, covering the source electrode 20, the drain electrode 22, etc.,
A passivation layer or the like made of an insulating material is provided. Furthermore, as a liquid crystal element, an alignment film is formed on the passivation layer, and a transparent substrate having the alignment film is arranged above the alignment film with a gap. Then, the liquid crystal is sealed between the alignment films of the pair of substrates. In such a liquid crystal element, alignment of liquid crystal molecules can be controlled by applying an electric field to the liquid crystal molecules by the pixel electrodes.
【０００５】[0005]
【発明が解決しようとする課題】上述したような液晶素
子においては、ＩＴＯの画素電極１４と接続している導
電部材のドレイン電極２２が、次第に酸化してくるとい
う問題があった。こうした酸化現象は、ＩＴＯとの接触
部分において特に起こりやすく、ＩＴＯとの接触界面に
酸化膜が生成されることがある。また、こうした酸化現
象は、導電部材がアルミニウムのときに特に生じやすい
傾向がある。こうした酸化現象が生じると、酸化物（例
えば、Ａｌ2Ｏ3）は一般に絶縁体であるため、接触抵抗
が増大し、消費電力の増大や起動不良等が起こりやすく
なる問題があった。The liquid crystal element as described above has a problem that the drain electrode 22 of the conductive member connected to the ITO pixel electrode 14 is gradually oxidized. Such an oxidation phenomenon is particularly likely to occur at the contact portion with ITO, and an oxide film may be formed at the contact interface with ITO. Further, such an oxidation phenomenon tends to occur particularly when the conductive member is aluminum. When such an oxidation phenomenon occurs, an oxide (for example, Al 2 O 3 ) is generally an insulator, so that there is a problem that contact resistance increases, power consumption increases, and startup failure easily occurs.
【０００６】本発明は前記課題を解決するためになされ
たもので、ＩＴＯと導電部材が接続する配線構造におい
て、導電部材の酸化を抑え、接触抵抗の増加を防止する
ことにある。The present invention has been made in order to solve the above problems, and is to suppress oxidation of a conductive member and prevent an increase in contact resistance in a wiring structure in which ITO and a conductive member are connected.
【０００７】[0007]
【課題を解決するための手段】請求項１記載の配線構造
は、インジウム錫酸化物よりなる導電部材と第２の導電
部材とが介在体を介して接続され、該介在体が、ＳｎＯ
2の標準生成エンタルピーよりもマイナス側の標準生成
エンタルピーの酸化物にならない導電体で構成されてい
ることを特徴とするものである。According to a first aspect of the present invention, there is provided a wiring structure in which a conductive member made of indium tin oxide and a second conductive member are connected via an interposition body, and the interposition body is made of SnO.
Is characterized in that more than two of the standard enthalpy of formation is composed of a negative side of the conductor does not become an oxide of the standard enthalpy of formation.
【０００８】請求項２記載の発明は、介在体が、銅また
は銀であることを特徴とする請求項１記載の配線構造で
ある。The invention according to claim 2 is the wiring structure according to claim 1, characterized in that the interposer is copper or silver.
【０００９】請求項３記載の配線構造は、インジウム錫
酸化物よりなる第１の導電部材と不純物が添加されたシ
リコンとが介在体を介して接続され、該介在体が、Ｓｎ
Ｏ2の標準生成エンタルピーよりもマイナス側の標準生
成エンタルピーの酸化物にならない導電体で構成されて
いることを特徴とするものである。According to another aspect of the wiring structure of the present invention, the first conductive member made of indium tin oxide and the impurity-added silicon are connected via an interposition body, and the interposition body is made of Sn.
It is characterized by being composed of a conductor that does not become an oxide having a standard enthalpy of formation on the negative side of the standard enthalpy of formation of O 2 .
【００１０】本発明の液晶素子は、薄膜トランジスタの
オーミックコンタクト層と、インジウム錫酸化物からな
る画素電極が、ＳｎＯ2の標準生成エンタルピーよりも
マイナス側の標準生成エンタルピーの酸化物にならない
導電体を間に介して接続されていることを特徴とするも
のである。In the liquid crystal device of the present invention, the ohmic contact layer of the thin film transistor and the pixel electrode made of indium tin oxide are disposed between the conductor which does not become an oxide having a standard formation enthalpy on the negative side of the standard formation enthalpy of SnO 2. It is characterized in that it is connected via.
【００１１】[0011]
【作用】本発明においては、介在体として、ＳｎＯ2の
標準生成エンタルピーよりもマイナス側の標準生成エン
タルピーの酸化物にならない導電体を使用することを必
須とする。各種酸化物の標準生成エンタルピー（ΔHf゜
(KJ/mol)）を表１に示す。In the present invention, it is essential to use, as an interposition, a conductor that does not become an oxide having a standard formation enthalpy on the negative side of the standard formation enthalpy of SnO 2 . Standard enthalpy of formation of various oxides (ΔHf °
(KJ / mol)) is shown in Table 1.
【００１２】[0012]
【表１】 [Table 1]
【００１３】表１に示されているように、本発明で基準
とするＳｎＯ2の標準生成エンタルピー（ΔHf゜）は、−
５８１(KJ/mol)である。したがって、原則として、この
値よりも大きい標準生成エンタルピーを有する金属酸化
物（No.１〜３６）を生成する金属及び合金が介在体と
して使用することができる。しかし、標準生成エンタル
ピーの大きいＭｎＯ（No.２４）又はＭｎＯ2（No.３
３）となるＭｎは、標準生成エンタルピーの小さいＭｎ
2Ｏ3（No.５８）にもなるので不適当である。同様に、
ＮｂＯ（No.２７）となるＮｂはＮｂＯ2（No.５０）
に、ＶＯ（No.２９）となるＶはＶ2Ｏ3（No.６８）に、
ＴｉＯ（No.３２）となるＴｉはＴｉ2Ｏ3（No.７５）
に、ＢａＯ（No.３５）となるＢａはＢａＯ2（No.４
６）にもなるので、本発明の介在体の材料からは除外さ
れる。As shown in Table 1, the standard enthalpy of formation (ΔHf °) of SnO 2 used in the present invention is −
581 (KJ / mol). Therefore, as a general rule, metals and alloys that form metal oxides (Nos. 1-36) with standard enthalpies of formation greater than this value can be used as inclusions. However, MnO (No. 24) or MnO 2 (No. 3) with a large standard enthalpy of formation
3) Mn is Mn having a small standard enthalpy of formation.
2 O 3 (No. 58) is also unsuitable. Similarly,
Nb that becomes NbO (No. 27) is NbO 2 (No. 50)
V which becomes VO (No. 29) is V 2 O 3 (No. 68),
Ti that becomes TiO (No. 32) is Ti 2 O 3 (No. 75)
In addition, Ba that becomes BaO (No. 35) is BaO 2 (No. 4).
Since it also corresponds to 6), it is excluded from the materials of the interposer of the present invention.
【００１４】尚、Ｎ2Ｏ5（No.２）は、Ｎが常温で気体
であるので、ＨｇＯ（No.４）は、Ｈｇが常温で液体で
あるので、Ｋ2Ｏ（No.２３）と、Ｎａ2Ｏ（No.２８）お
よびＮａ2Ｏ2（No.３１）は、Ｋ及びＮａ自体が非常に
不安定であるので不適当である。Since N 2 O 5 (No. 2) is a gas at room temperature, HgO (No. 4) is K 2 O (No. 23) because Hg is a liquid at room temperature. And Na 2 O (No. 28) and Na 2 O 2 (No. 31) are unsuitable because K and Na themselves are very unstable.
【００１５】従来からの、ＩＴＯと接触させていた導電
体に使用されていたＡｌやＣｒの場合、表１に示されて
いるように、Ａｌ2Ｏ3の標準生成エンタルピーは、−１
６７５(KJ/mol)であり、Ｃｒ2Ｏ3の標準生成エンタルピ
ーは、−１１４０(KJ/mol)であり、いずれもＳｎＯ2の
標準生成エンタルピー（−５８１(KJ/mol)）よりもマイ
ナス側に位置するものである。このことから、Ａｌ2Ｏ3
やＣｒ2Ｏ3は、ＩＴＯを構成するＳｎＯ2よりも安定し
た酸化物であることがわかる。従って、ＩＴＯにＡｌや
Ｃｒが接触すると、容易にＩＴＯを還元し、ＡｌやＣｒ
が酸化しやすくなっているのである。また、Ｍｏ、Ｔａ
やＴｉについても、それらの酸化物、ＭｏＯ2（No.３
８）、Ｔａ2Ｏ3（No.８９）、Ｔｉ3Ｏ5(No.９０)の標準
生成エンタルピーは、ＳｎＯ2の標準生成エンタルピー
よりもマイナス側にあるので除外される。In the case of Al and Cr which have been used in the conventional conductors that are in contact with ITO, the standard enthalpy of formation of Al 2 O 3 is -1 as shown in Table 1.
675 (KJ / mol), and the standard enthalpy of formation of Cr 2 O 3 is -1140 (KJ / mol), which is more negative than the standard enthalpy of formation of SnO 2 (-581 (KJ / mol)). It is located in. From this, Al 2 O 3
It can be seen that Cr 2 O 3 and Cr 2 O 3 are more stable oxides than SnO 2 forming ITO. Therefore, when Al or Cr comes into contact with ITO, the ITO is easily reduced and Al or Cr
Is easily oxidized. In addition, Mo, Ta
Also for Ti and Ti, their oxides, MoO 2 (No. 3
The standard enthalpies of formation of 8), Ta 2 O 3 (No. 89) and Ti 3 O 5 (No. 90) are on the negative side of the standard enthalpies of formation of SnO 2 and are therefore excluded.
【００１６】本発明では、ＩＴＯに関する配線構造にお
いて、標準生成エンタルピーに着目し、特定の標準生成
エンタルピーを有する酸化物のみを生成する導電体から
なる介在体をＩＴＯと接触させたことにより、導電体と
ＩＴＯ間の酸化還元反応を抑制し、接触抵抗の増加によ
る配線不良を防止したものである。In the present invention, attention is paid to the standard enthalpy of formation in the wiring structure relating to ITO, and the intermediary body made of a conductor that produces only an oxide having a specific standard formation enthalpy is brought into contact with ITO, whereby the conductor is formed. By suppressing the redox reaction between ITO and ITO, wiring failure due to an increase in contact resistance is prevented.
【００１７】なかでも、介在体をＣｕまたはＡｇで構成
したものが、それ自体の抵抗値も低く、好ましい。Among them, the one in which the interposition body is made of Cu or Ag is preferable because of its low resistance value.
【００１８】[0018]
【実施例】本発明の配線構造は、例えば、液晶素子にお
ける薄膜トランジスタとＩＴＯからなる画素電極の接続
に適用され得る。本発明を適用した液晶素子の一例を図
１に示す。図１に示す液晶素子は、ガラスなどの透明な
基板１０上に、走査電極線と接続したＣｕなどの導電部
材からなるゲート電極１２と、インジウム錫酸化物（Ｉ
ＴＯ）からなる画素電極１４が形成され、これらを覆う
ように、ＳｉＮxなどの絶縁材からなる絶縁層１６が積
層されている。さらに、ゲート電極１２の上方であって
絶縁層１６上には、アモルファスシリコン（ａ−Ｓｉ）
からなる半導体層１８が設けられ、さらにその半導体層
１８上にアルミニウムやＣｒ等の導電部材からなるソー
ス電極２０とドレイン電極２２とが形成されて概略構成
されている。この際、半導体層１８の最上層は、リンま
たは不純物イオンをドープしたアモルファスシリコン
（ｎ+ａ−Ｓｉ）からなるオーミックコンタクト層２４
とされている。EXAMPLES The wiring structure of the present invention can be applied to, for example, connection between a thin film transistor in a liquid crystal element and a pixel electrode made of ITO. An example of a liquid crystal element to which the present invention is applied is shown in FIG. The liquid crystal element shown in FIG. 1 has a gate electrode 12 made of a conductive material such as Cu connected to a scanning electrode line and a indium tin oxide (I) on a transparent substrate 10 such as glass.
A pixel electrode 14 made of TO) is formed, and an insulating layer 16 made of an insulating material such as SiN x is laminated so as to cover these. Furthermore, amorphous silicon (a-Si) is formed on the insulating layer 16 above the gate electrode 12.
A semiconductor layer 18 made of is provided, and a source electrode 20 and a drain electrode 22 made of a conductive material such as aluminum or Cr are further formed on the semiconductor layer 18 to form a schematic configuration. At this time, the uppermost layer of the semiconductor layer 18 is an ohmic contact layer 24 made of amorphous silicon (n + a-Si) doped with phosphorus or impurity ions.
It has been.
【００１９】また、ドレイン電極２２は、絶縁層１６に
開けられたコンタクトホール２６を介して基板１０上に
形成された画素電極１４と接続されるが、そのドレイン
電極２２と画素電極１４の間には介在体２８が介在し、
ドレイン電極２２と画素電極１４が接触しないようにし
ている。The drain electrode 22 is connected to the pixel electrode 14 formed on the substrate 10 through a contact hole 26 formed in the insulating layer 16, and the drain electrode 22 is connected between the drain electrode 22 and the pixel electrode 14. Interspersed with the interposer 28,
The drain electrode 22 and the pixel electrode 14 are prevented from contacting each other.
【００２０】本実施例の配線構造は、この他にも例え
ば、図２に示されるような液晶素子にも適用できる。図
２に示す液晶素子が図１に示した液晶素子と異なるの
は、ドレイン電極として、そのまま本発明の介在体を構
成する導電体材料を適用している点にある。すなわち、
本発明の、標準生成エンタルピーがＳｎＯ2の標準生成
エンタルピーよりもマイナス側にある酸化物にならない
導電体、例えば、銀や銅などの導電性の高い導電体で、
ＩＴＯと導電部材であるオーミックコンタクト層２４と
を接続したものである。In addition to this, the wiring structure of this embodiment can be applied to, for example, a liquid crystal element as shown in FIG. The liquid crystal element shown in FIG. 2 is different from the liquid crystal element shown in FIG. 1 in that the drain electrode is made of the same conductive material as the intermediate body of the present invention. That is,
In the present invention, a conductor having a standard enthalpy of formation on the negative side of the standard enthalpy of formation of SnO 2 which does not become an oxide, for example, a conductor having high conductivity such as silver or copper,
The ITO is connected to the ohmic contact layer 24 which is a conductive member.
【００２１】また、図３に示すような液晶素子にも適用
され得る。図３に示す液晶素子は、基板１０上に形成さ
れたゲート電極１２上に絶縁層１６ａが積層され、ゲー
ト電極１２の上方であって、この絶縁層１６ａ上にアモ
ルファスシリコン（ａ−Ｓｉ）からなる半導体層１８が
設けられ、さらにその半導体層１８上にオーミックコン
タクト層２４を形成し、その導電部材であるオーミック
コンタクト層２４と接続するように、上記介在体として
用いる本発明独自の導電体でソース電極２８ｂおよびド
レイン電極２８ａを構成した。これらの上には、絶縁層
１６ｂが積層されている。また、その絶縁層１６ｂ上に
形成された画素電極１４と、ドレイン電極２８ａとは絶
縁層１６ｂに形成されたコンタクトホール２６を介して
接続されている。It can also be applied to a liquid crystal element as shown in FIG. In the liquid crystal element shown in FIG. 3, an insulating layer 16a is laminated on a gate electrode 12 formed on a substrate 10, above the gate electrode 12, and on the insulating layer 16a from amorphous silicon (a-Si). Is formed on the semiconductor layer 18, and the ohmic contact layer 24 is formed on the semiconductor layer 18 and is connected to the ohmic contact layer 24, which is a conductive member thereof. The source electrode 28b and the drain electrode 28a were constructed. An insulating layer 16b is laminated on these. The pixel electrode 14 formed on the insulating layer 16b and the drain electrode 28a are connected to each other through the contact hole 26 formed in the insulating layer 16b.
【００２２】〔試験例〕各種導電体の接触抵抗の比較試
験を行った。図５，６に示すようなコンタクトチェーン
を作製した。コンタクトチェーンは、図５に示すよう
に、ガラス基板１０上に、サンプルとする導電体層３０
を成膜し、これをフォトリソ・メタルウェットエッチ・レ
ジスト剥離をし、その上にＳｉＮxからなる絶縁層１６
を成膜し、これも同様に、フォトリソ・絶縁層ドライエ
ッチ・レジストドライアッシングをし、さらにＩＴＯ１
４を成膜してフォトリソ・ＩＴＯウェットエッチ・レジス
ト剥離をしたもので、絶縁層１６に形成したコンタクト
ホール２６，２６，・・・を介して導電体層３０とＩＴＯ
１４とを次々と接続したものである。本試験において
は、図６に示すようにこれを連設し、１６００段つなげ
た。尚、各コンタクトホール２６，２６，・・・は、平面
視が四辺形で一辺が約７μmのものである。[Test Example] A comparative test of contact resistance of various conductors was conducted. A contact chain as shown in FIGS. 5 and 6 was produced. As shown in FIG. 5, the contact chain is formed on a glass substrate 10 by using a conductor layer 30 as a sample.
Is deposited, photolithography, metal wet etching, and resist stripping are performed, and an insulating layer 16 made of SiN x is formed thereon.
Film is formed, and photolithography, insulating layer dry etching, resist dry ashing are performed in the same manner, and ITO1 is further formed.
4 is formed by photolithography, ITO wet etching, and resist stripping, and the conductor layer 30 and ITO are formed through the contact holes 26, 26, ... Formed in the insulating layer 16.
14 are connected one after another. In this test, as shown in FIG. 6, these were connected in series and 1600 stages were connected. Each of the contact holes 26, 26, ... Has a quadrilateral shape in plan view and one side of about 7 μm.
【００２３】この構成のコンタクトチェーンを用いて、
導電体層３０として、Ｃｕ、Ｔｉ、Ｃｒ、Ａｌを用いて
接触抵抗を測定した。測定結果を表２に示す。Using the contact chain of this structure,
The contact resistance was measured using Cu, Ti, Cr, and Al as the conductor layer 30. The measurement results are shown in Table 2.
【００２４】[0024]
【表２】 [Table 2]
【００２５】液晶素子の薄膜トランジスタにおいては、
図７に示すように、ドレイン電極２２と画素電極１４間
の接触抵抗ＲCONは、ゲート電極１２に電圧を印加して
いるときのソース電極２０とドレイン電極２２間の抵抗
であるオン抵抗ＲSDに対して無視し得る抵抗とすること
が望ましい。ここで、オン抵抗ＲSDの１％はコンタクト
チェーンでは１×１０7Ωに相当するので、このオン抵
抗ＲSDに対して、無視し得る程度に小さいコンタクト抵
抗ＲCONを安定して示すのは、表２からＣｕだけである
ことがわかる。In the thin film transistor of the liquid crystal element,
As shown in FIG. 7, the contact resistance R CON between the drain electrode 22 and the pixel electrode 14 is the on-resistance R SD that is the resistance between the source electrode 20 and the drain electrode 22 when a voltage is applied to the gate electrode 12. It is desirable to have a resistance that can be ignored. Here, since 1% of the on-resistance R SD corresponds to 1 × 10 7 Ω in the contact chain, it is possible to stably show the negligible contact resistance R CON with respect to the on-resistance R SD . It can be seen from Table 2 that only Cu is contained.
【００２６】本実施例においては、本発明の配線構造を
液晶素子に適用した例を示したが、ＩＴＯと導電体を接
続する各種の電子素子、例えば、エリアイメージセンサ
等に適用することができる。In the present embodiment, an example in which the wiring structure of the present invention is applied to a liquid crystal element is shown, but it can be applied to various electronic elements for connecting ITO and a conductor, such as an area image sensor. .
【００２７】[0027]
【発明の効果】請求項１記載の配線構造は、インジウム
錫酸化物よりなる第１の導電部材と第２の導電部材が介
在体を介して接続され、該介在体が、ＳｎＯ2の標準生
成エンタルピーよりもマイナス側の標準生成エンタルピ
ーの酸化物にならない導電体で構成されていることを特
徴とするものである。この際、介在体が、銅または銀で
あるとより好適である。In the wiring structure according to the first aspect of the present invention, the first conductive member and the second conductive member made of indium tin oxide are connected to each other through the interposition body, and the interposition body forms the standard generation of SnO 2 . It is characterized by being composed of a conductor that does not become an oxide having a standard enthalpy of formation on the negative side of the enthalpy. At this time, it is more preferable that the intervening body is copper or silver.
【００２８】請求項３記載の配線構造は、インジウム錫
酸化物導電部材と不純物が添加されたシリコンが介在体
を介して接続され、該介在体が、ＳｎＯ2の標準生成エ
ンタルピーよりもマイナス側の標準生成エンタルピーの
酸化物にならない導電体で構成されていることを特徴と
するものである。本発明の液晶素子は、薄膜トランジス
タのオーミックコンタクト層と、インジウム錫酸化物か
らなる画素電極が、ＳｎＯ2の標準生成エンタルピーよ
りもマイナス側の標準生成エンタルピーの酸化物になら
ない導電体を間に介して接続されていることを特徴とす
るものである。In the wiring structure according to the third aspect, the indium tin oxide conductive member is connected to the impurity-added silicon via an interposition body, and the interposition body is located on the negative side of the standard enthalpy of formation of SnO 2 . It is characterized by being composed of a conductor that does not become an oxide having a standard enthalpy of formation. In the liquid crystal device of the present invention, the ohmic contact layer of the thin film transistor and the pixel electrode made of indium tin oxide are interposed between the conductor which does not become an oxide having a standard formation enthalpy on the negative side of the standard formation enthalpy of SnO 2. It is characterized by being connected.
【００２９】本発明によれば、ＩＴＯと導電部材を接続
する配線またはそのような配線を有する各種の電子素
子、特に液晶素子において、導電部材の酸化が抑えられ
るので、接触抵抗の増大化が低減される。したがって、
消費電力の増大や起動不良等を防止することができる。According to the present invention, since the conductive member is suppressed from being oxidized in the wiring connecting the ITO and the conductive member or in various electronic elements having such wiring, particularly in the liquid crystal element, the increase of the contact resistance is reduced. To be done. Therefore,
It is possible to prevent an increase in power consumption and a startup failure.
【図１】本発明の実施例の液晶素子の要部断面図であ
る。FIG. 1 is a cross-sectional view of essential parts of a liquid crystal element according to an embodiment of the present invention.
【図２】他の実施例の液晶素子の要部断面図である。FIG. 2 is a cross-sectional view of a main part of a liquid crystal element of another embodiment.
【図３】他の実施例の液晶素子の要部断面図である。FIG. 3 is a cross-sectional view of essential parts of a liquid crystal element of another embodiment.
【図４】従来例の液晶素子の要部断面図である。FIG. 4 is a cross-sectional view of a main part of a conventional liquid crystal element.
【図５】試験に用いた配線構造を示す要部側断面図であ
る。FIG. 5 is a side sectional view of a main part showing a wiring structure used in a test.
【図６】コンタクトチェーンを示す模式図である。FIG. 6 is a schematic view showing a contact chain.
【図７】薄膜トランジスタのオン抵抗とコンタクト抵抗
を示す側断面図である。FIG. 7 is a side sectional view showing on-resistance and contact resistance of a thin film transistor.
１０ 基板 １２ ゲート電極 １４ 画素電極 １６ 絶縁層 ２２ ドレイン電極 ２４ オーミックコンタクト層 ２８ 介在体 10 substrate 12 gate electrode 14 pixel electrode 16 insulating layer 22 drain electrode 24 ohmic contact layer 28 interposer
フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 29/786 9056−4Ｍ Ｈ０１Ｌ 29/78 ６１２ Ｃ 9056−4Ｍ ６１６ Ｖ Continuation of front page (51) Int.Cl. 6 Identification number Office reference number FI Technical indication location H01L 29/786 9056-4M H01L 29/78 612 C 9056-4M 616 V
Claims (4)
部材と、第２の導電部材とが介在体を介して接続され、
該介在体が、ＳｎＯ2の標準生成エンタルピーよりもマ
イナス側の標準生成エンタルピーの酸化物にならない導
電体で構成されていることを特徴とする配線構造。1. A first conductive member made of indium tin oxide and a second conductive member are connected via an interposer,
A wiring structure, wherein the interposer is composed of a conductor that does not become an oxide having a standard enthalpy of formation on the negative side of the standard enthalpy of formation of SnO 2 .
特徴とする請求項１記載の配線構造。2. The wiring structure according to claim 1, wherein the interposer is copper or silver.
れたシリコンであることを特徴とする請求項１記載の配
線構造。3. The wiring structure according to claim 1, wherein the second conductive member is silicon to which impurities are added.
ト層と、インジウム錫酸化物からなる画素電極が、Ｓｎ
Ｏ2の標準生成エンタルピーよりもマイナス側の標準生
成エンタルピーの酸化物にならない導電体を間に介して
接続されていることを特徴とする液晶素子。4. The ohmic contact layer of the thin film transistor and the pixel electrode made of indium tin oxide are Sn.
A liquid crystal element, characterized in that it is connected through a conductor which does not become an oxide having a standard enthalpy of formation on the negative side of the standard enthalpy of formation of O 2 .
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6312220A JPH08167608A (en) | 1994-12-15 | 1994-12-15 | Wirings structure and liquid crystal element |
| KR1019950049546A KR0164654B1 (en) | 1994-12-15 | 1995-12-14 | Wiring structure and liquid crystal element |
| DE19546962A DE19546962A1 (en) | 1994-12-15 | 1995-12-15 | Metallisation structure e.g. of liq. crystal device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6312220A JPH08167608A (en) | 1994-12-15 | 1994-12-15 | Wirings structure and liquid crystal element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08167608A true JPH08167608A (en) | 1996-06-25 |
Family
ID=18026640
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6312220A Pending JPH08167608A (en) | 1994-12-15 | 1994-12-15 | Wirings structure and liquid crystal element |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPH08167608A (en) |
| KR (1) | KR0164654B1 (en) |
| DE (1) | DE19546962A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015191893A (en) * | 2014-03-27 | 2015-11-02 | 三菱電機株式会社 | Thin film transistor and manufacturing method of the same |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19733053A1 (en) * | 1997-07-31 | 1999-02-04 | Leybold Ag | Oxide and metal coated transparent substrate useful for monitor |
| KR101054344B1 (en) | 2004-11-17 | 2011-08-04 | 삼성전자주식회사 | Thin film transistor array panel and manufacturing method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01171282A (en) * | 1987-12-25 | 1989-07-06 | Kanegafuchi Chem Ind Co Ltd | Photovoltaic element |
| JPH03129326A (en) * | 1989-10-13 | 1991-06-03 | Hitachi Ltd | Wiring structure and wiring method for semiconductor device |
| JPH04153623A (en) * | 1990-10-18 | 1992-05-27 | Fuji Xerox Co Ltd | Wiring structure |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2218301A1 (en) * | 1973-02-16 | 1974-09-13 | Saint Gobain | Semi-reflecting glaze with semi-conductor layer - of pref tin oxide, indium oxide or titanium nitride applied on film of gold, silver or copper |
| DE2750500A1 (en) * | 1977-11-11 | 1979-05-17 | Leybold Heraeus Gmbh & Co Kg | Panes with IR reflecting properties - obtd. by sputtering on first an indium oxide-tin oxide layer, then a gold, silver or copper layer |
| DE3536821A1 (en) * | 1985-10-16 | 1987-04-16 | Standard Elektrik Lorenz Ag | METHOD FOR PRODUCING A CURRENTLY DEPOSITABLE, SOLBABLE METAL LAYER |
-
1994
- 1994-12-15 JP JP6312220A patent/JPH08167608A/en active Pending
-
1995
- 1995-12-14 KR KR1019950049546A patent/KR0164654B1/en not_active IP Right Cessation
- 1995-12-15 DE DE19546962A patent/DE19546962A1/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01171282A (en) * | 1987-12-25 | 1989-07-06 | Kanegafuchi Chem Ind Co Ltd | Photovoltaic element |
| JPH03129326A (en) * | 1989-10-13 | 1991-06-03 | Hitachi Ltd | Wiring structure and wiring method for semiconductor device |
| JPH04153623A (en) * | 1990-10-18 | 1992-05-27 | Fuji Xerox Co Ltd | Wiring structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015191893A (en) * | 2014-03-27 | 2015-11-02 | 三菱電機株式会社 | Thin film transistor and manufacturing method of the same |
Also Published As
| Publication number | Publication date |
|---|---|
| DE19546962A1 (en) | 1996-06-20 |
| KR960026902A (en) | 1996-07-22 |
| KR0164654B1 (en) | 1999-02-01 |
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