JPH0810737B2 - Chip carrier and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a chip carrier,
In particular, it relates to a chip carrier for encapsulating an IC chip mounted on a ceramic substrate.

[0002]

2. Description of the Related Art Conventionally, in this type of chip carrier, as shown in FIG. 3, a pad 1c provided on a ceramic substrate 1 and a lead 8 provided on an IC chip 4 are connected. The cap 10 for sealing the IC chip 4 includes a heat sink 10a, a metal frame 10b, and a silver braze 10.
It is configured by joining with c. The IC chip 4 is sealed by bringing the metal frame 10b of the cap 10 and the metal frame 2 adhered to the ceramic substrate 1 with silver bra 9 into close contact by seam welding using the roller electrode 7, laser welding, or the like.

When the IC chip 4 is sealed with the cap 10, the IC chip 4 is adhered to the heat dissipation plate 10a with the heat conductive adhesive 5. As a result, the heat generated in the IC chip 4 is conducted to the heat dissipation plate 10a and dissipated to the outside from the heat dissipation plate 10a. The IC chip sealing technique described above is described in detail in Japanese Patent Application Laid-Open No. 1-150343.

[0004]

In the conventional chip carrier described above, when the IC chip 4 is mounted on the ceramic substrate 1, the length of the lead 8 or the adhesion between the lead 8 and the IC chip 4 or the lead 8 is not required. It is difficult to attach the IC chip 4 in parallel to the ceramic substrate 1 because the adhesion with the pad 1c on the ceramic substrate 1 is difficult to be made uniform. There are variations in the height of 4. If cap sealing is attempted in this state, the gap between the heat dissipation plate 10a of the cap 10 and the IC chip 4 becomes uneven, or the gap between the metal frame 10b of the cap 10 and the metal frame 2 of the ceramic substrate 1 is increased. There is a problem that a gap occurs.

If the gap between the heat sink 10a and the IC chip 4 becomes uneven, it becomes difficult to control the amount of the adhesive 5 for bonding the heat sink 10a and the IC chip 4 together. If the amount of adhesive is small, bubbles will be generated in the adhesive 5,
Adhesive strength between the IC chip 4 and the heat sink 10a cannot be obtained. Further, the air bubbles in the adhesive 5 increase the thermal resistance, and the required heat dissipation ability cannot be obtained.
There is also a problem that thermal stress is generated by the heat generated during the operation of the C chip 4, and the IC chip 4 is cracked.

When a gap is generated between the metal frame 10b of the cap 10 and the metal frame 2 of the ceramic substrate 1, the metal frame 10b of the cap 10 is pressed from above by the roller electrode 7 for seam welding. Mechanical stress is applied to the cap 10 and IC chip 4 when the cap 1
There is a problem that 0 or the IC chip 4 is destroyed.

[0007]

A chip carrier according to the present invention has a ceramic substrate on which an IC chip is mounted, a heat dissipation plate having a lower surface bonded to the upper surface of the IC chip, and an outer surface of the ceramic substrate. It comprises a metal frame and a cap frame whose inner surface is fixed to the outer surface of the heat sink and whose inner surface is seam-welded to the outer peripheral side surface of the metal frame.

[0008]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a vertical sectional view showing an embodiment of the present invention, and FIG. 2 is a perspective view of this embodiment. In these figures, the IC chip 4 has Sn / Pb (63/37 wt%) on the connection pad 1c provided on the upper surface of the ceramic substrate 1.
It is mounted on the ceramic substrate 1 by connecting the solder bumps 3 of the same type. The connection pad 1C is formed on the ceramic substrate 1 via the conductor wiring layer 1a inside the ceramic substrate 1.
Is connected to the input / output pad 1b provided on the lower surface of the.

The cap 6 is constructed by fixing the upper portion of a metallic cap frame 6c to the outer peripheral surface of the heat dissipation plate 6a with a brazing material 6b. The size of the inner opening of the cap frame 6c of the cap 6 is slightly larger than the outer shape of the metal frame 2 adhered to the outer surface of the ceramic substrate 1 by a brazing material (not shown) or the like. This cap 6
The ceramic substrate 1 on which the IC chip 4 is mounted is covered from the IC chip 4 side, and the lower surface of the heat dissipation plate 6a of the cap 6 and the upper surface of the IC chip 4 are fixed with a heat conductive adhesive 5. There is. At this time, the lower end of the cap frame 6c of the cap 6 is arranged to be substantially on the same surface as the lower surface of the ceramic substrate 1, and the outer peripheral side surface of the metal frame 2 adhered to the ceramic substrate 1 and the cap frame of the cap 6 are arranged. 6
The lower inner wall of c is joined to the IC by seam welding from the outside of the cap frame 6c by the roller electrode 7.
The chip 4 is hermetically sealed. The thickness of the cap frame 6c is such that it is deformed to some extent by the pressure of the roller electrode 7 during seam welding. Since the IC chip 4 is sufficiently fixed to the heat dissipation plate 6a of the cap 6 with the heat conductive adhesive 5, the heat generated in the IC chip 4 is conducted to the heat dissipation plate 6a of the cap 6, and the heat is dissipated from the heat dissipation plate 6a to the outside. Is released to.

When the IC chip 4 is connected by the solder bump 3 of the connection pad 1c on the ceramic substrate 1, the size of the bump 3 is different, or the shape and size of the connection pad 1c of the ceramic substrate 1 is different, IC The IC chip 4 may be mounted on the ceramic substrate 1 in a state in which the IC chip 4 is tilted or the height is varied due to a positional deviation when the chip 4 is mounted. The IC chip 4 is mounted on the ceramic substrate 1 on which the IC chip 4 in the tilted or the height is varied is covered by the cap 6 to hermetically seal the IC chip 4. When it is put on the ceramic substrate 1, the heat dissipation plate 6a of the cap 6 is abutted against the IC chip 4 via the adhesive 5, so that the cap 6 follows the inclination of the IC chip 4 and the heat dissipation plate 6a of the cap 6 The gap with the IC chip 4 becomes uniform. Since the gap is made uniform, the adhesive 5 can be uniformly filled between the heat sink 6a of the cap 6 and the IC chip 4, so that the heat sink 6a and the IC chip 4 are sufficiently adhered to each other. Good strength and thermal conductivity are obtained.

In this state, the metal frame 2 of the ceramic substrate 1
The IC chip 4 is hermetically sealed by joining the outer peripheral side surface of the cap 6 and the inner wall of the cap frame 6c of the cap 6 by seam welding from the outside of the cap frame 6c by the roller electrode 7 to improve the reliability of the chip carrier. Can be improved. A gap is generally created between the cap frame 6c and the metal frame 2 by abutting and adhering the heat sink 6a to the IC chip 4, but seam welding of these with the roller electrode 7 especially the cap frame 6c is deformed, Metal frame 2
There is no problem in sealing the IC chip because it is closely attached to the.

[0013]

As described above, according to the present invention, the gap between the heat sink and the IC chip is kept uniform, and proper adhesion is obtained, and it is necessary for the cap including the heat sink and the cap frame and the IC chip. Cap sealing can be performed without applying the above mechanical stress, the amount of adhesive for adhering the heat dissipation plate and the IC chip can be easily controlled, and this occurs during operation of the IC chip. There is an effect that it is possible to reduce the generation of thermal stress due to the applied heat.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing an embodiment of a chip carrier of the present invention.

FIG. 2 is a perspective view of the embodiment shown in FIG.

FIG. 3 is a vertical sectional view showing a conventional chip carrier.

[Explanation of symbols]

 1 Ceramic Substrate 1a Conductor Wiring Layer 1b Input / Output Pad 1c Connection Pad 2 Metal Frame 3 Bump 4 IC Chip 5 Adhesive 6 Cap 6a Heat Sink 6b Brazing Material 6c Cap Frame 7 Roller Electrode 8 Lead 9 Brazing Material 10 Cap 10a Radiating Board 10b Metal frame 10c Low material

Claims (3)

[Claims] 1. A ceramic substrate on which an IC chip is mounted, a heat dissipation plate whose lower surface is adhered to the upper surface of the IC chip, a metal frame fixed to the outer surface of the ceramic substrate, and an inner surface of the upper part is the heat dissipation plate. A chip carrier fixed to the outer surface of the metal frame and having a lower inner surface seam-welded to the outer peripheral side surface of the metal frame. 2. The chip carrier according to claim 1, wherein the upper inner surface of the cap frame is brazed to the outer surface of the heat dissipation plate. 3. An IC chip mounted on a ceramic substrate is affixed to the outer surface of the ceramic substrate after the lower surface of a heat radiating plate having the inner surface of the upper portion of the cap frame fixed to the outer surface is abutted and bonded. A method of manufacturing a chip carrier, comprising seam-welding a lower inner surface of the cap frame to a metal frame.