JPH0783041B2 - Semiconductor device inspection apparatus and inspection method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device inspection apparatus and an inspection method thereof, and more particularly to a semiconductor device inspection apparatus and an inspection method thereof for marking defective chips.

[0002]

2. Description of the Related Art Conventionally, a semiconductor chip inspection apparatus (hereinafter referred to as a prober) is used to electrically inspect a semiconductor chip (hereinafter referred to as a chip), and if the chip is defective, a marking method for marking the chip. For example,
By providing a marking device at the same position as the contact position between the tip and the probe, a marking method is performed to judge pass / fail each time the measurement of one tip is completed, or a marking device is provided at any position of the prober. All chips on the wafer are measured, and the quality result and the chip position on the wafer are stored by the prober. After the chip measurement on one wafer is completed, the wafer is reached to the position where the marking device is installed. There is a marking method in which a stage on which is mounted is moved and a defective chip is marked by a marking device according to the above measurement result and chip position.

These conventional marking methods will be described with reference to FIGS. 4 to 9.

First, the measurement position stage center 7 shown in FIG.
Then, the centers of the probe groups 8 arranged at the positions of the electrode pads of the chip of the substrate (hereinafter referred to as a probe card) provided with the probe groups 8 for electrical inspection are aligned. Prober operation unit 5
Stores the opportunity position of stage 2 at this time.

Next, the marker tip 9 of the marking device 1 and the marking position stage center 10 of the stage 2 are aligned. At this time, the X-direction distance 11 and the Y-direction distance 1 of the measurement position stage center 7 when combined with the probe group 8 and the marking position stage center 10 when combined with the marker tip 9
Ask for 2.

Next, the wafer 1 on the stage 2 shown in FIG.
The position of 3 is detected.

By moving the stage 2 so that the wafer 13 on the stage 2 comes to the detection area of the height detection sensor 4 provided on the prober, and detecting the height difference between the wafer 13 and the wafer 13, The number of edges of the wafer 13 is inspected and the wafer center 14 of the wafer 13 is obtained from the coordinates of each point.

The position of the wafer center 14 of the wafer 13 and the X-direction distance 15 and Y of the measurement position stage center 7
The direction distance 16 is calculated and stored in the calculation unit 5.

The computing unit 5 of the prober calculates a virtual chip array 25 on the wafer 13 as shown in FIG. 7, assuming that the chip center is located at the position of the wafer 14. The size of the chip is previously input as a parameter to the computing unit 5 of the prober.

Next, the actual chip array 26 and the probe group 8 are aligned (hereinafter referred to as needle alignment). At the time of needle alignment, the stage 2 is finely adjusted to accurately align the pad and the probe group 8, but the virtual chip array 25 and the actual chip array 26 at this time are aligned.
By correcting the X-direction correction amount 23, the virtual chip arrangement 25, and the Y-direction correction amount 24 of the actual chip arrangement 26 to the virtual chip arrangement 25 on the wafer 13, the accurate chip arrangement 26 on the wafer is determined. .

Next, the alignment of the marking device 1 and the chip will be described.

FIG. 8 is a conventional prober positional relationship diagram, in which the measuring section 30 and the marking section 2 of the prober 33 are arranged.
7 shows the positional relationship of No. 7.

The operation of aligning the probe center of the probe card with the measurement position stage center 7 has been described above.
After the center of the probe group 8 of the probe card and the center 7 of the stage are aligned with each other, the center 7 of the stage and the tip 9 of the marker of the marking device 1 are aligned, as shown in FIG.

At this time, the X-direction distance 11 and the Y-direction distance 12 between the measurement position stage center 7 and the marking position stage center 10 are obtained and stored in the calculation unit 5.

In the conventional alignment between the marker and the tip, after the above-mentioned actual needle alignment, the measurement position stage center 10 and the X-direction distance 11 between the marking position stage center 10 and the marking device position 27 shown in FIG. Also, the stage was moved by a distance 12 in the Y direction to align the tip to be marked with the tip 9 of the marker.

Further, conventionally, as shown in FIG. 8, the marking device position 27 has been a position where the operator can visually check. This is because it is necessary for the operator to visually check the alignment of the marker tip 9 and the stage center 10 and the alignment of the marker tip 9 and the tip.

[0017]

However, in recent years,
As the number of test pins of the tester connected to the prober 33 increases, the test head 32, which is the connecting portion between the tester and the prober, becomes larger.

Therefore, when the test head 32 is set, the marking position 27 of the marking device 1 may not be visible.

When the marking position 27 of the marking device 1 cannot be visually inspected by the test head 31 (see FIG. 3), once the test head 31 is separated from the prober 33 after the above-mentioned needle alignment work, the probe group 8 and the pads are removed. Since the position and the height of the mark are displaced, it is necessary to separate the test head 31 from the prober 33, align the marking device 1 with the chip, and perform the needle alignment again.

That is, when the test head becomes large and the installation position of the marking device cannot be visually recognized by the operator, the position and height of the tip of the marker and the position of the tip are adjusted, so that the prober side is closed at the time of needle matching. The test head needs to be separated from the prober.

Therefore, since the position and height of the pad and the probe are different from those when the needles are aligned when the test head is set closed, it is necessary to realign the needles after the marker adjustment, and the inspection work is performed. There was a problem that the efficiency decreased.

[0022]

In a semiconductor device inspection apparatus according to the present invention, a probe is brought into contact with an electrode pad of a semiconductor chip formed on a wafer to perform an electric inspection, and a result of the electric inspection of the semiconductor chip is obtained. A marking device that marks the semiconductor chip that is determined to be defective based on the above, a stage on which a wafer is placed, a stage control unit that controls the mechanical position of the stage, and a height detector that detects the wafer on the stage In a semiconductor device inspection device including a sensor and an arithmetic unit that stores the mechanical position of the stage, when a chip arrangement on the wafer is calculated and one chip of the chip arrangement is aligned with the marking device. Calculates and stores the first mechanical position of the stage of
Then calculate the chip array when performing needle alignment to align the probe and the electrode pad of the semiconductor chip,
Calculating a second mechanical position of the stage during needle alignment,
A first mechanical position of the stage and a second mechanical position of the stage
Is provided with a measurement determination unit that calculates and stores the difference from the mechanical position of the.

Further, according to the inspection method of the semiconductor device inspection apparatus of the present invention, the probe is brought into contact with the electrode pad of the semiconductor chip formed on the wafer to perform the electric inspection, and based on the result of the electric inspection of the semiconductor chip. Marking device that marks the semiconductor chip that has been determined to be defective, a stage on which a wafer is placed, a stage control unit that controls the mechanical position of the stage, and a height detection sensor that detects the wafer on the stage In a method for inspecting a semiconductor device inspecting apparatus, which comprises: and an arithmetic unit that stores the mechanical position of the stage, a chip arrangement on the wafer is calculated, and one chip of the chip arrangement is aligned with the marking device. The first mechanical position of the stage is calculated and stored, and then the probe is aligned with the electrode pad of the semiconductor chip. Calculating the chip arrangement when performing needle alignment, calculating the second mechanical position of the stage during needle alignment, and determining the first mechanical position of the stage and the second mechanical position of the stage. It has a method of calculating and storing the difference between and.

[0024]

FIG. 1 is a block diagram of an embodiment of the present invention.

A semiconductor device inspection apparatus according to the present invention comprises a marking device 1 for marking a chip determined to be defective as a result of electrical inspection of a chip formed on a wafer, a stage 2 for mounting a wafer, and a stage for mounting the wafer. A stage control unit 3 for controlling a mechanical position, a height detection sensor 4 for detecting a wafer on the stage, a calculation unit 5 for calculating the chip position on the wafer and storing the calculation result, and a measurement result,
It is composed of a control unit 6 for controlling measurement. FIG. 4 is a positional relationship stage diagram showing the positional relationship between the probe group 8 and the marker tip 9.

Each of FIG. 5 and FIG. 6 is a wafer mounting view showing a state in which the wafer 13 is placed on the stage 2 of the prober.

FIG. 2 is a flow chart of an embodiment of the present invention.

The procedure for aligning the chip with the marking device of the inspection device of the present invention will be described with reference to the drawings.

First, the prober measurement position stage center 7 (hereinafter referred to as the stage center) shown in the sequence 35 of FIG. 2 is obtained. The stage 2 is moved so as to pass under the detection range of the height detection sensor 4, and several points at the end of the stage 2 are detected. The coordinates of the center of the stage in the initial state are obtained from the coordinates of the ends of the stage 2.

Next, with the test head 32 shown in FIG. 3 separated from the prober 33, the measurement position stage center 7
And the centers of the probe groups 8 arranged at the positions of the electrode pads of the probe card chip are aligned.

The computing unit 5 of the prober 33 stores the position of the measurement position stage center 7 at this time. Here, the coordinate where the center 7 of the measurement position stage and the center of the probe group 8 of the probe card are aligned is (X1, Y1).

After this operation, the stage 2 is moved to the marking position 27 of the marking device 1 shown in sequence 36. Then, as shown in sequence 37, the marker tip 9 and the marking device 1 shown in FIG.
The marking device stage center 10 at the position is aligned.

The computing unit 5 of the prober stores the position of the marking position stage center 10 at this time, and also shows the probe group 8 of the probe card of FIG.
The X-direction moving distance 11 and the Y-direction moving distance 12 of the center position of the marker and the position of the marker tip 9 are calculated.

At this time, the stage coordinates are (X2, Y2), and the stage moving distance is (X direction moving distance 11, Y direction moving distance 12) = (dX, dY).

(X2, Y2) = (X1 + dX, Y)
1 + dY).

Next, in sequence 39, the wafer 13 is transferred onto the stage 2.

In sequence 40, the position of the wafer 13 on the stage 2 and the size of the wafer 13 are detected. As in the case of obtaining the coordinates of the stage center 7, the stage 2 is moved so that the wafer 13 on the stage 2 passes under the detection area of the height detection sensor 4 provided on the prober.
By detecting the height difference between the wafer 13 and the stage 2, several inspections of the wafer are inspected, and the position of the wafer center 14 is obtained from the coordinates of each point.

The X-direction distance 15 and the Y-direction distance 16 between the wafer center 14 and the measurement position stage center 7 are calculated.

Thereafter, the prober aligns the chip pattern of the wafer 13 shown in sequence 41,
The X and Y coordinates of the chip on the wafer 13 are matched with the X and Y coordinates of the stage 2.

Next, the virtual chip pattern array 25 (see FIG. 4) shown in sequence 42 is calculated. For the virtual chip pattern array 25, the chip array is calculated so that the chip center is located at the wafer center 14.

After this, as shown in FIG.
At 3, the wafer 13 on the stage 2 is moved to the marker tip 9 of the marking device 1.

Therefore, the marker position adjustment at an arbitrary chip shown in sequence 44 is performed.

Marker position adjustment and height adjustment are performed by an arbitrary chip 17 for marker adjustment. Set the coordinates of the arbitrary chip position 17 for this marker alignment to (X3, Y3)
Then, (X3, Y3) = (X2 + dX, Y2 + dY
1) = (X1 + dX + dX1, Y1 + dY + dY1).

At this time, a distance 18 in the X direction and a distance 19 in the Y direction between the marking position stage center 10 shown in the sequence 45 and an arbitrary chip 17 for marker alignment are obtained. Here, the X-direction distance 18 is dX1, and the Y-direction distance 19 is dY.
It was set to 1.

Next, in sequence 45, the test head 32 is set on the prober 33 side to bring the test head 31 into the state. Then, the stage 47 in sequence 47 is moved to move the stage 2 to the measurement position 30.

Next, as shown in a sequence 48, needle alignment and height alignment of the arbitrary tip 20 and probe group 8 for needle alignment at the measurement position 30 are performed.

Assuming that the position coordinates of an arbitrary chip 20 for this needle alignment are (X4, Y4), (X4, Y4) =
(X1 + dX3, Y1 + dY3).

DX3 and dY3 represent an X-direction distance 21 and a Y-direction distance 22 from the measurement position stage center 7 to the center coordinates of an arbitrary chip 20 for needle alignment.

The actual chip arrangement 26 on the wafer 13 is calculated based on the coordinates (X4, Y4) after the needle alignment.

From FIG. 7, as shown in a sequence 49, the X-direction deviation amount 23 and the Y-direction deviation amount 24 between the virtual chip array 25 before needle matching and the actual chip array 26 after needle matching are obtained. Here, the X-direction shift amount 23 is set to dX4, Y
The direction shift amount 24 is set to dY4.

Finally, in sequence 50, this deviation amount d
By correcting X4, dY4 to the coordinates (X3, Y3) of the arbitrary chip 17 for which the marker alignment was performed first, the amount of displacement of the marker position (the displacement of the marker position associated with the needle alignment when the marker adjustment is performed before the needle alignment) ( It is possible to correct dX4, dY4).

[0052]

According to the present invention, even when the operator cannot visually check the installation position of the marking device due to the test head or the like, after the test head is closed and needle matching is performed, the test head is opened / closed and accompanying it. It is possible to prevent needle position deviation and height deviation between the pad and the probe.

[Brief description of drawings]

FIG. 1 is a block diagram of a semiconductor device inspection apparatus according to an embodiment of the present invention.

FIG. 2 is a flow chart of an inspection method of one embodiment of the present invention shown in FIG.

FIG. 3 is a diagram showing a prober positional relationship.

FIG. 4 is a diagram showing a positional relationship among a probe group, a marker, and a stage.

FIG. 5 is a diagram showing a positional relationship among a measurement chip, a wafer, and a stage.

FIG. 6 is a diagram showing a positional relationship between a marking position, a wafer, and a stage.

FIG. 7 is a chip array diagram on a wafer.

FIG. 8 is a diagram showing a conventional prober positional relationship.

FIG. 9 is a block diagram of a conventional semiconductor device inspection apparatus.

[Explanation of symbols]

1 marking device 2 stage 3 stage control unit 4 height detection sensor 5 arithmetic unit 6 measurement determination unit 7 measurement position stage center 8 probe group 9 marker tip 10 marking position stage center 11 measurement position stage center and marking position stage center X Directional distance 12 Measurement position Stage center and marking position Stage Y distance 13 Wafer 14 Wafer center 15 Stage center and wafer center X direction distance 16 Stage center and wafer center Y direction distance 17 Arbitrary chip for marker alignment 18 Marker alignment position and X-center distance between stage centers 19 Marker alignment position and Y-direction distance between stage centers 20 Arbitrary chip for needle alignment 21 Distance between wafer center and chip center in X direction 22 Distance between wafer center and chip center in Y direction 23 Virtual chip array and real X-direction correction amount of chip arrangement 24 Y-direction correction amount of virtual chip arrangement and actual chip arrangement 25 Virtual chip arrangement 26 Actual chip arrangement 27 Marking position 28 Conventional test head (when prober set) 29 Conventional test head (prober non-set) 30) Measurement position 31 Large test head (when prober is set) 32 Large test head (when prober is not set) 33 Prober 34 to 50 Operation of inspection device in flowchart

Claims (2)

[Claims] 1. A mark is attached to the semiconductor chip determined to be defective based on the result of the electric inspection of the semiconductor chip by bringing a probe into contact with an electrode pad of the semiconductor chip formed on a wafer. A marking device, a stage on which a wafer is placed, a stage control unit that controls the mechanical position of the stage, a height detection sensor that detects the wafer on the stage, and an arithmetic unit that stores the mechanical position of the stage. In a semiconductor device inspection apparatus including: a chip array on the wafer is calculated, and a first mechanical position of a stage when one chip of the chip array and the marking device are aligned and stored. Then, calculate the chip arrangement at the time of performing needle alignment for aligning the probe and the electrode pad of the semiconductor chip, and A semiconductor having a measurement determination unit that calculates a second mechanical position of the stage and calculates and stores a difference between the first mechanical position of the stage and the second mechanical position of the stage. Equipment inspection equipment. 2. A mark is attached to the semiconductor chip determined to be defective based on a result of the electric inspection of the semiconductor chip by bringing a probe into contact with an electrode pad of the semiconductor chip formed on a wafer. A marking device, a stage on which a wafer is placed, a stage control unit that controls the mechanical position of the stage, a height detection sensor that detects the wafer on the stage, and an arithmetic unit that stores the mechanical position of the stage. In a method for inspecting a semiconductor device inspecting a semiconductor device, a chip arrangement on the wafer is calculated, and a first mechanical position of the stage when one chip of the chip arrangement and the marking device are aligned. And memorize it, and then calculate the chip arrangement when performing needle alignment for aligning the probe and the electrode pad of the semiconductor chip, A semiconductor device, characterized in that a second mechanical position of the stage at the time of needle matching is calculated, and a difference between the first mechanical position of the stage and the second mechanical position of the stage is calculated and stored. Inspection method of the inspection device.