JPH077985A - Digital speed detecting device and electric motor speed control device using the same - Google Patents

Abstract

(57) [Abstract] [Purpose] In a speed control device using an encoder, if one phase of the encoder is open, the phase is lost by switching to only the signal of another normal phase to detect the speed. However, continue speed control. [Structure] The two-phase pulse of the encoder 4 is an edge extraction circuit 5
1 and the direction discriminating circuit 52 outputs the converted direction pulse and edge pulse, and the switching unit 53 outputs u / d.
It becomes the input of the counter 6. When the phase loss detection circuit 54 detects one phase loss, the pulse input for speed detection is switched to the edge pulse, and the absolute speed is detected by changing the speed detection constant in accordance with the frequency ratio with the direction pulse to rotate. By obtaining the speed detection value with the same direction as before the phase loss detection, the speed control is continued even if the phase loss occurs.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speed detecting device for an electric motor, and more particularly, when an encoder is used as a speed detector,
A digital speed detecting device for an electric motor suitable for continuing speed detection processing and speed control processing even when a phase failure of the encoder or a failure of the signal transmission circuit is detected,
And a speed control device for an electric motor.

[0002]

2. Description of the Related Art Conventionally, in a speed detecting device using a speed detector, a device which judges a failure such as disconnection or open phase and continues speed control even after detecting the failure is disclosed in Japanese Patent Laid-Open No. 61-207962.
There is a gazette. This method uses an encoder as a speed detector, and outputs two-phase signals A and B having a phase difference of 90 degrees output from the encoder and A'and B'having a phase difference of 180 degrees from the two-phase signal. One of the two-phase signals is used to detect the rotational speed, and it is detected that one of the two-phase signals A and B or A'and B'is missing. Based on the open phase detection signal, a two-phase signal other than the signal of the phase in which the abnormality is detected is selected to detect the speed and control the speed.

[0003]

In the above-mentioned prior art, A'which has a phase difference of 180 degrees with the two-phase signals A and B, respectively, so that the speed detection can be continued even after the detection of one phase loss. And a B'four-phase signal is required. by the way,
A general encoder mechanically arranges slits so that a two-phase signal with a phase difference of 90 degrees is output electrically,
The light transmitted there is received by a sensor and converted into a pulse-shaped electric signal. The two-phase signal is transmitted to the detection circuit via the signal transmission path, and the four-phase signal is generated by the electric circuit. Therefore, when a phase loss occurs due to mechanical damage or an abnormality in the signal transmission path, two phase signals out of the four phase signals are out of phase at the same time, and speed detection cannot be continued by the above-mentioned conventional technique. difficult.

An object of the present invention is to detect the speed of a rotary machine from the two-phase signals of the encoder as described above, and to detect a phase loss due to mechanical damage of the encoder or abnormality of the signal transmission path. In other words, the speed is detected only by another normal one-phase signal, and the speed control is continued.

[0005]

In order to achieve the above object, as a counter input for obtaining an encoder pulse count value for performing speed detection calculation, in a normal state, a rotational direction component is calculated based on an encoder two-phase output signal. By using the direction pulse that has and switching to the edge pulse of the encoder signal of the normal phase when the phase loss is detected, the speed detection process can be continued even when the phase loss occurs, and the speed control of the electric motor can be continued. It was done like this.

Further, in order to improve the speed detection performance, it is usually 1 times, 2 times or 4 times the encoder output signal.
Velocity detection is performed with the direction pulse multiplied by twice the frequency. If a phase loss occurs and speed detection is switched from the edge pulse, the constant K that performs speed detection calculation is changed according to the multiplication ratio of the direction pulse and the frequency ratio of the edge pulse, and the speed control of the electric motor is continued. It was made possible.

In the sampling period in which the phase loss occurs and the counting pulse of the counter is switched as described above, speed detection is disabled or speed control is performed using the speed detection value at the previous sampling.

When the phase is lost and the speed is detected using only the one-phase signal, the direction of rotation is the direction immediately before the detection of the phase or the direction of the speed command value to continue the speed control of the electric motor. It was made possible.

[0009]

The rotation speed can be detected from the rotation angle obtained by counting the number of encoder pulses and the time required for the rotation angle. As a commonly used method, a direction pulse (or a direction signal and a pulse) is generated for each rotation direction from the edge and level of each encoder two-phase signal, and the rotation angle is measured.
However, in this method, when one phase is missing, the signal level becomes constant, so that the rotation direction is reversed at each normal phase edge. That is, although the rotation direction cannot be determined from the one-phase signal of the encoder, the rotation angle can be measured by counting the edge pulses, so that the absolute speed can be detected. Therefore, as the counter input for rotation angle measurement, either the direction pulse or the edge pulse should be input via the switch, and when the encoder is normal, the direction pulse is input and when the phase is lost. By switching to input the edge pulse of a normal phase, the absolute speed can be detected even when there is a phase loss, and the speed control can be continued by adding a sign to the absolute speed and feeding back the speed.

Further, as a method for improving the speed detection performance, usually, the speed is detected by a direction pulse having a higher resolution by being multiplied by a frequency of 1, 2, or 4 times the encoder output signal. When the switching is performed to detect the speed from the edge pulse, the edge pulse can only be multiplied by 1 or 2. Therefore, when the phase loss occurs and the counting pulse is switched, the multiplication factor of the direction pulse and the edge By changing the constant K that performs speed detection calculation according to the frequency ratio of the pulse, the speed detection value can be made the same, and the speed control of the electric motor can be continued without affecting the speed control system. It is the one.

Further, in the sampling period in which the phase loss occurs and the counting pulse of the counter is switched as described above, since the direction pulse and the edge pulse having different multiplication factors are mixed, the constant K for performing the speed detection calculation can be determined. Without accurate speed detection. Therefore, it is possible to minimize the adverse effect on the electric motor by invalidating the speed detection only during the sampling period or performing the speed control by using the speed detection value at the previous sampling.

Further, the rotation direction cannot be discriminated even if the absolute value of the speed can be detected with only one phase signal of the encoder as described above, but the rotation direction of the electric motor does not suddenly change before and after the phase loss. Also, since the motor rarely rotates in the direction opposite to the speed command value, the rotation direction when detecting the speed with a one-phase signal after the phase loss is the direction immediately before the phase loss was detected, or the speed command value. The speed control of the electric motor can be continued by detecting the speed as the rotation direction of the electric motor.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of an electric motor speed controller according to the present invention will be described below with reference to FIG. The microcomputer 1 (hereinafter, referred to as the microcomputer 1) has a speed command value ωr and a speed detection unit 1 for each sampling cycle for performing speed control processing.
The speed control unit 11 performs speed control based on the speed detection value ωf obtained in 2 and outputs the current command value Ir. The current control unit 13 performs current control based on the current command value Ir and the current detection value If detected by the current detector 21, and outputs the voltage command value Vr. In accordance with this voltage command value Vr, the gate pulse generator 14 generates a gate pulse to the power converter 2 composed of a power semiconductor element, and the power converter 2 sends a predetermined power to the electric motor 3 and a speed command to the electric motor 3. Rotate to the value ωr. The encoder 4 is directly connected to the electric motor 3,
Two-phase signal φ with 90 degree phase of frequency proportional to rotation speed
Output A and φB. The pulse processing circuit 5 inputs the two-phase signals φA and φB, synchronizes with the reference clock CLK, and then outputs the open phase signal (A open phase, B open phase) for each phase to the microcomputer 1
And the direction pulses u and d for each rotation direction are output to the u / d (up / down) counter 6 for position detection. To measure the encoder pulse interval, the counter 7 counts the reference clock CLK, and the output of the OR circuit 8 that obtains the OR signals of the direction pulses u and d is used as the gate signal.
Holds the count value of. The microcomputer 1 calculates the speed detection value ωf according to the equation (1) based on the output value M of the u / d counter 6 and the held value T of the latch 9 to obtain the speed feedback amount. The method of discriminating the rotation direction from the two-phase encoder signal and the method of multiplying the pulse in the pulse processing circuit 5 may be publicly known, but a detailed circuit of an example thereof is shown in FIG. 2 and a time chart for explaining the operation is shown in FIG. As shown in FIG. The edge extraction pulse synchronization circuit 51 has two stages of flip-flops arranged in series for each phase (flip-flops 510, 511 and 513, 51).
4) Then, in synchronization with the reference clock CLK, the exclusive OR circuit (512 and 515) extracts the rising / falling edge of each phase for one clock pulse of the reference clock CLK. Direction discrimination and multiplication circuit 52
Generates a signal that is multiplied by 4 from each edge of the A phase and the B phase, assuming that the phase of the B phase is advanced as shown in FIG. That is, the AND circuit and the OR circuit (520
To 529), the synchronizing pulses A and B of each phase and the edge pulses 2A and 2B are input, and direction pulses up and do that are multiplied by 4 for each rotation direction are output. The switch 53 includes an AND circuit and an OR circuit (530 to 535), and switches the direction pulse and the edge pulse according to the level of the switching signal Sel. In other words, the switching signal Sel selects a direction pulse of 4 times multiplication and an edge pulse of 2 times multiplication and inputs it to the u / d counter 6. The open phase detection circuit 54 has two stages of flip-flops 540 to 543 for each phase connected in series, and as shown in the time chart of FIG.
A and 2B are flip-flop clock ck and clear C
It is input to R, and the phase loss on the side where the edge pulses 2A and 2B are not input to the clear CR is detected. FIG. 5 shows an entire time chart when the phase A is missing. Before the A-phase open phase, the coefficient value M of the direction pulse multiplied by 4 and T, which is time information synchronized with the direction pulse, are used for each detection sampling.
The speed is detected based on the equation (1). After detecting the open phase of the A phase, the switching signal Sel is changed to switch to the normal edge pulse of the B phase, and the speed detection is continued from the edge pulse count value M and the time information T. In this case, even if the rotation direction is the same direction, the count value of the u / d counter 6 seems to be reversed in the rotation direction. Therefore, the absolute value of the change in the count value is obtained, the absolute speed is detected, and then the sign is changed. Determine and speed feedback. Such control processing is executed by the microcomputer 1, and its detailed contents will be described with reference to the flowchart of FIG. In the first step 101 of the interrupt processing for each detection sampling, the rotational position information M (i) of the electric motor and the time information T (i) required for the position change are taken in with the current sampling time as (i). After that, in steps 102 and 103, the change amounts ΔM (i) and ΔT between samplings are
Calculate (i). In step 104, it is judged whether or not the phase loss of the encoder is already detected by the phase loss flag, and if there is no phase loss, the routine proceeds to step 105, and it is checked whether there is a phase loss signal from the phase loss detection circuit. If the open phase detection signal has not been input, the amount of change in position information ΔM in step 106.
(I), ΔT (i), the amount of change ΔT (i) in time information, and the speed detection constant K are used to perform speed detection calculation. At step 107, as post-processing of speed detection, the current position information M (i) and time information T (i) are stored for calculation at the next sampling time. Then, step 108
At the speed command value ωr (i) and the detected value ωf (i),
And a speed control law fs such as proportional-plus-integral compensation is performed to output a current command value Ir (i). Then, in steps 109 and 110, the current command value Ir (i)
And a detected value If (i) and a current control law fi, a current control calculation is performed to output a voltage command value Vr (i), and
A gate pulse corresponding to the voltage command value Vr (i) is output to the power converter, and the control process ends. In addition, step 1
When the open phase is detected in 05, steps 111 to 116
Immediately after the detection of the open phase of, the processing shifts. In step 111, the open phase flag is set at the subsequent sampling points to indicate the open phase state. In the present embodiment, when the encoder is in the normal state, the direction pulse obtained by multiplying by 4 is used, and the edge pulse after multiplying by 2 is used. However, since the detected speed value before and after the phase loss is the same value, the step 112 is performed. The speed detection constant K is doubled, and the switching signal Sel of the input pulse to the u / d counter is set to high level in step 113. In addition, the encoder pulse count value immediately after the detection of the phase loss is such that pulses of 4 times and 2 times are mixed such as S (i) to S (i-1) in FIG. 5, so accurate speed detection should be performed. Is impossible. As one solution to this, in step 114, the previous speed detection value is used as the current speed detection value, assuming that there is no rapid change in speed. Furthermore, in step 115, after the external phase is notified (for example, LED display), step 116 is performed.
In the following, the rotation direction before the phase loss is stored in the work area (Sw) for speed detection processing at the time of the phase loss thereafter. Therefore, at the subsequent sampling time point, since the open phase flag is set in step 104, the process proceeds to step 117 and the speed detection process during open phase is continued. Since only one of the A and B phase signals is used when there is a phase loss, the rotation direction cannot be determined.
At 17, the absolute value of the change amount ΔM (i) of the position information is obtained. After that, the speed detection calculation is performed in step 118. Since this value is an absolute value, the sign of the speed detection value (rotation direction) is calculated from the work area (Sw) in which the code before the open phase is stored in step 119. Is determined and the subsequent speed control calculation is performed.

In the above embodiment, the multiplication factor of the direction pulse (1 time, 2 times, 4 times) and the multiplication factor of the edge pulse (1 time)
Any combination may be used, and it is also possible to determine the speed detection constant K by the ratio of these multiplication numbers.

According to the present embodiment, the value of the speed detection value becomes constant by changing the speed detection constant K after detecting the phase loss, so that the speed control can be performed without any influence on the speed control system. The effect is that you can continue. In addition, at the time of sampling immediately after the detection of phase loss, the speed detection is not performed and the previous speed detection value is used as the speed feedback amount.Therefore, speed detection is not performed using pulse count values with different multiplication numbers, and an incorrect speed is fed back. Since it does not occur, there is an effect that the speed control system can be stably controlled even at the time of phase loss. Also,
Since the phase loss detection circuit is arranged in the encoder pulse processing circuit, there is an effect that not only the failure of the encoder itself but also the abnormality of the signal transmission path can be detected. Further, since the abnormal state is reported to the outside, the repair of the device can be performed at an appropriate time, which has the effect of minimizing the decrease in work efficiency.

In the above embodiment, after the phase loss detection, the rotation direction immediately before the phase loss detection is stored and the rotation direction is used as the rotation direction of the speed detection value after the phase loss. It is also possible to use the direction of the command value as the sign of the speed detection value.

According to this embodiment, the speed control can be performed irrespective of the operating state of the electric motor not only when applied to the work that rotates only in one direction but also when applied to the field including forward / reverse rotation and acceleration / deceleration. The effect is that you can continue.

Further, the open-phase detection circuit in the above embodiment detects two open-phase flip-flops for each phase, but the flip-flops of more stages are connected in series. It is also possible to detect a missing phase.

According to this embodiment, the sensitivity of open-phase detection can be freely selected according to the number of flip-flop stages, so that erroneous detection can be performed when the motor is switched between forward and reverse rotation and when noise is superimposed on the encoder pulse signal. The effect is that it can be prevented.

Next, another embodiment of the input pulse switching method after detecting one phase loss is shown in FIG. 7, the same reference numerals as those in FIG. 1 indicate the same functions. The reset signal is issued when the power is turned on, the flip-flops 55 and 56 are set by the reset signal, and the two-phase signals φA and φB are input to the encoder pulse processing circuit 5. Further, the flip-flop 57 is reset by the reset signal and outputs the output of the switch 53 to the direction pulse (u
p / do). The open phase signal for each phase output from the open phase detection circuit 54 becomes an input of the OR circuit 57, and the output of the OR circuit 57 becomes a set input of the flip-flop 58, so that the switch 53 at the time when the open phase occurs. Is switched to the edge pulses 2A and 2B. At the same time, the open phase detection signal of the open phase detection circuit 54 becomes the reset input of the flip-flops 55 and 56 for each phase, and resets the output of the flip-flop of the phase in which the open phase occurs. Therefore, in the AND circuits 41 and 42 connected to the flip-flops 55 and 56, the encoder pulse of the phase in which the phase is lost is masked from the input of the encoder pulse processing circuit 5, and the input of the switch 53 is in the normal phase. Only signal. The speed detection calculation of the microcomputer 1 based on these signals can execute the speed control of the electric motor by the same process except step 113 in FIG.

According to the present embodiment, since the encoder pulse input of the phase in which the phase loss occurs can be masked by hardware, a partial failure of the encoder (for example, only a part of 360 degrees of the entire phase is out of phase). In this case, the reliability can be improved because the failure can be stored and only the normal phase signal can be supplied, and the processing of the microcomputer can be reduced because the switching of the switch 53 can be performed by hardware. There is.

[0022]

According to the present invention, even if one phase of the encoder is out of phase, speed control can be executed only in the other normal phase, and even if the phase is lost, the motor is not stopped suddenly. Since it is possible to blame up to a safe place, especially for electric vehicles, etc., because it is possible to carry out the residual work of prescribed work, and it is possible to finish the prescribed work on the production line, etc., which can improve the safety of equipment and reduce work efficiency. Has the effect of suppressing

[Brief description of drawings]

FIG. 1 is an overall configuration diagram of a speed control device for an electric motor to which the present invention is applied.

FIG. 2 is a detailed diagram of an encoder pulse processing circuit.

FIG. 3 is a time chart explaining the operation of the encoder pulse processing circuit.

FIG. 4 is a time chart for explaining the operation of the open phase detection circuit.

FIG. 5 is a time chart explaining a speed detection operation.

FIG. 6 is a flowchart showing processing of a microcomputer.

FIG. 7 is a configuration diagram of another embodiment in which pulse input is switched at the time of phase loss.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Microcomputer, 3 ... Electric motor, 4 ... Encoder, 5 ... Encoder pulse processing circuit, 6 ... u / d counter, 7 ... Counter, 9 ... Latch circuit, 11 ... Speed control part, 12 ... Speed detection part, 51 ... Edge extraction pulse synchronization circuit, 52 ... Direction discrimination / multiplication circuit, 53 ... Switching device, 5
4 ... Open phase detection circuit.

Claims (6)

[Claims] 1. A rotation detector that generates a two-phase pulse having a phase difference of 90 degrees at a frequency proportional to a rotation speed, an edge extraction circuit that extracts an edge of each pulse of the two-phase pulse, and the edge. Direction discriminating means for discriminating the rotation direction from the edge pulse output from the extraction circuit and the level of the two-phase pulse and outputting an independent direction pulse for each rotation direction, and a rotation direction for counting the direction pulse independent for each rotation direction A reversible counter whose counting direction changes according to the number of pulses, a timer counter that counts the clock pulses and measures the time interval of the direction pulses, and latch means that holds the count value of the timer counter at the time of outputting the direction pulses. Then, in the speed detection device for detecting the speed of the rotating machine from the count value of the reversible counter and the held value of the latch means, the input of the reversible counter A pulse switching means for selecting either the direction pulse or the edge pulse, and a phase loss detecting means for detecting a phase loss of the rotation detector or a failure of the signal transmission path by using both phases of the edge pulse are provided. When the phase loss detection means detects a failure, the switching means switches the input pulse of the reversible counter from the direction pulse to the edge pulse of a normal phase to continue the speed detection processing, and the rotation detector. Alternatively, a digital speed detecting device is provided with means for reporting to the outside that the signal transmission path has failed. 2. The speed detecting device according to claim 1, wherein the position information used for speed detection is calculated as a change amount ΔM of the number of direction pulses input within a predetermined period from the count value of the reversible counter to obtain time information. As a result, the time interval ΔT required for the change amount of the direction pulse number is measured by the count value of the timer counter, and In the speed detection device for detecting the rotation speed by the formula (1),
The direction discriminating circuit uses the edge of the output pulse of the speed detector to generate a pulse having the same frequency as or multiplied by the output pulse of the speed detector, and inputs one of the multiplied pulses to the reversible counter. Position information, the rotational speed of the rotating body is detected by the equation (1). When the failure detecting means detects a failure and the input of the reversible counter is switched to the edge pulse, the multiplied pulse and the A digital speed detecting device, characterized in that the constant K in the expression (1) is changed according to the frequency ratio of the edge pulse and the speed detecting process of the rotating body is continued. 3. The speed detecting device according to claim 1, wherein when the phase loss detecting means detects a failure and the speed detecting operation is shifted from the multiplication pulse to the information of the edge pulse,
An edge pulse of one phase is used as the input of the up count clock of the up / down counter, and another phase is used as the input of the down count clock of the up / down counter,
The absolute value of the speed is calculated from the amount of change in the count value during the sampling period for speed detection, and the sign of the absolute value of the speed is made the same as the sign of the speed detection value before the phase loss, or Is the same as the sign of the speed command value and is a speed feedback signal. 4. A speed detecting device according to claim 1, wherein said phase loss detecting means detects a phase loss of the encoder, and detects a phase loss when shifting the speed detection calculation from the multiplication pulse to the information of the edge pulse. The switching signal to the pulse switching means is changed based on the signal, the signal of the phase in which the failure has occurred is masked by hardware, and only the signal of the other non-failed phase is in the up / down counter. A digital type speed detecting device, characterized by performing a speed detecting calculation as input. 5. The speed detecting device according to claim 1, wherein the phase loss detecting means detects a failure, and the speed is detected at a sampling point when the speed detecting operation is switched based on the information from the edge pulse. A speed control device for an electric motor, wherein the speed control calculation is continued by invalidating the detection value or using the speed detection value one sampling before. 6. The abnormality determining means according to claim 1, wherein each rising / falling edge of the two-phase pulse signal output of the speed detector is used, and a clock of a flip-flop in which a plurality of one-phase edge signals are connected in series is provided. By inputting another one-phase edge signal as an input to the clear (or reset) signal of the flip-flops connected in series, the clear (or reset) signal input side of the flip-flops connected in series A digital type speed detection device characterized by detecting a phase loss or a failure of the phase.