JPH0774756A - Phase matching device for byte of transmission data for both active and standby system in atm communication system - Google Patents

Abstract

PURPOSE:To attain uninterruptible redundancy changeover of a transmission line by making cell phases of transmission data in an SDH frame at changeover of active/standby system in data transmission to a transmission line in the ATM system. CONSTITUTION:A cell position byte number measurement circuit 3A detects a cell head position from an overhead of read data by a format conversion buffer 1A in an active system A and the cell position corresponding to a detected by the number is informed to a standby system B. When the standby system B is selected, a cell pulse generating circuit 5B of the standby system decides a cell pulse generating timing of the cell pulse generating circuit 2B according to the noticed cell position byte number to control read of the buffer 2B. Thus, the phases of the cells of both the systems are matched with each other at redundant changeover and uninterruptible changeover is attained.

Description

Detailed Description of the Invention

[0001]

The present invention relates to an ATM (Asynchr)
More particularly, the present invention relates to an active spare system byte phasing device for transmission data in an empty transfer mode communication system, and more particularly to a transmission data byte phasing system at the time of redundancy switching of a transmission line of an ATM communication system.

[0002]

2. Description of the Related Art In an ATM communication system, SDH (Synchronous Digital) is set in a transmitter.
Hierarchy) A format in which ATM cells are inserted in the overhead part and the payload part of the frame (full-spec ATM configuration) to a format in which ATM cells are inserted only in the payload part of the SDH frame (S
It is necessary to convert it into a DH frame structure) and send it out on the transmission path.

The format of the SDH frame structure on this transmission line (according to CCITT recommendation, G.708) is shown in FIG.
Is shown in. In the figure, SOH is a section overhead part, POH is a path overhead part,
The remaining part is the payload part and the valid data part.

In this format, the number of cells in one row is 5, the number of bytes in one row is 260 bytes, and the number of bytes in one cell is 53 bytes. Therefore, the number of bytes from the overhead of each row to the beginning of the ATM cell is different for each row as shown in a and b as shown in FIG.

A block of a conventional format conversion circuit is shown in FIG. An active system A and a standby system B are provided, and both systems have the same configuration. In the format conversion buffers 1A and 1B, transmission data is once written to this buffer in order to convert the full-spec ATM structure to the SDH frame structure.

Data reading from the buffers 1A and 1B is performed based on the cell pulse from the cell pulse generation circuits 2A and 2B. This cell pulse is a pulse indicating the head position of the ATM cell from the overhead and is synchronized with this cell pulse. Then, each ATM cell is read (FIG. 4).

[0007]

In this case, both systems A and B
Since the cell pulse generation circuits 2A and 2B of No. 3 have independent counter configurations, the cell pulse generation position (a in FIG. 4) in the payload part in the SDH frame does not match in both systems, and the byte order of the transmission data is However, there is a drawback in that it is difficult to switch the transmission line without hitless redundancy.

An object of the present invention is to provide an active spare dual-system byte phase aligning device for transmission data in an ATM communication system capable of non-interruptive redundant switching of a transmission line.

[0009]

According to the present invention, on the transmission path from the format in which ATM cells are inserted in the overhead part and the payload part of the SDH frame provided in each of the working system and the protection system in the device. In this case, a buffer for format conversion for converting into a format in which ATM cells are inserted only in the payload section of the SDH frame, and a buffer provided for each of the working system and the standby system, are provided when reading the buffer of the own system. Cell position byte number detecting means for detecting the number of bytes from the overhead part to the beginning of the ATM cell for each frame of the system SDH frame and transmitting the cell position byte number corresponding to the detected byte number to another system; It is provided in each of the system and the standby system, and for each frame based on the number of cell position bytes sent from the other system at the time of switching command to the own system. Autologous and means for controlling the reading of the buffer, the working spare two-sided byte phasing device of the transmission data in an ATM communication system comprising a can be obtained.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is an operation time chart thereof. An active system A and a standby system B are provided, and both systems have the same configuration. The format conversion buffers 1A and 1B are SD on the transmission line from the full-spec ATM structure in the transmitter.
This is a format conversion to the H frame structure, and the in-device data is written in the temporary buffers 1A and 1B, respectively.

The cell pulse generation circuits 2A and 2B use cell pulses (367 KC) for reading the respective buffers 1A and 1B.
This cell pulse is a free-running counter in which both systems are basically independent of each other, and is a pulse indicating the ATM cell head position from the overhead. In response to this cell pulse, a read cell phase counter clock that is synchronized with the bytes that form the cell is generated, but since the overhead section of the SOH and POH sections of the SDH frame structure does not read data, the read cell phase counter clock is not read. The counter clock for use is suppressed.

The cell position byte number measurement circuits 3A and 3B measure the number of bytes indicated by a (the ATM cell start position from the overhead portion) for each row (frame) of the SDH frame structure of FIG. For example, in the active system, the number of bytes a is measured for each frame, a correction value (described later) is added, and the result is transmitted to the standby system.

The correction value in this case will be examined. Figure 4
Cell head position b in the row following the one row shown in
Is expressed as follows: b = a + 53 × 5-260 = a + 5 (1) Where 53 is the number of bytes in the cell and 5 is 1
The number of cells in a row, 260 is the number of bytes in one row.

As can be seen from the equation (1), the cell start position b of the next row is 5 with respect to the cell start position a of the previous row.
It is the sum of bytes.

Therefore, in the cell position byte number measuring circuit 3A, "5" is loaded to the counter at the timing of SPOH (overhead display signal), and the number of bytes up to the cell pulse is counted by the read cell phase counter. The count number at the timing of the cell pulse is obtained, and since the count number becomes the cell phase of the next row (cell head position b), this is notified to the standby system.

In this case, the counter is 2 ⁶ counter, and when the count value exceeds 53, 5 is loaded. The value of 53 matches the number of bytes in one cell.

On the spare side, the number of bytes of the cell position is notified from the active system A. If the standby system B is selected by the active / spare selection signal at this time, the cell pulse generation control circuit 5B has the cell pulse generation circuit 2B. Against
From the free run state, using the read cell phase (the number of bytes) notified from the active system side, a cell pulse (367 KC) is shifted at a position shifted from the overhead position by that number of bytes.
The read control of the buffer 2B is performed so as to generate PS).

When the standby system B is switched to the active system A, the read cell phase by the cell position byte number measuring circuit 3B of the standby system is notified to the active system A as in the above, and the cell pulse generation control circuit 5A The generation of cell pulses will be controlled.

By doing so, the cell phases of both systems coincide with each other at the time of active standby switching, so that it is possible to switch the transmission lines without interruption.

In this example, the counter for counting the number of read cell position bytes shown in FIG. 2 is loaded with "5" in synchronization with SPOH to add the correction value "5" in advance. Although the notification is made to the other system, the load to the counter concerned may be set to "0", and the correction value "5" may be added on the notified side.

[0022]

As described above, according to the present invention, in data transmission to the transmission line, the cell phase of the transmission data is completely set between the active system and the standby system when inserting the ATM cell in the SDH frame. It is possible to make them coincident with each other, so that there is an effect that it is possible to perform non-instantaneous redundancy switching on the transmission path.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a time chart showing the operation of the blocks of FIG.

FIG. 3 is a block diagram of a conventional active spare dual-system byte phasing device.

FIG. 4 is a format diagram showing an SDH frame structure.

[Explanation of symbols]

 A Working system B Spare system 1A, 1B Format conversion buffer 2A, 2B Cell pulse generation circuit 3A, 3B Cell position byte number measurement circuit 5A, 5B Cell pulse generation control circuit

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Hiromi Ueda 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation

Claims (2)

[Claims] 1. An ATM cell is provided only in a payload section of an SDH frame on a transmission line from a format in which ATM cells are inserted in an overhead section and a payload section of an SDH frame provided in each of a working system and a standby system. A buffer for format conversion for converting to the inserted format, and an overhead unit provided for each of the active system and the standby system, and for each frame of the SDH frame of the host system when reading the buffer of the host system. To the head of the ATM cell, and cell position byte number detecting means for transmitting the cell position byte number corresponding to the detected byte number to another system, and each of the active system and the standby system are provided. , Read out the buffer of the own system for each frame based on the number of cell position bytes sent from the other system at the time of the switching command to the own system. Working spare two-sided byte phasing device of the transmission data in an ATM communication system comprising means for Gosuru, the. 2. The cell position byte number detecting means is configured to send a value obtained by adding a predetermined number to the byte number up to the head of the ATM cell to another system. Currently used spare dual-system byte phasing device for transmission data in the ATM communication system.