JPH0746704B2 - Semiconductor memory device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device including a floating gate type field effect transistor having excellent memory characteristics.

Conventional Technology Conventionally, electrically erasable ROM (EEPROM; Elec
As one of the "trically erasable and programmable ROM", a semiconductor memory device of a floating gate structure is known in which writing and erasing are performed by tunneling injection.
In this floating type semiconductor memory device, charges are tunneled from the semiconductor substrate side through a thin insulating film, the charges are accumulated in a floating gate electrode on the insulating film, and the threshold voltage of a transistor is changed to store information. The principle is that.

FIG. 3 shows a cross-sectional view of an example of a conventional floating gate type semiconductor memory device. 1 is a P-type silicon substrate, 2 and 3 are N-type diffusion regions, 4 is a silicon oxide film, 10 is a thin silicon oxide film that can be a tunneling medium, 7 is a floating gate electrode, 8 is a silicon oxide film, and 9 is a control gate. It is an electrode.

In recent years, in a semiconductor memory device as shown in FIG. 3, in order to realize a low program voltage, a silicon nitride film is used instead of a thin silicon oxide film 10 that can be a tunneling medium, and pool Frenkel tunneling injection efficiency is improved. The increased structure is well known.

Problems to be Solved by the Invention However, if a structure using a silicon nitride film having higher electrical conductivity than a silicon oxide film is used as the tunneling insulating film, the discharge efficiency of charges accumulated in the floating gate electrode also increases. However, it has a drawback that the memory retention property is deteriorated. That is, there is a contradictory relationship between lowering the program voltage and ensuring the memory retention characteristic, and it is extremely difficult to lower the program voltage while ensuring the memory retention characteristic, which is a practical problem. It was

In view of the above problems, an object of the present invention is to provide a new structure in a floating gate type semiconductor memory device, which can lower the program voltage without deteriorating the memory retention characteristic.

Means for Solving the Problems In order to achieve the above object, the present invention provides a first silicon nitride having high electrical conductivity in a predetermined region on a semiconductor substrate of one conductivity type having source and drain diffusion regions. A first insulating film capable of forming a Pool Freren-Gel tunneling medium by sequentially stacking at least two kinds of films of a film and a second silicon nitride film having a lower electrical conductivity lower than the film, and the first insulating film. Provided is a semiconductor memory device having a floating gate electrode thereon and a control electrode on the floating gate electrode via a second insulating film.

Action According to the structure of the present invention, since the silicon substrate is provided with the silicon nitride film having high electric conductivity, it is possible to increase the tunneling injection efficiency from the silicon substrate side, while the floating gate electrode side is provided. Since the silicon nitride film having low electrical conductivity is provided, the efficiency of discharging the charges accumulated in the floating gate electrode is reduced, and excellent memory retention characteristics can be secured.

Example A specific example of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional structural view of a semiconductor memory device which is an embodiment of the present invention. In the figure, 1 is a P-type silicon substrate, 2 and 3 are N-type diffusion regions, 4 is a silicon oxide film, 5 is a first silicon nitride film having high electrical conductivity, and 6 is second nitride having low electrical conductivity. A silicon film, 7 is a floating gate electrode, 8 is a silicon oxide film, and 9 is a control gate electrode.

An embodiment of a manufacturing method for realizing the structure of the present invention as shown in FIG. 1 is shown in FIGS. 2A to 2C.

First, as shown in FIG. 2A, N type diffusion regions 2 and 3 are formed on a P type silicon substrate 1 by a known selective diffusion technique, and then a silicon oxide film 4 is formed by a thermal oxidation method. The thickness of the silicon oxide film 4 needs to be thick so that tunneling from the substrate does not occur, and in this embodiment, it is set to 500Å.

Next, after the silicon oxide film 4 in a predetermined portion to be the tunneling region is removed by etching, the first silicon nitride film 5 having high electrical conductivity and the second silicon nitride film 6 having low electrical conductivity are sequentially formed. . In order to effectively use the tunneling effect, the first silicon nitride film 5 having high electrical conductivity and the second silicon nitride film 6 having low electrical conductivity have a total thickness of about 70 to 150Å. In this embodiment, the first silicon nitride film 60Å having high electrical conductivity is used as the second silicon nitride film 60Å having low electrical conductivity. The electrical conductivity of the silicon nitride film can be controlled by, for example, the NH ₃ / SiH ₄ flow rate ratio in the vapor phase growth method based on the chemical reaction of silane (SiH ₄ ) and ammonia (NH ₃ ), and generally NH 3 _The higher the ₃ / SiH ₄ flow rate ratio, the lower the electrical conductivity. Therefore, in the present embodiment, the first electrical conductor having high electrical conductivity is used.
The silicon nitride film 5 of NH ₃ / SiH ₄ (flow ratio) = 10,800
The second silicon nitride film 6 having a low electric conductivity formed by the vapor phase growth method under the condition of ° C is NH ₃ / SiH ₄ (flow rate ratio) = 500, and the vapor phase growth method under the condition of 800 ° C. Formed by.

Next, as shown in FIG. 2B, a conductive polysilicon film is formed on the second silicon nitride film 6 by about 5000 Å, and then the floating gate electrode 7 made of the polysilicon film is formed by a known photoetching technique. Form.

Next, as shown in FIG. 2C, a silicon oxide film 8 is formed on the floating gate electrode 7 to a thickness of about 1000 Å by a normal thermal oxidation method. Thereafter, a conductive polysilicon film is formed to a thickness of about 4000 Å, and then a control gate electrode 9 made of a polysilicon film is formed by a known photoetching technique to realize the structure of the present invention as shown in FIG. 2C. You can

An example of the memory retention characteristics of the semiconductor memory device of the present invention as shown in FIG. 2C is shown in FIG. 4 (line 11). In addition, the memory retention characteristics of the case where only the highly conductive silicon nitride film is used as the tunneling insulating film (dashed line 12) and the case where only the low electrical conductivity silicon nitride film is used (dotted line 13) are compared. Are also shown in FIG.

As can be seen from this figure, the memory retention characteristics when only the low-electrical conductivity silicon nitride film is used (dashed line 12) are:
Although it has excellent characteristics, it has a small memory window width (difference in threshold voltage between the write mode and the erase mode), which is disadvantageous for writing and erasing at a low voltage. Further, when only the high-electrical-conductivity silicon nitride film is used (dotted line 13), the memory window width becomes sufficiently large, which is advantageous for low-voltage write / erase, but is inferior in memory retention characteristic.

On the other hand, the memory retention characteristic (straight line 11) of the semiconductor memory device having the structure of the present invention is such that the memory window width is sufficiently large and the memory retention characteristic is also very excellent, and the program voltage can be maintained without degrading the memory retention characteristic. It is possible to reduce the voltage.

In the above description, the case where the silicon nitride film has two layers has been exemplified, but the same effect can be expected by using three or more layers of silicon nitride films having different electric conductivities.

As described above, according to the structure of the present invention, the program voltage can be lowered without deteriorating the memory retention characteristic, and the high performance of the floating gate type semiconductor memory device can be realized. It will greatly contribute to the realization.

[Brief description of drawings]

FIG. 1 is a sectional view for explaining an embodiment of the present invention, FIG. 2 is a process sectional view for explaining an embodiment of a manufacturing method for realizing the structure of the present invention, and FIG. FIG. 4 is a structural sectional view of a conventional floating gate type semiconductor memory device, and FIG. 4 is a memory retention characteristic diagram for explaining the effect of the present invention. 1 ... P-type silicon substrate, 2,3 ... N-type diffusion region, 4 ...
... Silicon oxide film, 5 ... High electrical conductivity first silicon nitride film, 6 ... Low electrical conductivity second silicon nitride film, 7 ... Floating gate electrode, 8 ... Silicon oxide film, 9 ...... Control electrode.

Claims (3)

[Claims] 1. A first silicon nitride film having a high electrical conductivity and a second silicon film having a lower electrical conductivity lower than the first silicon nitride film are provided in a predetermined region on a semiconductor substrate of one conductivity type having diffusion regions of a source and a drain. At least two kinds of films of a silicon nitride film are sequentially stacked, and a first insulating film that can serve as a pool Frelengel tunneling medium is provided, a floating gate electrode is provided on the first insulating film, and a floating gate electrode is provided on the floating gate electrode. A semiconductor memory device comprising a control electrode via a second insulating film. 2. The semiconductor according to claim 1, wherein the first silicon nitride film and the second silicon nitride film are formed with the same mixed gas and different flow rate ratios of the mixed gas components. Storage device. 3. The semiconductor memory device according to claim 1, wherein the floating gate electrode is formed of a conductive polysilicon film.