JPH07335560A - Forming of amorphous silicon film and thin-film transistor element - Google Patents

Abstract

PURPOSE:To prevent dust from being generated even in the case of a high-speed film formation by depositing amorphous silicon film by specifying each interruption time of ON state for maintaining discharge by a high-frequency power and OFF state where the high-frequency power is turned off and discharge is at halt. CONSTITUTION:Chromium is formed as gate metal by the sputtering method and a gate electrode 11 is formed while performing patterning on a glass substrate 1 as an insulation substrate. Silicon nitride film 12 which is a gate insulation film is formed on the electrode 11 by the plasma CVD method. Then, silane and hydrogen are introduced and amorphous silicon film 13 which is an activated layer is formed by the intermittent discharge CVD method using a pulse train whose ON time is equal to 3 seconds or less and OFF time is equal to or more than 15 seconds as a gate pulse for controlling a high-frequency power of 13.56MHz at a substrate temperature of 300 deg.C. Further, a doping layer 15 which is turned into n type to form source/drain region is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an amorphous silicon film and a thin film transistor element, and particularly to a method for forming an amorphous silicon film in which dust is hardly generated during high speed film formation, and in which dust is hardly generated. The present invention relates to a thin film transistor structure using an amorphous silicon film formed by a film forming method.

[0002]

2. Description of the Related Art In recent years, active matrix type liquid crystal displays using thin film transistors using a hydrogenated amorphous silicon film as switch elements of respective display pixels have been mass-produced. As a method for depositing a hydrogenated amorphous silicon film, a plasma CVD method is widely used in which continuous high-frequency discharge is performed to decompose a silane-based gas to form a film.

As a forming method which is an extension of the continuous discharge plasma CVD method, a CVD method of intermittently performing high frequency discharge to decompose a raw material gas (hereinafter referred to as intermittent discharge plasma CVD
Abbreviated. ) Is proposed. Intermittent discharge plasma CVD
The method uses a high-frequency oscillator that can switch between an oscillating state and a stopped state at high speed by inputting a gate pulse signal as a high-frequency source.When the gate pulse is on, high-frequency power is output and discharge occurs, and This is a method of depositing an amorphous silicon film by intermittent high-frequency discharge in which the high-frequency power is cut off when the pulse is off and the discharge is stopped. In this film forming method, active radicals in plasma, which cause dust generation, are extinguished in an off state, so that the generation of dust is suppressed as compared with the conventional continuous discharge film formation. Regarding the intermittent discharge plasma CVD method, for example, Shiratani et al. (“Reaction control of process plasma by RF voltage amplitude modulation”, Shiratani, Matsuo, Hirano, Watanabe,
Kyushu University Engineering Bulletin, Vol. 62, No. 6, December 1989, p. 677) discussed its principle. Takechi et al. (“A-Si: H TFTs Fabricated
with Gated rf-discharge
Plasma-CVD Technology ",
K. Takechi, H .; Uchida, H .; Haya
ma, Extended Abstract of 1
993 International Confere
nce on Solid State Devices
and Materials, 1993, 970-9.
71) reported that dust during discharge was reduced by two orders of magnitude due to intermittent discharge film formation modulated at hundreds to thousands of hertz. Also,
It has been reported that modulation in a region other than these modulation frequencies has no effect of suppressing dust generation. For example, Journal of Applied Physics, Vol. 69, No. 15, pp. 632-638 (JOURNAL OF A
PPLIED PHYSICS, 69 (2), 15, J
In ANUARY 1991), it is reported that the generation of dust cannot be suppressed at a low modulation frequency of 40 Hz or less as in the case of the conventional continuous discharge.

[0004]

In a mass production process of an amorphous silicon thin film transistor array, the throughput of a plasma CVD apparatus is poor with respect to a manufacturing apparatus such as an etching apparatus. Therefore, a large number of plasma CVD apparatuses are installed to secure a line balance. is doing. From the viewpoint of the investment cost of manufacturing equipment, it is important to improve the throughput of the plasma CVD apparatus, and for that purpose, there is an urgent need to develop a technique for significantly increasing the film forming speed.

In the above-mentioned known example, the film-forming speed (2) which is used in the conventional continuous discharge film-forming by the intermittent discharge CVD method.
It has been reported that dust generation is reduced by about two orders of magnitude in the region (00-300 A / min) as compared with continuous discharge film formation. However, in order to improve the throughput, the film formation speed is set to 400
At about A / min, the amount of dust generated increases even if intermittent discharge film formation is used, and 200 A / mi is obtained by continuous discharge film formation.
The amount of generation is about the same as when the film is formed at the film formation rate of n to 300 A / min. If it is 500 A / min or more, the amount of dust increases rapidly, and it cannot be used for manufacturing products from the viewpoint of yield. In order to realize the improvement of the throughput of the plasma CVD apparatus by significantly increasing the film formation rate, 400 A / min is insufficient and 500 A / m.
It is strongly desired to develop a method for forming an amorphous silicon film that does not generate dust even when the film is formed at a high speed of in or more.

[0006]

In order to solve the above-mentioned problems, in the present invention, an intermittent discharge in which an ON state in which discharge is maintained by high frequency power and an OFF state in which high frequency power is cut off and discharge is stopped are repeated. In the method for forming an amorphous silicon film by depositing an amorphous silicon film, the on-state duration is 3 seconds or less, and the off-state duration is 15 milliseconds or more. A method for forming a film is provided.

An amorphous silicon film deposited by intermittent discharge having an on-state duration of 3 seconds or less and an off-state duration of 15 milliseconds or more is at least used as a channel active layer or a source. -Providing a thin film transistor element characterized by being used for a part of a drain layer.

Further, in order to realize a high-speed film formation of 500 A / min or more, it is desirable that the on-state duration is 1 millisecond or more and the off-state duration is 15 seconds or less.

[0009]

In the plasma CVD method, it is considered that the cause of dust generation is that the polymerization reaction of Si-based active radicals rapidly occurs in the gas phase. The mechanism by which the generation of dust in the gas phase in the conventional intermittent discharge plasma CVD method is suppressed has not been clarified, but the period of the OFF state as the modulation frequency is about the lifetime of active radicals. It is said that this is because the discharge is repeated intermittently at Hz. In the following, the on-state period during which the discharge is maintained is referred to as an on-time, and the off-state period during which the discharge is stopped is referred to as an off-time.

However, as shown in FIG. 1, an intermittent period in which a discharge having an off time of 15 milliseconds or longer is stopped and a discharge period having an on time of high frequency discharge of 3 seconds or less is repeated intermittently. It has been discovered that the amount of dust generated is extremely reduced by such a large discharge. This on time,
The off time is 10 Hz to 0.3 H as the modulation frequency.
It is a range of about z, which is a frequency region where it has been thought that dust is often generated in the past. For the first time, we invented that dust is extremely reduced under the specific conditions described above.
At this time, the on-duty ratio defined by on-time / (on-time + off-time) becomes a value of about 90% or more,
A film forming rate of 600 A / min or more can be easily obtained. That is, high-speed film formation of 500 A / min or more can be realized while the amount of dust generated is small.

The mechanism of dust reduction in the film forming method of the present invention is that the off time is two to three orders of magnitude longer than the life of silane-based active radicals, so that the phenomenon of dust reduction at a modulation frequency of about 1 KHz, which is a known technique, is reduced. It seems to be caused by a mechanism different from. For example, the off time of 15 milliseconds or more is required for the dust core generated in the vapor phase to die while it is growing. Also, if the on-time becomes too long, the dust will grow too large within one on-time,
A possible mechanism is that it cannot be killed in the off state. The present invention is considered to be a completely new phenomenon based on a mechanism different from the conventional particle reduction around 1 KHz.

The oscillation frequency of the high frequency discharge in the ON state is not particularly limited. For example, even at several hundred KHz, 13.56 which is often used in ordinary plasma CVD.
Even in MHz, higher frequency VHF band (30MHz ~
Even at 300 MHz), there is an effect that the amount of dust generation is suppressed at almost the same on time and off time.

[0013]

Next, a first embodiment of the invention described in claim 1 will be described. The amorphous silicon film forming apparatus used in this example has a frequency of 13.56 by a gate pulse.
It uses a high-frequency power supply with a pulse mode that can turn on / off the high-frequency power of MHz and a matching box that has a high-speed matching circuit with a response time of 100 microseconds or less. The size of the high frequency electrode is 600 mm square.

The film forming conditions used in this embodiment are: silane flow rate 200 SCCM, hydrogen flow rate 400 SCCM, gas pressure 1
It is 20 Pa and the substrate temperature is 300 ° C. The waveform of the gate pulse for controlling the high frequency power is shown in FIG. On time 3
A pulse train was used in which the second and off times were repeated for 15 milliseconds.

For the evaluation of dust, the number of dusts adhering to the substrate before and after film formation was measured by using a dust inspection device utilizing the scattering phenomenon of laser light for the dust adhering to the substrate. The number of dust particles attached in the plasma CVD apparatus was evaluated based on the increased amount. When the high frequency power in the on state was set to 400 W, the film forming rate was 800 A / min.

For comparison, an amorphous silicon film is formed by an intermittent discharge plasma CVD method under the conventional conditions in which all other film forming conditions are the same using a pulse train having an on time of 3 seconds and an off time of 500 microseconds. When formed,
The film forming rate was 750 A / min.

On the other hand, when the film is formed by using a pulse train having an on time of 3 seconds and an off time of 500 microseconds, the number of dust particles adhering to the substrate is 2 μm or more in a 240 mm × 290 mm area of the substrate. The number of dust particles is 2,500, which is extremely large, whereas the number of dust particles is 21 when the pulse train having the on-time of 3 seconds and the off-time of 15 milliseconds according to the present embodiment is used, which is 800 A / min. That is, the effect of dramatically reducing the amount of dust generated during high-speed film formation was shown. further,
When a thin film transistor array for a liquid crystal display was formed under these conditions, the defective rate due to a short circuit between the gate line and the data line due to dust generated in the plasma CVD apparatus was 0.1%, and it was formed by conventional continuous discharge. This is a significant improvement over the defect rate of 2%.

Next, a second embodiment of the present invention will be described. In this embodiment, the amorphous silicon film forming apparatus is
It is the same as the first embodiment. Amorphous silicon film formation conditions are as follows.
Hydrogen gas is 400 SCCM, vacuum degree is 120 Pa, and substrate temperature is 300 ° C. As a gate pulse for controlling high-frequency power having a frequency of 13.56 MHz, an ON time was kept constant for 3 seconds, and 400 W was introduced as high-frequency power in an ON state. Here, the number of dusts was measured by changing the off time, which is a feature of the present invention, from 100 microseconds to 100 milliseconds. Here, the off time is 100 milliseconds and the film formation rate is 550.
It was A / min. The results are shown in Fig. 3. The vertical axis represents the number of dust particles having a size of 2 μm or more in the range of 240 mm × 290 mm of the substrate. From FIG. 3, it can be seen that when the off time is longer than 15 milliseconds, the number of dusts is drastically reduced. this is,
This is the effect of long off-time insertion.

A third embodiment of the present invention will be described. The apparatus for forming an amorphous silicon film in this embodiment is the same as that in the first embodiment. Amorphous silicon film formation conditions are as follows: silane flow rate 200 SCCM as raw material gas, hydrogen gas 400 SCCM, vacuum degree 120 Pa, substrate temperature 30.
It is 0 ° C. A high frequency power source with a frequency of 13.56 MHz was used, the off time was set to 15 milliseconds, and 400 W was introduced as the high frequency power in the on state. Here, the on time is 1
The number of dusts was measured while changing from 0 millisecond to 10 seconds. The results are shown in Fig. 4. The vertical axis is the substrate 240 mm x 2
It is the number of dust particles with a size of 2 μm or more in the range of 90 mm.
From FIG. 4, it can be seen that when the on-time is shorter than 3 seconds, the number of dusts is drastically reduced. Compared to the case where the on-time is 3 seconds or more or the off-time is 15 milliseconds or less, 500 A / mi
A reduction in the number of dust particles of about 2 digits was realized at a high film forming speed of n or more, and the effectiveness of the present invention was verified.

A fourth embodiment of the present invention will be described. The amorphous silicon film forming apparatus used in this embodiment is
A high-speed arbitrary waveform signal generator is used as a high-frequency signal source, and an output signal from this high-speed arbitrary waveform signal generator is amplified by a high-speed power amplifier and introduced into a CVD device via a matching circuit to form plasma. Has become. The size of the high frequency electrode is 600 mm square. The high frequency range that can be used with this device configuration is from 10 KHz to 1
Up to 50 MHz. In this example, two frequencies of 100 KHz and 100 MHz were examined as the oscillation frequencies of the high frequency power. Amorphous silicon film formation conditions are silane flow rate 400SCC as a source gas.
M, hydrogen gas 400 SCCM, vacuum degree 140 Pa, substrate temperature 300 ° C. The on-time was kept constant for 300 milliseconds, and 400 W was introduced as high-frequency power at the time of on. Here, the off time was changed from 0.1 ms to 200 ms to measure the number of dust particles. Results are shown in FIG.
The off time is 15 ms, which shows a sharp decrease in dust.
The difference between the frequencies of the high frequency power is small. The deposition rate is, for example, when the frequency of the high frequency power is 100 MHz,
When the off time is 70 milliseconds, the film formation rate is 850 A / min
Was obtained, and the amount of dust generated in the plasma was high in the high-speed film formation, demonstrating the effectiveness of the present invention.

A fifth embodiment of the present invention will be described. The apparatus for forming the amorphous silicon film in this embodiment is the same as that in the fourth embodiment. Amorphous silicon film formation conditions are
Silane flow rate 400SCCM, hydrogen gas 4 as source gas
00 SCCM, vacuum degree 140 Pa, substrate temperature 300 ° C. The off time was kept constant for 300 milliseconds, and 400 W was introduced as high-frequency power when on. Where the on time is 1
The number of dusts was measured while changing from 0 millisecond to 15 seconds. Results are shown in FIG. The number of dust particles attached to the substrate does not depend much on the frequency of the high frequency that causes discharge,
The on-time is sharply increasing over 3 seconds. From this, when the on-time was set to 3 seconds or less, the adhesion of dust was small and the effectiveness of the present invention was proved.

FIG. 7 shows an embodiment of the structure of the thin film transistor according to the second aspect. First, a gate electrode 11 is formed on a glass substrate 10 serving as an insulating substrate by depositing chromium as a gate metal by a sputtering method with a film thickness of 100 nm and patterning. A silicon nitride film 12, which is a gate insulating film, is formed on this to a thickness of 400 nm.
Is formed by a plasma CVD method. Subsequently, silane flow rate 200 SCCM, hydrogen flow rate 400 SCCM, gas pressure 120 Pa, substrate temperature 300 ° C., 13.56 MHz
ON time 3 as a gate pulse to control the high frequency power of
Second, an amorphous silicon film 13 as an active layer having a thickness of 300 nm is formed by an intermittent discharge CVD method using a pulse train having an off time of 25 milliseconds, and an n-type doping layer 15 is formed to form source / drain regions. 5
A film is formed by the 0 nm plasma CVD method. Subsequently, the doping layer 15 and the amorphous silicon film 13 are patterned into a desired island shape. Further, source / drain electrodes 16 are formed by forming a film of chromium as a source / drain metal by a 70 nm sputtering method and patterning it into a desired shape. Finally, the thin film transistor is completed by etching away the doping layer 15 on the channel. Thus, claim 2
The structure of the thin film transistor element described in 1. is formed.

The thin film transistor thus formed has a field effect mobility of 0.45 cm ² / V / s and a threshold voltage of 3 V. These values are sufficiently applied as a switching element of a pixel for a liquid crystal display. It is possible.

FIG. 8 shows a second embodiment of the method of manufacturing a thin film transistor according to the second aspect. First, a gate electrode 11 is formed on a glass substrate 10 serving as an insulating substrate by depositing chromium as a gate metal by a sputtering method with a film thickness of 100 nm and patterning. A silicon nitride film 12, which is a gate insulating film, is formed thereon with a film thickness of 400 nm by a plasma CVD method. Continuously, silane flow rate 200SCCM, hydrogen flow rate 400SC
CM, gas pressure 120 Pa, substrate temperature 300 ° C., high-frequency power having an oscillation frequency of 100 MHz was used, and the amorphous silicon film 13 as an active layer was formed to a thickness of 100 by an intermittent discharge CVD method with a time of 300 ms and an off time of 15 ms.
Then, a silicon nitride film 14 which is a channel passivation film is formed by a 100 nm-thickness plasma CVD method. After patterning the silicon nitride film 14 into a desired shape, an n-type doped layer 15 having a film thickness of 50 nm is formed to form source / drain regions.
In this embodiment, the amorphous silicon film forming method of the present invention is used for forming the doping layer 15. The film forming conditions are: silane flow rate 50 SCCM, hydrogen-based 0.2% phosphine flow rate 20 SCCM, hydrogen flow rate 500 SCCM,
At a gas pressure of 120 Pa, a substrate temperature of 300 ° C., a on-time of 300 milliseconds as a gate pulse for controlling high frequency power,
The off time is 50 milliseconds, and the high frequency power at the time of on is 200 W. Subsequently, the doping layer 15 and the amorphous silicon film 13 are patterned into a desired island shape. Further, source / drain electrodes 16 are formed by forming a film of chromium as a source / drain metal by a 70 nm sputtering method and patterning it into a desired shape. Finally, the doping layer 15 between the source electrode 16 and the drain electrode 19 is removed by etching to complete the thin film transistor. In this way, the structure of the thin film transistor described in claim 2 could be easily implemented.

The electrical characteristics of the thin film transistor of this example were measured, and it was found that the field effect mobility was 0.7 cm ² / V.
/ S and a threshold voltage of 2.0 V are obtained, and these values are sufficiently applicable as a driving element for a liquid crystal display.

The on-time and the off-time can be easily realized within the range described in claim 1 by adjusting the pulse generator, and it is easy to form an amorphous silicon film to form a thin film transistor. .

Although the above embodiments have been described with respect to the inverted staggered type thin film transistor, it is apparent from the above description that the invention can be applied to a thin film transistor of other structure such as a forward staggered type or a coplanar type thin film transistor.

The gate insulating film can also be realized by a two-layer structure of an oxide film and a nitride film as shown in FIG. As the amorphous silicon active layer, as shown in FIG. 10, first, a high-quality amorphous silicon layer formed by low-speed film formation by normal continuous discharge is used, and then the amorphous silicon layer is formed by the intermittent discharge high-speed film formation method according to the present invention. As in the formation, a thin film transistor in which a part of the amorphous silicon layer is formed by the film forming method according to the first aspect of the present invention may be formed.

[0029]

As described above, according to the method of forming an amorphous silicon film using the intermittent discharge plasma CVD method with the ON time of 3 seconds or less and the OFF time of 15 milliseconds or more according to the present invention, the amorphous silicon film is formed. In comparison with the conventional intermittent discharge method, the amount of dust generated during high-speed film formation is 2 more
Decrease by an order of magnitude, improving the throughput of plasma CVD processes such as thin film transistor arrays for liquid crystal displays,
A large effect was confirmed in improving the yield.

[Brief description of drawings]

FIG. 1 is a waveform diagram showing an oscillation state of a gate pulse and high frequency power of the present invention.

FIG. 2 is a waveform diagram showing a gate pulse used in the first embodiment of the present invention.

FIG. 3 is a characteristic diagram showing the effect of the second embodiment of the present invention.

FIG. 4 is a characteristic diagram showing the effect of the third embodiment of the present invention.

FIG. 5 is a characteristic diagram showing the effect of the fourth embodiment of the present invention.

FIG. 6 is a characteristic diagram showing the effect of the fifth embodiment of the present invention.

FIG. 7 is a sectional structural view showing a thin film transistor according to an embodiment of the present invention.

FIG. 8 is a sectional structural view showing a thin film transistor according to an embodiment of the present invention.

FIG. 9 is a sectional structural view showing a thin film transistor according to an embodiment of the present invention.

FIG. 10 is a sectional structural view showing a thin film transistor according to an embodiment of the present invention.

[Explanation of symbols]

1 Discharge period of 13 seconds or less 2 Discharge period of 15 milliseconds or more 10 Glass substrate 11 Gate electrode 12 Silicon nitride film 13 Amorphous silicon film formed by the intermittent discharge method according to the present invention 14 Passivation silicon nitride film 15 Doping layer 16 Source Electrode 17 Oxide film 18 High quality amorphous silicon film formed by low speed film formation 19 Drain electrode

Claims (2)

[Claims] 1. A method for forming an amorphous silicon film, wherein an amorphous silicon film is deposited by intermittent discharge in which an ON state in which discharge is maintained by high frequency power and an OFF state in which discharge is stopped by cutting off high frequency power are repeated. A method for forming an amorphous silicon film, characterized in that the duration of the on-state is 3 seconds or less and the duration of the off-state is 15 milliseconds or more. 2. An amorphous silicon film formed by the film forming method according to claim 1, at least a channel active layer,
Alternatively, a thin film transistor element characterized by being used as part of a source / drain layer.