JPH07283765A - Method and device for two-wire power transmission/ reception communication - Google Patents

Abstract

PURPOSE:To provide a device which suppresses the generation of the power loss and the noises and can perform the power transmission/reception and the bidirectional communication of data by means of a two-wire power line. CONSTITUTION:A master station 1 switches the DC power Vcc alernately and with a fixed inverse delay time and generates the balanced impulsive power to supply it to each power line 3. This impulsive power varies its width by the transmission subject data. Thereafter the supply of power is temporarily stopped, to prepare for reception of data from a slave station 2. At the station 2, the accumulated power is fetched from a capacitor 23 to actuate a data processing part 24 when the supply of the balanced impulsive power is stopped from the station 1. Thus the balanced impulsive power (showing the transmission subject data) is generated based on the accumulated power and sent to the station 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-wire type power transmission / reception communication method for performing power transmission / reception and mutual communication using two power lines, and an apparatus for realizing this method.

[0002]

2. Description of the Related Art As a method of transmitting and receiving power and performing mutual communication using two power lines, a power transmission side device has hitherto been several hundreds of kHz.
The high-frequency signal of (1) is superimposed on the power line for power transmission, and the power receiving side device detects only the high-frequency signal through the high-frequency bandpass filter. This method is called a high frequency superposition method. In addition, the master station superimposes the phase-modulated pulse signal on the power line of the DC two wires and transmits the power, and the slave station side uses a pulse transformer or the like to separate the pulse signals. A method is also known in which DC power is transformed into a pulse shape by transmitting the power intermittently or by making a short circuit periodically.

[0003]

However, the high-frequency superposition method cannot solve the problems inherent in high-frequency signals, such as leakage and noise resistance. Therefore, in demodulation, a complicated circuit configuration and circuit parts with good characteristics must be used, and there is a problem that the cost is significantly increased. In addition, among the methods of transmitting power by superimposing a pulse signal on a power line of two DC lines, those that involve phase modulation have a limitation in terms of transmission speed because they require phase separation, and intermittently connect one side of the power line. The short-circuiting method or the short-circuiting method can simplify the circuit configuration, but has a drawback that noise is always involved. Moreover, in any case, there is a problem that many power receiving side devices cannot be used in consideration of transmission efficiency.

In view of the above problems, the present invention provides a two-wire power transmission / reception communication method capable of performing high-speed and high-noise intercommunication without leakage of transmitted power and using a plurality of power receiving side devices. The purpose is to provide. Another object of the present invention is to provide a two-wire power transmission / reception communication device that realizes the above method with a simple configuration.

[0005]

A two-wire type power transmission / reception communication method provided by the present invention is a method for performing power transmission / reception between devices connected via two power lines and mutual communication therewith, The power transmission side device initially feeds DC power and its inversion power to each power line, further delays the level on one power line after the level inversion on the other power line in accordance with predetermined pulse group data, and Forming balanced pulsed power by delaying and inverting the level on one power line after level reversal on the other power line, and temporarily stopping feeding of the balanced pulsed power after a lapse of a predetermined time from each power line. And a step of forming a power receiving state of the power receiving side device, wherein the power receiving side device converts the balanced pulsed power received from each power line into DC power and stores the DC power, and the power supply stoppage of the balanced pulsed power is triggered. The stored power and its inversion power are initially fed to each power line using the supplied power, and further the level on one power line is delayed and the level on the other power line is delayed and inverted in accordance with predetermined pulse group data. And delay-inverting the level on one power line after converting the level on the other power line to convert it to balanced pulsed power,
It is characterized by having.

In the above method, the power transmitting side device generates pulse group data including, for example, identification data of a specific power receiving side device and first transmission target data addressed to the power receiving side device, while the power receiving side device generates the pulse group data. The device, when detecting the identification data of its own device, generates pulse group data including the identification data and the second transmission target data addressed to the power transmission side device, and each of the balanced pulse data is based on these pulse group data. Form the electric power.

Further, in the two-wire type power transmission / reception communication device provided by the present invention, the power transmission side device is a power source for outputting a DC power of a predetermined level, identification data of the partner device, and a first device addressed to the partner device. A data processing unit that generates pulse group data including one transmission target data and performs necessary data processing, a transmission power control unit that controls conduction of the DC power to two power lines, and power reversal information of each power line. Is converted into logical information and is guided to the data processing unit. An external power output terminal can also be provided. In this configuration, the transmission power control means initially feeds the DC power and the power of its inversion level to the one power line and the other power line, respectively, and further on the one power line according to the pulse group data generated by the data processing unit. After the level is inverted, the level on the other power line is delayed and inverted, and after the level on the other power line is inverted, the level on one of the power lines is delayed and inverted to form balanced pulsed power. The power supply of the balanced pulsed power is temporarily stopped.

In the two-wire type power transmission / reception communication device provided by the present invention, the power receiving side device is a rectifier for converting the balanced pulsed power received from the two power lines into a DC power, and the rectified DC power. A storage battery that stores electricity, a reception buffer circuit that converts power reversal information of balanced pulsed power on a power line into logical information, and pulse group data including second transmission target data addressed to a partner device and the reception buffer. And a power receiving side power control means for fetching stored power from a battery and controlling power supply to each power line when the identification data of the device itself and the power reception stop data are detected from the logic information converted by the circuit. In this configuration, the power receiving side power control means initially feeds the stored power and the power of its inversion level to one of the power lines and the other of the power lines, respectively, and after inversion of the level on one of the power lines according to the pulse group data, The level on the power line is delayed and inverted, and after the level on the other power line is inverted, the level on one power line is delayed and inverted to form balanced pulsed power.

This power receiving side device has level setting means for detecting the level on the power line at the start of activation and setting the initial output level of the reception buffer circuit to either logical High or logical Low in a unified manner. The configuration may be provided.

[0010]

In the present invention, first, the power transmission side device initially feeds DC power and its inverted power to each power line. Further, according to the predetermined pulse group data generated by the data processing unit, for example, the pulse group data including the identification data of the partner device and the first transmission target data addressed to the partner device, the power transmission power control means sets one power After level inversion on the line, the level on the other power line is delayed and inverted, and after level inversion on the other power line, the level on one power line is delayed and inverted to form balanced pulsed power. Then, after a lapse of a predetermined time, the transmission power control means temporarily stops the supply of the balanced pulsed power to form a power receiving state from each power line, and waits for the power supply (data transmission) from the power receiving side device.

On the other hand, in the power receiving side device, the balanced pulsed power received from each power line is converted into DC power by the rectifier and stored in the battery. Also, the power reversal information of the balanced pulsed power on the power line is converted into logical information by the reception buffer circuit and is guided to the power reception side power control means. The power receiving side power control means generates pulse group data including the identification data of the own device and the second transmission target data addressed to the other device, and at the same time, the identification data of the own device and the stop of power reception from the logical information sent from the reception buffer circuit. When the data and are detected, the stored electric power is taken in from the electric storage device to control the power supply to each electric power line. At that time, the stored stored power and the inverted power thereof are initially fed to each power line, and further, the level on one power line is delayed and the level on the other power line is delayed and inverted according to predetermined pulse group data, and the other power line is delayed. After level inversion on the power line, the level on one power line is delayed and inverted to form balanced pulsed power.

In the configuration in which the power receiving side device is provided with the level setting means, the initial output level of the reception buffer circuit is logical high or logical low regardless of the power level on the power line at the start of activation. Information (signal) of the logical level that is set uniformly in either one
Is guided to the receiving side power control means. This eliminates the need for the power receiving side device to be aware of the level state of the transmitted / received data.

[0013]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a configuration diagram of a two-wire type power transmission / reception communication system according to an embodiment of the present invention.
An example in which a master station 1) and a plurality of power receiving side devices (hereinafter, slave stations) are connected by two power lines (hereinafter, bus) 3 will be described. Since the slave stations 2 have the same configuration, only one is illustrated.

The master station 1 has a power source (not shown) for outputting DC power (voltage value) Vcc, a switch group 11 for restricting conduction between the DC power Vcc and the bus 3, and opening / closing control of these switch groups 11. And a power processing circuit 13 for generating pulse group data including identification data of the slave station 2 and instruction data (first transmission target data) addressed to the slave station 2 and performing necessary data processing. And the power reversal information of the bus 3 is converted into logical information, which is then processed by the data processing unit 13
And a reception buffer circuit 14 for leading to The data processing unit 13 also transfers information with external devices via an external input / output terminal (not shown). The switch group 11 and the power control circuit 12 constitute power transmission side power control means.

The slave station 2 also has a bridge rectifier 21 for converting the electric power received from the bus 3 into DC power (voltage),
A voltage comparison circuit 22 for determining whether or not the rectified voltage is a predetermined voltage value Vdd (<Vcc) or more, and an electrolytic capacitor (condenser) that stores electricity when the rectified voltage is Vdd or more.
23, an external power input / output terminal (not shown), and a reception buffer circuit 25 for converting the level inversion information of the power on the bus 3 into logical information composed of a combination of logic 1 and logic 0.
And a polarity setting circuit 26 that determines the power level on the bus 3 from the converted logic information and uniformly sets the initial logic level to logic 1 (or logic 0), identification data of the own station, and the master station. The data processing section 24 generates pulse group data including reply data (second transmission target data) addressed to 1 and performs necessary data processing.

The data processing unit 24 also includes a known data comparison processing unit (not shown) for detecting the identification data of the own station and the power reception stop data from the logical information converted by the reception buffer circuit 25, and each of the above-mentioned data processing units. It also has a control unit (not shown) that receives electric power from the electrolytic capacitor 23 when data is detected and generates a power supply control signal for the bus 3.

The slave station 2 further has a transmission buffer circuit 27 that controls the actual power feeding to the bus 3 based on the power feeding control signal and the output signal of the polarity setting circuit 26, and this transmission buffer circuit 27. The data processing unit 24 constitutes a power receiving side power control means. The reception buffer circuit 1
4, 25 and the transmission buffer circuit 27 can use, for example, a well-known RS485 interface circuit or RS422 interface circuit according to the network to be constructed.

The electric power rectified by the slave station 2 is guided to an external device, for example, a lamp via an external input / output terminal (not shown), and can be used for lighting the external device. Further, the lamp lighting control and the like can be performed based on the signal output from the data processing unit 24, and a monitoring signal of an external device or the like can be input to the data processing unit 24 and transmitted to the master station 1. it can.

FIG. 2 is a flow chart showing a processing procedure of the data processing unit 13 in the master station 1 having the above-mentioned configuration, and the power transmission start processing (S22) and the transmission CPU are triggered by the power ON reset (step (hereinafter, S) 21). Is initialized (S23), and data is transmitted to the power control circuit 12 (S23).
24). This transmission data is a data group including the above-mentioned slave station identification data and instruction data. After transmitting the data, the bus is set to high impedance and waits for a response (S25).
Specifically, the high impedance control is performed by the switch group 1
1 is fully opened to cut off the power supply of the DC power Vcc. In this state, the data from the slave station 2 is received from the reception buffer circuit 14 (S26), and after the reception is completed,
Power transmission is started again (S27). After that, this process is repeated.

FIG. 3 is a flow chart showing a processing procedure in the data processing unit 24 on the side of the slave station 2. Here, an example of a slave station that has received a data transmission instruction from the master station 1 is shown. First, power reception is started and power ON is reset (S3
1). Then, the CPU is initialized and the polarity is determined based on the output of the polarity setting circuit 26 (S32). After that, the power supply from the master station 1 and the accompanying data reception are performed (S33). When the stop of power reception is detected (S34), the electric power stored in the electrolytic capacitor 23 is taken in, and data transmission is performed based on this (S35). Specifically, the data transmission is performed by transmitting the stored power to the master station 1. This will be described later. After the data is transmitted, the power reception from the master station 1 is restarted (S36), and thereafter, the processing from S33 is repeated.

FIG. 4 shows how data is actually transmitted and received.
In this figure, (a) shows how power is transmitted from the master station 1 to the slave station 2 and instruction data is transmitted, and (b) shows how reply data is transmitted from the slave station 2 to the master station 1.

As shown in the figure, in this embodiment, the pulse group data on the side of the master station 1 is composed of a header, a designated address for defining a communication partner, instruction data, and a delimiter in this order, while the pulse group on the side of the slave station 2 is arranged. Data is constructed in the order of header, own station address, reply data, and delimiter, and ON / OFF control of DC power is performed according to these pulse group data. The format of these pulse group data depends on each data processing unit 1
3 and 24, which are stored in advance, are also provided with decoding means for decoding them when necessary and for decoding them when received from the partner station. Note that FIG. 4B is an example in which reply data is transmitted from the slave station (# 1) 2 to the master station 1, and other slave stations # 2 to #n are in a standby state. This is because the designated address from the station 1 designated the slave station (# 1) 2.

Next, processing up to polarity determination in each slave station 2 will be described with reference to FIG. In this figure, D,
E, F2, J, and K indicate power levels or logic levels in the corresponding parts of FIG. 1, and (a) shows an example of operation timing when the bus level at startup is logic 1 (High). At this time, since the F2 point and the J point have already become logic 1 at the time of power-on reset on the slave station side, the polarity setting circuit 26 sends this to the data processing section 24 as it is. Further, since the polarity is not changed, the logic level at point K remains unchanged. Here, the polarity means the difference between the levels of logic 1 and logic 0 for convenience.

On the other hand, (b) is an example of the operation timing when the bus level at the time of activation is logic 0 (Low). At this time, the polarity immediately after the reset is the reverse polarity, so the polarity setting circuit 26 is , The polarity of the subsequent data is inverted and sent to the data processing unit 24. At this time, since the polarity is changed, the logic level at the point K is also inverted at the same time. By thus providing the polarity setting circuit 26, the slave station 2 can perform bidirectional communication without being aware of the polarity of the data.

Next, the operation of each unit and the change in the data or power waveform at that time when power transmission / reception and bidirectional data transmission / reception are actually performed will be described with reference to FIG. In FIG. 6, A to I indicate data or power levels of the relevant part in FIG.

First, the data processing unit 13 of the master station 1 sends transmission data to the power control circuit 12 (point A). The power control circuit 12 controls opening / closing of the switch group 11 to supply balanced pulsed power to the bus 3 (B1, B2, C1 ,.
C2 point). At this time, as shown in the figure, after inverting the level on one bus, the level on the other bus is delayed by t to invert it, and after inverting the level on the other bus, the level on one power line is delayed by t. Invert. As a result, the power waveforms at points D and E, which represent the transmission data, become balanced pulses as shown in the figure, and moreover, there is a time interval of t at the time of power inversion, so that short circuit is prevented and harmonics are generated. Suppressed. This suppresses the generation of noise. When one cycle of data transmission from the data processing unit 13 is completed, the power control circuit 12 temporarily fully opens the switch group 11 to form a high impedance state, and waits for power supply (data transmission) from the slave station 2.

On the other hand, when the data processing unit 24 of the slave station 2 detects the delimiter (data transmission end code) from the master station 1 or when the voltage comparison circuit 22 detects the power reduction of the bus 3, the electrolysis is performed. The stored power of the peak value Vdd stored in the capacitor 23 is used to generate a power waveform based on pulse group data including reply data, and the power waveform is guided to the transmission buffer circuit 27 via the polarity setting circuit 26. At the same time, a control signal is sent to the transmission buffer circuit 27 to activate the transmission buffer circuit 27, and the balanced pulsed electric power as shown in the drawing is transmitted to the bus 3. The generation process of the balanced pulsed power is almost the same as that of the master station 1, but in the present embodiment, this is performed in the data processing unit 24. The data processing unit 24 is aware of the polarity on the bus at the start of activation, and data transmission is performed based on this polarity.

Outputs (F1 and F2 points) of the reception buffer circuits 14 and 25, an output (point G) of the voltage comparison circuit 22, an input (point H) and a gate input of the transmission buffer circuit 27 during the series of data transmission and reception. The waveform at (point I) is as shown in the lower part of FIG.

As described above, according to the present embodiment, the power transmission / reception and the mutual communication of the data between the master station 1 and the slave station 2 can be performed only by the two buses 3, so that the wiring work is simplified. . Further, since the slave station 2 to be the communication partner can be specified by designating the address from the master station 1, the number of slave stations 2 can be easily increased, and further, power transmission and communication are performed through the balanced pulsed power. Therefore, power loss is avoided and noise generation is suppressed. Moreover, since it is not necessary to provide a dedicated circuit for demodulation, the communication speed is significantly increased as compared with the conventional one. Therefore, it is possible to realize an epoch-making inexpensive network, and there is an advantage that the application is expanded.

Although the present embodiment is as described above, it is needless to say that the present invention is not limited to the configuration of the above embodiment and that design changes can be made without departing from the scope of the invention.

[0031]

As is apparent from the above description, according to the present invention, balanced pulsed power is used for power transmission and data communication. This has the effect of suppressing noise generation during communication. Moreover, this effect can be realized with a simple device configuration, which is significantly advantageous in terms of cost.

In particular, according to the two-wire type power transmission / reception communication device of the present invention, regardless of the power state of the power transmission side device or the power reception side device connected to the power line, power transmission / reception and bidirectional communication are always performed at a uniform level. Since communication is possible, versatility is high, and remote control of devices that use all electric power and bidirectional digital communication are also possible, and an epoch-making inexpensive network can be constructed.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a power transmission / reception communication system according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a processing procedure of a master station side data processing unit according to the present embodiment.

FIG. 3 is a flowchart showing a processing procedure of a slave station side data processing unit according to the present embodiment.

FIG. 4 is an explanatory diagram of actual data transmission / reception, in which (a) shows power transmission from the master station to the slave station and transmission of instruction data, and (b) shows how reply data is transmitted from the slave station to the master station. Show.

FIG. 5 is an explanatory diagram of an example of processing timing up to polarity determination in each slave station, in which (a) shows that the bus level at start-up is logical 1;
An example of operation timing when (High) is shown, and (b) shows an example of operation timing when the bus level at the time of activation is logic 0 (Low).

FIG. 6 is an explanatory diagram of an operation of each unit in the case of actually transmitting power and transmitting / receiving data, and a change in data or power waveform at that time.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 master station (power transmission side device) 11 switch group 12 power control circuit 13 data processing unit 14 reception buffer circuit 2 slave station (power reception side device) 21 bridge rectifier 22 voltage comparison circuit 23 electrolytic capacitor (electric storage device) 24 data processing unit 25 reception Buffer circuit 26 Polarity setting circuit 27 Transmission buffer circuit 3 Two-wire bus (power line)

Claims (5)

[Claims] 1. A method of transmitting and receiving power between devices connected via two power lines and performing intercommunication therewith, wherein a power transmitting side device supplies DC power and its inverted power to each power line. Is initially fed, and then the level on one power line is delayed and inverted after the level on one power line is inverted and the level on one power line is delayed and inverted after the level is inverted on the other power line according to the predetermined pulse group data. And forming a balanced pulsed power, and temporarily stopping feeding of the balanced pulsed power after a lapse of a predetermined time to form a power receiving state from each power line, the power receiving side device, Converting the balanced pulsed power received from each power line to DC power for storage, and using the stored power as a trigger for stopping the power supply of the balanced pulsed power, and the stored power and its inverted power. Each power line is initially fed, and the level on one power line is delayed after the level inversion on one power line according to the predetermined pulse group data, and the level on one power line is changed after the level inversion on the other power line. A two-wire power transmission / reception communication method, comprising the step of: delaying and inverting and converting to balanced pulsed power. 2. The two-wire power transmission / reception communication method according to claim 1, wherein the power transmission side device includes a pulse including identification data of a specific power reception side device and first transmission target data addressed to the power reception side device. Group data is generated, on the other hand, the power receiving side device generates pulse group data including the identification data and the second transmission target data addressed to the power transmitting side device when detecting the identification data of its own device, A two-wire type power transmission / reception communication method, characterized in that the balanced pulsed power is formed in accordance with these pulse group data. 3. A power supply for transmitting and receiving power to and from at least one other party device connected via two power lines and mutual communication accompanied therewith, and a power supply for outputting DC power of a predetermined level, A data processing unit that generates pulse group data including identification data of the partner device and first transmission target data addressed to the partner device and performs necessary data processing, and conduction control of the DC power to the power line. And a reception buffer circuit that converts the power reversal information of the power line into logical information and guides it to the data processing unit. The transmission power control unit includes one power line and the other power line. The DC power and the power of its inversion level are initially fed to each of them, and the level of one power line is inverted after the other of the other power lines according to the pulse group data generated by the data processing unit. The level on the power line is delayed and inverted, and after the level on the other power line is inverted, the level on one power line is delayed and inverted to form balanced pulsed power, and after a predetermined time has passed, the balanced pulsed power is fed. A two-wire type power transmission / reception communication device, which is configured to temporarily stop the power transmission. 4. A device for transmitting and receiving power to and from a partner device connected via two power lines and intercommunication associated therewith, wherein the balanced pulsed power received from the power line is converted to DC power. Rectifier, a capacitor for storing rectified DC power, a reception buffer circuit for converting power reversal information of the balanced pulsed power into logic information, and pulse group data including second transmission target data addressed to the partner device Power control on the power receiving side, which generates electric power and controls the power supply to each of the power lines by capturing the stored power from the storage device when the identification data of the own device and the power reception stop data are detected from the logical information converted by the reception buffer circuit. The power receiving-side power control means initially feeds the stored power and the power at its inversion level to one power line and the other power line, respectively. Based on the group data, the level on one power line is delayed and the level on the other power line is delayed and the level on one power line is delayed and the level on one power line is delayed and inverted to form balanced pulsed power. A two-wire power transmission / reception communication device having the above structure. 5. The two-wire power transmission / reception communication device according to claim 4, further comprising detecting a level on the power line at the start of activation to set an initial output level of the reception buffer circuit to either a logic high or a logic low. A two-wire power transmission / reception communication device, characterized by comprising level setting means for uniformly setting one of the two.