JPH07262376A - Color image processor - Google Patents

Abstract

PURPOSE:To more exactly detect a specified image by totally judging whether an input color image is the specified image or not in the prescribed area of the input image. CONSTITUTION:Concerning the respective color components (RGB) of input image data, they are compared with the information of the respective color components of the specified image stored in respective R, G and B channel deciding ROM 602, 605 and 608 by comparator circuits 601, 604 and 607 for respective color channels. The compared result is weighted by a weight coefficient block 502. Concerning the specified address (specified range) of the input image, whether that input image is the specified image or not is decided by a deciding and identifying signal block 504 and a deciding flag generating circuit 504 while using the weighted compared result.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color image processing apparatus, and more particularly to a color image processing apparatus for discriminating a specific image from input image data.

[0002]

2. Description of the Related Art With the recent development of color copying machines and color printers, the image reproducibility of read or input data of color image originals has been remarkably improved.
Therefore, a technique for preventing forgery of bills, securities, etc. using such a device is required. As one of the technologies, the shape and a part of the data of a specific document are registered in advance in the memory of a copying machine, etc., and during the copying operation, this data and the data of the read image document are compared and collated, and the specific image is displayed. Techniques for discriminating are widely known.

[0003]

However, in the above-mentioned conventional example, there is a problem that if an image having the same shape as the specific image is input, it may be erroneously determined. further,
There is also a problem that if the part is missing from the input image because the comparison determination is performed with a part of the data of the specific image, the correct comparison determination cannot be performed.

The present invention has been made in view of the above-mentioned conventional example, and an object of the present invention is to provide a color image processing apparatus capable of determining a specific image such as a bill or securities with higher accuracy.

[0005]

In order to achieve the above object, the color image processing apparatus of the present invention has the following configuration. That is, first storage means for storing information of a specific image for each color component, first input means for inputting color image data, each color component of the color image data and the specific image stored in the storage means. Using the comparison means for comparing information of color components, the weighting means for weighting the comparison result by the comparison means according to the comparison result, and the comparison result weighted by the weighting means, the input color A color image processing device, comprising: a determining unit that comprehensively determines whether or not the input color image data is the specific image over a predetermined area represented by the image data.

[0006]

According to the present invention having the above-described structure, the comparison result obtained by comparing each color component of the input color image data with the information of the specific image color component is weighted, and the weighted comparison result is used. , Is operable to comprehensively determine whether the input color image is a specific image over a predetermined area of the input image.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

In the embodiment, a color printer device is used as an application example of the present invention, but it is needless to say that the present invention is not limited to this and can be applied to various other devices such as a copying machine. Further, in the following description, banknotes, securities, gift certificates, etc. will be referred to as specific images.

[Outline of Apparatus Configuration (FIGS. 1 and 2)] FIG. 1 is a side view showing a schematic configuration of a color printer apparatus as a typical embodiment of the present invention. In FIG. 1, an interface unit 201 is a unit for inputting digital image data (RGB signals) generated by a host computer or by reading an image original with a scanner (not shown) or the like. Reference numeral 202 denotes a casing of the apparatus, which accommodates a printer engine that prints out an image corresponding to data input from the interface unit 201 in full color.

RG input to the interface unit 201
The B signal is converted by the data processing unit 203 into density signals of magenta (M), cyan (C), yellow (Y), and black (Bk), and sent to the laser driver 204.
The laser driver 204 modulates and drives the semiconductor laser 205 according to the density signal. The laser light emitted from the semiconductor laser 205 is the polygon mirror 206 and the f-θ lens 2
07, the photosensitive drum 209 is scanned through the mirror 208 to form an electrostatic latent image.

Reference numeral 210 denotes a rotary developing device, which is magenta (M).
A developing unit 211, a cyan (C) developing unit 212, a yellow (Y) developing unit 213, and a black (Bk) developing unit 214 are formed, and four developing units alternately contact the photosensitive drum 209 and are formed on the photosensitive drum 209. The formed electrostatic latent image is developed with toner. A transfer drum 215 winds the paper fed from the paper cassette 216 around the transfer drum 215 and transfers the image developed on the photosensitive drum 209 to the paper.

In this way, after the four colors of M, C, Y and Bk are sequentially transferred, the sheet on which the image is transferred is transferred to the fixing unit 219 by the conveyor belt 217 rotating by the conveyor roller 218. Then, the transferred image is fixed, and finally the paper is discharged to the paper discharge tray 220.

FIG. 2 is a block diagram showing a detailed structure of the data processing unit 203. In FIG. 2, CLK is a clock signal for transferring pixels, and HSYNC is a horizontal synchronizing signal which is a synchronizing signal for starting main scanning. Here, the main scanning direction is a direction in which the laser beam scans the photosensitive drum 209. As shown in FIG. 2, the data processing unit 2
03 is a control unit 301, a specific image determination unit 401,
It is composed of a signal processing unit 403. The control unit 301 includes a CPU for controlling the entire apparatus, a ROM for storing a control program, and an RA serving as a work area for the control program.
M, a horizontal synchronizing signal circuit for generating a horizontal synchronizing signal (HSYNC). The specific image determination unit 401 determines whether or not the registered specific image is included based on the image signal (RGB) from the interface unit 201, and notifies the control unit 301 of the result by the determination flag 402.

The determination flag 402 is a specific image determination unit 40.
This is a determination signal output from 1, and its value is set to "1 (high)" at the start of image input, and is set to "0 (low)" when it is determined to be a specific image. Based on the input value of the determination flag 402, the control unit performs control such that when the value is “0”, normal printing operation is performed, and when the value is “1”, printing is not performed.

Further, the signal processing unit 403 converts the input RGB signal into a density signal (YMCBk).

[Detailed Description of Specific Image Determining Section (see FIG. 3
~ FIG. 10)] FIG. 3 is a block diagram showing a configuration of the specific image determination unit 401. The specific image determination unit 401 compares the input image signal (RGB) with the specific image data and outputs the result as an error signal (E) and a determination permission signal (P). ) And the determination permission signal (P) are weighted, and the result is output as the determination identification signal (C).
02, determination identification signal detection block 503, determination flag 4
02, a determination flag generation circuit 504, and an address / timing generation block 505 that generates an address signal and a timing signal based on a clock signal (CLK) and a horizontal synchronization signal (HSYNC). An address signal 506 is supplied from the address / timing generation block 505 to the comparison block 501, the determination identification signal detection block 503, and the determination flag generation circuit 504.

The detailed structure of each block is shown in FIG.
And the comparison block 501 corresponds to the weighting factor block 50 in FIG.
2, the decision identification signal detection block 503 and the decision flag generation circuit 504 in FIG. 7, and the address / address in FIG.
Timing generation block 505 is shown.

FIG. 4 is a block diagram showing a detailed structure of the comparison block 501. In FIG. 4, all the red (R), green (G), and blue (B) image data, which are full-color information input from the interface unit 201, are all 8-bit digital signals. The R signal is a latch (R) circuit 616, the G signal is a latch (G) circuit 617,
The B signal is input to the latch (B) circuit 618, and latch circuits 616 to 61 are supplied until the comparison and determination with the specific image is completed.
Reference numeral 8 holds image data of each color component. Latch circuit 6
The latch timings 16 to 618 are latch clocks (CL) generated by the address / timing generation block 505.
K) signal.

Since each color component (RGB signal) performs the same signal processing, only the R signal will be described below.

The output of the latch (R) circuit 616 is input to the comparison (R) circuit 601 and the registration data (stored in the R channel determination ROM 602 designated by the address signal generated in the address / timing generation block 505). R) 619 is compared. Then, the difference data between the R component of the input image data and the registration data (R) 619 is output to the difference error amount detection (R) circuit 603. In the difference error amount detection (R) circuit 603, the reference value (Qr) 623 output from the reference value generation circuit 622.
And the absolute value (D _AB ) of the difference data are compared, and D _AB ≧ Qr
If so, a low level “0” signal is output to the OR circuit 624. That is, the image data (R) is the registration data (R) 619 stored in the R channel determination ROM 602.
If it is, the determination permission signal (P) 625 is output as a low level “0” (this is the determination stop).

On the other hand, if D _AB <Qr, the OR circuit 62
A high level "1" signal is output for 4 and an absolute value (D _AB ) is generated as a differential error signal ( _er ) 612.

The same signal processing is performed on the G signal and the B signal, and the determination permission signal (P) 625 is output as a low level "0", or the difference error signal (e) is output.
_g ) 613 and the difference error signal (e _b ) 614 are obtained.

The above difference error signals 612 to 614 are added by the adder 610, and the total amount is added to the error signal (E).
Output as 615.

FIG. 5 is a block diagram showing the detailed structure of the weight coefficient block 502.

The weighting coefficient block 502 is mainly composed of a coincidence coefficient weighting table ROM 701, and an enable signal 706 generated by an address / timing generation block 505, which will be described in detail later, using an error signal (E) 615 as an address input of the table ROM 701. Is enabled and the determination permission signal (P) 625 is “1 (high level)”, the OE (out enable / low active) terminal of the table ROM 701 is set to “0 (low level)”. A determination identification signal (C) 704 is output as data output from the table ROM 701.

FIG. 6 is a diagram showing a data map of the matching coefficient weighting table ROM 701 of this embodiment. For example, if the error signal (E) 615 is a 1-bit data signal, the memory address of the ROM 701 is specified by using it as an address, the upper (1−k) bits as a row address, and the lower k bits as a column address. Read the value corresponding to the address. In FIG. 6, α, β, and γ shown at each address of the memory are, for example, integer values other than “0”.

FIG. 7 is a block diagram showing a detailed configuration of the judgment identification signal detection block 503 and the judgment flag generation circuit 504.

The decision identification signal detection block 503 uses the decision identification signal (C) 704 and the address signal 506 to make a decision ROM 602 for each of the R, G, and B channels.
All addresses 605 and 608 or part of them (r
Only when the cumulative value of the determination identification signal (C) 704 regarding the number of individual pieces) reaches a predetermined threshold value, the determination flag 402 is output to notify the control unit 301 that the image input to the apparatus is the specific image.

The specific image detection process will be described below with reference to the concept of the specific image determination process shown in FIG. 8 and the flowchart shown in FIG.

FIG. 8 is a diagram conceptually showing the processing performed by the determination circuit 807 with the discrimination area x on the horizontal axis and the discrimination amount y on the vertical axis. FIG. 8 shows a state at the time when the determination process is executed a certain number of times. Here, n × m or r
The input image data is regarded as the specific image when the entire xm region is filled with the bars. Here, the value related to the identification area x is specified by the address signal 506, and the identification amount y is obtained by accumulating the determination identification signal (C) 704 shown below.

First, in step S10, the data value of the determination identification signal (C) 704 is set as the identification amount y, and the address signal 506 corresponding to the data value is mapped by the identification amount y mapping circuit 801. In step S20, the mapping data 811 output from the circuit 801 is added to the subsequent data of the same address by the discrimination amount y accumulating circuit 802, and the addition result (AC) is fed back to the discrimination amount y mapping circuit 801 again. To store. Then, in step S30, the discrimination amount y detection circuit 8
In 03, the addition result (AC) is compared with the discrimination amount y threshold value (m).

If AC ≧ m, the process proceeds to step S40, and the address signal 506 at that time is mapped by the identification area x mapping circuit 804. That is,
It maps which address exceeds the identification amount y threshold value (m). Then, the process is step S
Go to 50. On the other hand, if AC <m, the process returns to step S10 to continue the input of the determination identification signal (C) 704 and the mapping of the identification amount y.

In step S50, the discriminating amount x threshold (r) 806 is used in the discriminating region x detection circuit 805 to set the discriminating amount y threshold (m) for all the addresses in the range designated by r as shown in FIG. Check whether it is beyond the limit. Here, when the identification amount y threshold (m) is exceeded at the address indicated by the region x threshold (r) 806 or all the addresses, a detection signal indicating that is output to the determination circuit 807, and the process is step S60. Proceed to. On the contrary,
If all the addresses indicated by the region x threshold (r) 806 have not exceeded the identification amount y threshold (m), the process proceeds to step S70.

When the detection signal is input to the determination circuit 807, the process controls the determination flag generation circuit 808 to output the determination flag 402 in step S60. On the other hand, when the process proceeds to step S70, the determination circuit 807 determines whether to continue the determination process thereafter. If the input image data is continuously input or the comparison result data with the data representing the specific image is continuously input and the determination process can be continued, the process returns to step S10. On the other hand, when the input image data or the comparison result data is no longer input and the determination process cannot be continued, the process proceeds to step S80.

Then, in step S80, the determination circuit 80
Reference numeral 7 controls the determination completion flag generation circuit 809 to determine that the input image data is not a specific image because the identification amount y or the identification region x does not reach the threshold value after the input is completed, and outputs the determination completion flag. The determination completion flag is output to the control unit 301 as the determination flag 402.

FIG. 10 is a block diagram showing a detailed structure of the address / timing generation block 505. Also,
FIG. 11 is a timing chart showing the operation.

CLK is a synchronizing signal with the image data output from the interface unit 201, and HSYNC is a horizontal synchronizing signal output from the control unit 301. In this embodiment, the image data is divided into N blocks in order to execute the identification process of the specific image in real time. Therefore, C
The LK input is frequency-divided by the N frequency dividing circuit 1001, and the frequency-divided CLK (N frequency dividing clock 1009) is latched by the CLK generation circuit 1002 and the address load CLK generation circuit 1003.
To enter. The latch CLK generation circuit 1002 generates a latch CLK for holding image data at the rising edge of the latch CLK and outputs it to each of the latch circuits 616 to 618 of the comparison block 501.

On the other hand, the address load CLK generation circuit 10
In 03, the determination RO of each R, G, and B channel shown in FIG.
Load C for the number of addresses of M602, 605, 608
Generate LK1005. This is for image data
Judgment ROMs 602, 605, 60 which are generated for the purpose of making a comparison judgment with all the registered data in each judgment ROM 602, 605, 608 and have an n-bit address.
8 outputs 2 ⁿ address load CLK to the load terminal of the address counter 1007.

Address start data generation circuit 100
Reference numeral 4 denotes determination ROMs 602, 605, and 608 shown in FIG. 4 when the specific image identification processing is started at the start of main scanning of the present apparatus.
Data 1 to increase the start address of each one
In the circuit that generates 006, the content of the load data 1006 is incremented each time HSYNC is input and the result is input to the data terminal of the address counter 1007. This is generated for the purpose of comparing many types of registration data in the determination ROMs 602, 605, and 608 with image data.

The address counter 1007 is a load CL
By inputting K1005, the load data 1006 is fetched and counted up by the N frequency division CLK1009. The address data is used as the address signal 506 for the determination ROMs 602, 605, 6 of the R, G, B channels.
At the same time as input to
03 and the determination flag generation circuit 504.

On the other hand, when the judgment flag (including the judgment completion flag) 402 is input, the reset generation circuit 1010 outputs the reset signal 1011 triggered by this, and the address load CLK generation circuit 1003 and the address start data generation circuit 1004. Are initialized respectively. Further, the enable generation circuit 1012 uses the coincidence coefficient weighting table R
The enable signal 706 for generating the OE (output enable) signal of the OM 701 is generated.

Therefore, according to this embodiment, the comparison with the information of the specific image is performed for each color component, the comparison results for each color component are integrated, and further, the overall comparison result is weighted with respect to the address of the image. Since the determination is made as to whether or not the input image is the specific image, the specific image can be correctly determined even if a part of the input image data is missing.

Although the present embodiment has been described by taking as an example a device having a configuration for making a judgment only on a specific image registered in the ROM in advance, the present invention is not limited to this. For example, as shown in FIG. 12, the external image scanner 904 is connected to the specific image determination unit 401, and the device is configured so that the device user can input a desired image and use it as the specific image. May be.

In this case, the judgment image forming circuit 901 generates an image for judging the specific image based on the image inputted by the apparatus user from the image scanner 904, and the generated image is registered in the battery built-in RAM 903. In the actual determination process of the specific image, the determination ROMs 602, 605, 608 are used.
When the comparison process based on (3) is completed, the switching circuit 903 switches the switch based on the timing signal from the address / timing generation block 505 so as to input the registered image signal 905 from the RAM 903 with built-in battery to the comparison block 501. This causes comparison block 5
01 makes it possible to compare the registered image with the input image.

Further, the means for the user of the above-mentioned device to input an image is not limited to the image scanner.
It goes without saying that various input mechanisms such as a data input mechanism from another copying machine, a data input interface from a host computer, a data communication interface from a LAN or a communication line can be used.

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of one device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus.

[0047]

As described above, according to the present invention, the comparison result obtained by comparing each color component of the input color image data with the information of the specific image color component is weighted and weighted. The comparison result is used to comprehensively judge whether or not the input color image is the specific image over the predetermined area of the input image, so that the specific image can be more accurately identified even if a part of the input image is missing. The effect is that you can.

[Brief description of drawings]

FIG. 1 is a side sectional view showing a configuration of a color printer apparatus which is a typical embodiment of the present invention.

FIG. 2 is a block diagram showing a detailed configuration of a data processing unit 203.

FIG. 3 is a block diagram showing a detailed configuration of a specific image determination unit 401.

FIG. 4 is a block diagram showing a detailed configuration of a comparison block 501.

5 is a block diagram showing a detailed configuration of a weight coefficient block 502. FIG.

FIG. 6 is a diagram showing a data map of a matching coefficient weighting table ROM 701.

7 is a block diagram showing a detailed configuration of a determination identification signal detection block 503 and a determination flag generation circuit 504. FIG.

FIG. 8 is a histogram of discrimination area x-discrimination amount y.

FIG. 9 is a flowchart showing a specific image detection process.

FIG. 10 is a block diagram showing a detailed configuration of an address / timing generation block 505.

FIG. 11 is a timing chart showing the operation of the address / timing generation block 505.

FIG. 12 is a block diagram showing a detailed configuration of a specific image determination unit 401 according to another embodiment.

[Explanation of symbols]

201 ... Interface unit, 202 ... Color printer device casing, 203 ... Data processing unit, 204 ... Laser driver, 205 ... Semiconductor laser, 206 ... Polygon mirror, 207 ... f-.theta. Lens, 208 ... Mirror, 209 ...
Photosensitive drum, 210 ... Rotating developing device, 211 ... Magenta developing device, 212 ... Cyan developing device, 213 ... Yellow developing device,
214 ... Black developing device, 215 ... Transfer drum, 216
... Paper cassette, 217 ... Fixing unit, 301 ... Control section, 302-304 ... Input color signal, 401 ... Specific image determination section, 402 ... Judgment flag signal, 403 ... Signal processing section, 501 ... Comparison block, 502 ... Weighting coefficient Block, 503 ... Judgment identification signal detection block, 504 ... Judgment flag generation circuit, 505 ... Address / timing generation block, 506 ... Address / timing signal, 601 ...
Comparison (R) circuit, 602 ... R channel determination ROM, 60
3 ... Difference error amount detection (R) circuit, 604 ... Comparison (G)
Circuit, 605 ... G channel judgment ROM, 606 ... Difference error amount detection (G) circuit, 607 ... Comparison (B) circuit, 60
8 ... B channel determination ROM, 609 ... Difference error amount detection (B) circuit, 610 ... Adder, 612-614 ... Difference error signal, 615 ... Error signal (E), 616-618
... Latch circuit, 619 to 621 ... Registration data signal, 62
2 ... Reference value (Qr) generation circuit, 623 ... Reference value (Qr)
Signal, 624 ... OR circuit, 625 ... Judgment permission signal, 70
1 ... Matching coefficient weighting table ROM, 702 ... NOT
Circuit, 703 ... NAND circuit, 704 ... Judgment identification signal (C), 706 ... Enable signal, 801 ... Identification amount y mapping circuit, 802 ... Identification amount y accumulation circuit, 803 ... Identification amount y detection circuit, 804 ... Identification area x Mapping circuit,
805 ... Identification area x detection circuit, 806 ... Area x threshold value r generation circuit, 807 ... Judgment circuit, 808 ... Judgment flag generation circuit, 809 ... Judgment completion flag generation circuit, 811 ... Mapping data signal, 814 ... Discrimination amount y threshold value m Generation circuit, 9
01 ... Judgment image creating circuit, 902 ... RA with built-in battery
M, 903 ... Switch circuit, 904 ... Image scanner, 905 ... Registered image signal, 1001 ... N divider circuit, 1
002 ... Latch CLK generation circuit, 1003 ... Address load CLK generation circuit, 1004 ... Address start data generation circuit, 1005 ... Address load signal, 1006 ... Load data signal, 1007 ... Address counter circuit, 1
009 ... N frequency division CLK, 1010 ... Reset pulse generation circuit, 1011 ... Reset signal, 1012 ... Enable generation circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location G07D 7/00 E H04N 1/40 G06F 15/62 410 H04N 1/40 Z

Claims (3)

[Claims] 1. A first storage means for storing information of a specific image for each color component, a first input means for inputting color image data, each color component of the color image data and the storage means stored in the storage means. Comparing means for comparing the color component information of the specific image, the comparison result by the comparing means, weighting means for weighting according to the comparison result, using the comparison result weighted by the weighting means, A color image processing apparatus comprising: a determination unit that comprehensively determines whether or not the input color image data is the specific image over a predetermined area represented by the input color image data. 2. The weighting by the weighting means is performed according to a difference value between each color component of the color image data and the color component information of the specific image stored in the storage means.
The color image processing apparatus according to claim 1, wherein the weighting coefficient is changed. 3. A second input for inputting data of an image different from the specific image used as a comparison target in the comparison means.
Input means, second storage means for storing the data of the different image input by the second input means, and control for using data of the different image in the second storage means as a comparison target in the comparison means The color image processing apparatus according to claim 1, further comprising: