JPH07240568A - Circuit board and its manufacture - Google Patents
Circuit board and its manufactureInfo
- Publication number
- JPH07240568A JPH07240568A JP5513194A JP5513194A JPH07240568A JP H07240568 A JPH07240568 A JP H07240568A JP 5513194 A JP5513194 A JP 5513194A JP 5513194 A JP5513194 A JP 5513194A JP H07240568 A JPH07240568 A JP H07240568A
- Authority
- JP
- Japan
- Prior art keywords
- insulating material
- pattern
- circuit board
- concave
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は半導体デバイスなどを
実装する回路基板とその製造方法に関するもので、特に
導体パターンまたは導通穴が形成された回路基板とその
製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board on which a semiconductor device or the like is mounted and a manufacturing method thereof, and more particularly to a circuit board having a conductor pattern or a conductive hole formed therein and a manufacturing method thereof.
【0002】[0002]
【従来の技術】一般に回路基板を製造する場合、絶縁材
上にレジスト材を塗布し、これに光などを用いてパター
ンを形成し、かかる後にめっき核形成を行い、無電解め
っき、あるいは無電解めっきと電解めっきの併用により
銅などの導体パターンを形成し、かかる後に、レジスト
材を除去する工程を用いる。特に多層基板を製造する場
合には、上記レジスト材を除去する工程の後に、さらに
ポリイミドなどの絶縁体を塗布しレーザあるいはその他
のエッチング方法で導通穴を形成し、これらの処理を繰
り返して数層から数十層の多層構造を作りあげていく。2. Description of the Related Art Generally, when a circuit board is manufactured, a resist material is applied on an insulating material, a pattern is formed on the insulating material by using light, and after that, plating nucleation is performed to perform electroless plating or electroless plating. A step of forming a conductor pattern of copper or the like by using both plating and electrolytic plating and then removing the resist material is used. Especially when manufacturing a multilayer substrate, after the step of removing the resist material, an insulating material such as polyimide is further applied to form a conductive hole by laser or other etching method, and these treatments are repeated to form several layers. To make a multi-layered structure of several tens of layers.
【0003】例えば図15は刊行物「電子材料,5,5
4頁(1990年)」に示された従来の多層の回路基板
の製造方法を工程順に示す断面図であり、図において2
は導通穴、3はニッケルや銅などの導体、6はポリイミ
ドなどの絶縁材、4はパラジュウムなどのめっき核、7
Aは穴を開けるためのレーザ、8はマスク、9はシリコ
ンなどの基板、13はレーザの加工により発生する分解
物、27は露光を行うための光、28は感光性のレジス
ト材、101は凸状パターンである。図15(a)はレ
ジスト材28を露光・現像する工程の断面図、図15
(b)はめっき核4を付ける工程の断面図、図15
(c)は導体3を形成する工程の断面図、図15(d)
はレジスト材28を除去する工程の断面図、図15
(e)は二層目の絶縁材6上にレーザ7Aを照射する工
程の断面図、図15(f)はレーザ7Aにより形成され
た穴を導体3で埋め込む工程の断面図、図15(g)は
上記工程を繰り返して基板を多層化する工程を示す断面
図である。For example, FIG. 15 shows a publication "Electronic Materials, 5, 5".
4 (1990) ”is a cross-sectional view showing the method of manufacturing the conventional multilayer circuit board in the order of steps.
Is a conductive hole, 3 is a conductor such as nickel or copper, 6 is an insulating material such as polyimide, 4 is a plating nucleus such as palladium, 7
A is a laser for making a hole, 8 is a mask, 9 is a substrate such as silicon, 13 is a decomposed product generated by laser processing, 27 is light for exposing, 28 is a photosensitive resist material, and 101 is It is a convex pattern. FIG. 15A is a sectional view of the step of exposing and developing the resist material 28, FIG.
FIG. 15B is a sectional view of the step of attaching the plating nucleus 4.
15C is a sectional view of the step of forming the conductor 3, FIG.
Is a cross-sectional view of the step of removing the resist material 28, FIG.
15E is a cross-sectional view of the step of irradiating the second layer insulating material 6 with the laser 7A, FIG. 15F is a cross-sectional view of the step of filling the hole formed by the laser 7A with the conductor 3, and FIG. FIG. 8A) is a cross-sectional view showing a step of forming the substrate in multiple layers by repeating the above steps.
【0004】次に動作について説明する。基板9の上
に、絶縁材6及びレジスト材28が塗布されている。絶
縁材6上のレジスト材28をマスク8を通して光27に
より露光し現像する。マスク8は所望のパターンが形成
されていて、例えば電気抵抗を変える場合にはパターン
幅を変えてある(図15(a))。例えばマスク8に覆
われていない部分のレジスト材28は除去され、パター
ンが形成される。この上にはめっき核4を付ける(図1
5(b))。無電解めっき、あるいは無電解めっきと電
解めっきの併用により導体3を析出させる(図15
(c))。その後レジスト材28を除去して、一層目の
導体の凸状パターン101が形成される。ここで、レジ
スト材28を用いることにより所望の部分以外にめっき
がなされることを防いでいる(図15(d))。この凸
状パターン101上に二層目の絶縁材6を塗布し、この
絶縁材6を所望のパターンのマスク8を用いてレーザ7
Aを照射する(図15(e))。レーザ7Aにより穴が
形成され、この穴をめっきなどで導体3を埋め込み、導
通穴2を形成する。レーザ7A照射の際、分解物13が
形成される(図15(f))。この分解物13は洗浄に
より除かれる(図示せず)。絶縁材6の塗布、凸状パタ
ーン101または穴の形成、めっきなどによる導体3の
凸状パターン101または穴への埋め込み等の上記工程
の繰り返しにより多層化された基板が形成される(図1
5(g))。Next, the operation will be described. The insulating material 6 and the resist material 28 are applied on the substrate 9. The resist material 28 on the insulating material 6 is exposed by the light 27 through the mask 8 and developed. A desired pattern is formed on the mask 8, and the pattern width is changed when, for example, the electric resistance is changed (FIG. 15A). For example, the resist material 28 in the portion not covered with the mask 8 is removed and a pattern is formed. A plating nucleus 4 is attached on this (Fig. 1
5 (b)). The conductor 3 is deposited by electroless plating or by using both electroless plating and electrolytic plating (FIG. 15).
(C)). After that, the resist material 28 is removed, and the convex pattern 101 of the conductor of the first layer is formed. Here, by using the resist material 28, plating is prevented from being applied to a portion other than a desired portion (FIG. 15D). A second layer of insulating material 6 is applied onto the convex pattern 101, and the insulating material 6 is applied to a laser 7 by using a mask 8 having a desired pattern.
Irradiation with A (FIG. 15E). A hole is formed by the laser 7A, and the conductor 3 is embedded in the hole by plating or the like to form the conduction hole 2. When the laser 7A is irradiated, a decomposed product 13 is formed (FIG. 15 (f)). This decomposed product 13 is removed by washing (not shown). A multilayered substrate is formed by repeating the above steps such as coating the insulating material 6, forming the convex pattern 101 or holes, and filling the conductor 3 into the convex pattern 101 or holes by plating or the like (FIG. 1).
5 (g)).
【0005】このような工程で形成された回路基板は小
面積に多くの回路を形成できるため、高密度実装が可能
となり、電子デバイスの小形化、高速化に適しているた
め精力的に開発が進められている。Since the circuit board formed by such a process can form a large number of circuits in a small area, high density mounting becomes possible, and it is suitable for downsizing and speeding up of electronic devices, and thus vigorous development is possible. It is being advanced.
【0006】また、紫外レーザを用いためっき加工につ
いては、すでに新納らの報告(Appl.Phys.Lett.60(21),
25 May 1992 )があり、紫外レーザを照射することによ
って、表面が粗面化されるとともに、高分子表面の電位
が変化し、電位変化に対応して、適切な金属触媒付与を
行うことで、照射表面への触媒吸着が可能であることを
述べている。例えば、紫外レーザ照射で、正に帯電され
た表面に負電荷をもつ金属触媒のイオン、コロイドを接
触させると表面は活性化され、無電解めっきが可能とな
ることを報告している。しかしながら、紫外レーザを照
射して形成した導体パターンの電気抵抗値を変えたり、
多層化を容易にするというような回路基板の製造方法に
関する提案はなされていない。Regarding the plating process using an ultraviolet laser, the report of Shinna et al. (Appl.Phys.Lett.60 (21),
25 May 1992), the surface is roughened by irradiating with an ultraviolet laser, and the potential of the polymer surface changes, and by applying an appropriate metal catalyst in response to the potential change, It states that the catalyst can be adsorbed on the irradiated surface. For example, it has been reported that, by exposing the positively charged surface to ions and colloids of a metal catalyst having a negative charge by UV laser irradiation, the surface is activated and electroless plating becomes possible. However, changing the electric resistance value of the conductor pattern formed by irradiating with an ultraviolet laser,
No proposal has been made regarding a method of manufacturing a circuit board that facilitates multilayering.
【0007】従来、図15(c)に示されるような絶縁
材6上にめっきにより導体3を形成する工程の前には、
必ず、図15(b)に示されるようなめっき核4として
金属を付着させる必要があり、金属の還元しやすさを考
慮した溶液調整がなされている。例えば、図16は、電
気鍍金研究会編、めっき教本、昭和61年9月発行、2
33頁〜235頁に示された従来の無電解めっき方法の
フローチャートであり、図において、ST1は例えばク
ロム酸と硫酸の混合液により絶縁材の表面を粗化する工
程、ST2は表面のクロムを除去する工程、ST3は表
面にパラジュウムとすずの錯化合物を吸着する工程、S
T4はすずを除去しパラジュウムを金属化する工程、S
T5はニッケル層を形成させる工程である。Conventionally, before the step of forming the conductor 3 on the insulating material 6 by plating as shown in FIG.
It is always necessary to attach a metal as the plating nucleus 4 as shown in FIG. 15B, and the solution is adjusted in consideration of the easiness of reducing the metal. For example, FIG. 16 is an electroplating study group edition, plating textbook, published in September 1986, 2
It is a flowchart of the conventional electroless plating method shown on pages 33 to 235. In the figure, ST1 is a step of roughening the surface of the insulating material with a mixed solution of chromic acid and sulfuric acid, and ST2 is a step of removing the chromium on the surface. Step of removing, ST3 is step of adsorbing complex compound of palladium and tin on the surface, S
T4 is a step of removing tin and metallizing palladium, S
T5 is a step of forming a nickel layer.
【0008】次に動作について説明する。まず例えばク
ロム酸と硫酸の混合液により化学的に絶縁材の表面を粗
化し(ST1)、濃塩酸により中和して表面のクロムを
除去する(ST2)。その後、塩化パラジュウム,塩化
第1すず,濃塩酸が混合された水溶液により絶縁材表面
にパラジュウムとすずの錯化合物を吸着し(ST3)、
硫酸などのアクセレータによりすずを除去しパラジュウ
ムを金属化してめっき核とする(ST4)。硫酸ニッケ
ル,次亜リン酸ソーダ,クエン酸アンモンからなるpH
8〜9.5程度の混合液に浸せきして、絶縁材表面にニ
ッケルを析出成長させニッケル層によるめっきが形成さ
れる(ST5)。Next, the operation will be described. First, for example, the surface of the insulating material is chemically roughened with a mixed liquid of chromic acid and sulfuric acid (ST1) and neutralized with concentrated hydrochloric acid to remove chromium on the surface (ST2). Then, a complex compound of palladium and tin is adsorbed on the surface of the insulating material by an aqueous solution in which palladium chloride, stannous chloride and concentrated hydrochloric acid are mixed (ST3),
Tin is removed by an accelerator such as sulfuric acid to metallize palladium to form a plating nucleus (ST4). PH consisting of nickel sulfate, sodium hypophosphite, and ammonium citrate
It is dipped in a mixed solution of about 8 to 9.5 to deposit and grow nickel on the surface of the insulating material to form plating by the nickel layer (ST5).
【0009】また、図15(f)に示されるような微細
に形成された穴に導体3である金属を埋め込む工程で
は、一般に無電解めっきが用いられており、下層の金属
上に無電解めっき液中の金属イオンを還元することによ
り金属を析出させ、金属を成長させていく方法が採用さ
れている。Further, in the step of embedding the metal of the conductor 3 in the finely formed holes as shown in FIG. 15 (f), electroless plating is generally used, and electroless plating is performed on the metal of the lower layer. A method of depositing a metal by reducing metal ions in the liquid to grow the metal is adopted.
【0010】そのような方法による場合、金属を析出さ
せるとき、必ず金属イオンの還元反応にともない、水素
などの気体が発生する。発生した気体はめっき部の側壁
に沿って上昇し、上縁部に集まり、さらに大きな気泡と
なって穴上部を覆ってしまい、めっき液が凹部に入って
いけないという現象が起こる。図17は、この現象を示
す従来の凹部におけるめっき工程を示す断面図であり、
図において、3は導体、4はめっき核、6は絶縁材、9
は基板、24は水素などの気泡である。この図に示され
るように、めっき工程において、金属イオンの還元反応
にともない水素が生成され、水素の気泡24が発生す
る。気泡24で凹部がおおわれるため微細な凹部にめっ
きができなかったり、凹部全体を埋め込むことができな
くなる。凹部寸法が大きい場合は気体が離脱していける
が、微細な穴や溝にめっきを行なうのは非常に困難で、
上記気泡24は基板9や液に振動を与えるのみでは除去
できなかった。According to such a method, when depositing a metal, a gas such as hydrogen is always generated along with the reduction reaction of metal ions. The generated gas rises along the side wall of the plating part, collects at the upper edge part, becomes a larger bubble and covers the upper part of the hole, and the phenomenon that the plating solution cannot enter the concave part occurs. FIG. 17 is a cross-sectional view showing a conventional plating process in a recess showing this phenomenon,
In the figure, 3 is a conductor, 4 is a plating nucleus, 6 is an insulating material, and 9
Is a substrate, and 24 is a bubble such as hydrogen. As shown in this figure, in the plating step, hydrogen is generated along with the reduction reaction of the metal ions, and hydrogen bubbles 24 are generated. Since the recesses are covered with the bubbles 24, it is impossible to plate the fine recesses or to fill the entire recesses. If the size of the recess is large, the gas can escape, but it is very difficult to plate fine holes and grooves.
The bubbles 24 could not be removed only by vibrating the substrate 9 and the liquid.
【0011】一方、比較的大きな凹部には気泡に妨げら
れず導体形成が可能な場合があったが、深さの異なる2
つ以上の凹部に同じ高さで導体を形成することはできな
かった。図18は、従来の異なる深さの凹部のめっき工
程を示す断面図であり、図において、3は導体、4はめ
っき核、6は絶縁材、9は基板、102aは浅い凹部、
102bは深い凹部である。図18(a)は浅い凹部1
02aに対し絶縁材6表面近傍まで導体3形成を行った
例を示す断面図、図18(b)は深い凹部102bに対
し絶縁材6表面近傍まで導体3形成を行った例を示す断
面図である。図18(a)は浅い凹部102aの絶縁材
6表面近傍まで導体3形成を行ったため、深い凹部10
2bは途中までしか導体3が形成されず、浅い凹部10
2aと深い凹部102bでは導体層の高さが異なる。図
18(b)は深い凹部102bの絶縁材6表面近傍まで
導体3形成を行ったため、浅い凹部102aに過度にめ
っき成長する。このように、一方の凹部の導体成長のみ
を進めることができないため、深さの異なる2つ以上の
凹部102a,102bに同じ高さで導体3を形成でき
ない。On the other hand, there were cases where a conductor could be formed in a relatively large concave portion without being obstructed by bubbles.
It was not possible to form conductors at the same height in more than one recess. FIG. 18 is a cross-sectional view showing a conventional plating process for recesses having different depths. In the figure, 3 is a conductor, 4 is a plating nucleus, 6 is an insulating material, 9 is a substrate, 102a is a shallow recess,
102b is a deep recess. FIG. 18A shows a shallow recess 1
02a is a cross-sectional view showing an example in which the conductor 3 is formed up to near the surface of the insulating material 6, and FIG. 18B is a cross-sectional view showing an example in which the conductor 3 is formed up to near the surface of the insulating material 6 in the deep recess 102b. is there. In FIG. 18A, the conductor 3 is formed up to the vicinity of the surface of the insulating material 6 in the shallow recess 102a, so that the deep recess 10 is formed.
2b, the conductor 3 is formed only partway, and the shallow recess 10
2a and the deep recess 102b have different conductor layer heights. In FIG. 18B, since the conductor 3 is formed up to the surface of the insulating material 6 in the deep recess 102b, the shallow recess 102a is excessively plated and grown. As described above, since it is not possible to advance the conductor growth in only one of the recesses, the conductor 3 cannot be formed at the same height in two or more recesses 102a and 102b having different depths.
【0012】また、図15(e),(f)に示されるよ
うなレーザ7などで絶縁材6に穴あけ加工を行う工程で
は、レーザ7Aなどで分解された分解物13が周辺の絶
縁材表面に付着する。この分解物13を防止するため
に、これを洗浄する工程がとられたり、あらかじめカバ
ー材を張りつけたり、あて板をして、加工後にこれらを
剥す工程も採られている。Further, in the step of making a hole in the insulating material 6 with the laser 7 or the like as shown in FIGS. 15 (e) and 15 (f), the decomposed material 13 decomposed by the laser 7A or the like is the surface of the surrounding insulating material. Adhere to. In order to prevent the decomposed matter 13, a step of washing the decomposed matter 13, a step of pasting a cover material in advance, a step of applying a cover plate, and a step of peeling them off after processing are also adopted.
【0013】図19は従来のカバー材を用いた分解物1
3の付着防止方法を工程順に示す断面図であり、図にお
いて、6は絶縁材、7Aはレーザ、8はマスク、9は基
板、31はカバー材、13は分解物である。図19
(a)は絶縁材6上のカバー材31にレーザ7Aを照射
する工程の断面図、図19(b)はレーザ7Aによりカ
バー材31が除去加工される工程の断面図、図19
(c)は分解物13が生成されながらレーザ7Aにより
絶縁材6を除去加工する工程の断面図、図19(d)は
レーザ7Aによる絶縁材6の除去加工が完了する工程の
断面図、図19(e)はカバー材を剥す工程を示した断
面図である。FIG. 19 shows a decomposed product 1 using a conventional cover material.
3A and 3B are cross-sectional views showing the adhesion preventing method of 3 in the order of steps, in which 6 is an insulating material, 7A is a laser, 8 is a mask, 9 is a substrate, 31 is a cover material, and 13 is a decomposed product. FIG. 19
19A is a sectional view of a step of irradiating the cover material 31 on the insulating material 6 with the laser 7A, and FIG. 19B is a sectional view of a step of removing the cover material 31 by the laser 7A.
19C is a cross-sectional view of a process of removing the insulating material 6 with the laser 7A while the decomposed product 13 is being generated, and FIG. 19D is a cross-sectional view of a process of removing the insulating material 6 with the laser 7A. 19E is a cross-sectional view showing the step of peeling the cover material.
【0014】次に動作について説明する。基板9の上に
絶縁材6が塗布されている。カバー材31を絶縁材6に
ラミネートし、この上にマスク8を通してレーザ7Aを
照射すると(図19(a))、レーザ7Aはカバー材3
1を除去加工し透過する(図19(b))。一般に絶縁
材6として用いられているポリイミドは非常にレーザ7
Aの吸収係数が高いため、除去のしきい値エネルギー密
度が低く、カバー材31を透過したレーザ光により除去
される。レーザ7Aが絶縁材6を除去すると、分解ガス
によって、カバー材31が剥がれ、分解物13がカバー
材31と絶縁材6の間に入り埋め込まれる(図19
(c))。絶縁材6の加工が完了した状態でも分解物1
3はカバー材31と絶縁材6の間にある(図19
(d))。その後、カバー材31を絶縁材6から剥すこ
とにより分解物13も共に除かれる(図19(e))。
しかしながら、分解物13が絶縁材6とカバー材31の
間に入り、絶縁材6上に埋め込まれてしまうため、カバ
ー材31を剥した後に洗浄してもとれなくなる場合があ
った。Next, the operation will be described. The insulating material 6 is applied on the substrate 9. When the cover material 31 is laminated on the insulating material 6 and the laser 7A is radiated through the mask 8 on the insulating material 6 (FIG. 19A), the laser 7A will cover the cover material 3
1 is removed and transmitted (FIG. 19B). The polyimide generally used as the insulating material 6 is very laser
Since the absorption coefficient of A is high, the threshold energy density for removal is low, and the removal is performed by the laser light that has passed through the cover material 31. When the laser 7A removes the insulating material 6, the decomposed gas peels off the cover material 31, and the decomposed material 13 is embedded between the cover material 31 and the insulating material 6 (FIG. 19).
(C)). Decomposition product 1 even when the processing of insulating material 6 is completed
3 is between the cover material 31 and the insulating material 6 (see FIG. 19).
(D)). Then, the cover material 31 is peeled off from the insulating material 6 so that the decomposed material 13 is also removed (FIG. 19E).
However, since the decomposed material 13 enters between the insulating material 6 and the cover material 31 and is embedded in the insulating material 6, there are cases in which the decomposed material 13 cannot be removed even if it is washed after the cover material 31 is peeled off.
【0015】[0015]
【発明が解決しようとする課題】従来の回路基板は以上
のように構成されまた製造されているので、レジスト材
28の露光・現像工程、めっき核4を付着させる工程な
どが必要であり工程が複雑であるなどの問題点があり、
導体パターンの電気抵抗を変える場合にはパターン幅を
変える必要があるので小形化に支障をきたすなどの問題
点があった。また、導体パターンは凸状101に形成さ
れるため、多層基板を製造する場合には、多層化を行っ
ていくうちに、下層の導体パターンの凸部が上層に影響
し、これが積算されて導体パターンの形状がくずれて信
頼性が低下したり、導体パターンが形成できないなどの
問題点があった。Since the conventional circuit board is constructed and manufactured as described above, the steps of exposing and developing the resist material 28, attaching the plating nuclei 4 and the like are necessary. There are problems such as complexity,
When changing the electric resistance of the conductor pattern, it is necessary to change the pattern width, which causes a problem in that miniaturization is hindered. Further, since the conductor pattern is formed in the convex shape 101, when a multilayer substrate is manufactured, the convex portions of the conductor pattern of the lower layer affect the upper layer during the multi-layering process, and the protrusions are integrated to obtain the conductor. There are problems that the shape of the pattern collapses and the reliability decreases, and that a conductor pattern cannot be formed.
【0016】さらに、紫外レーザを照射して高分子材料
表面を改質するのみでは、表面電位は材料ごとに異な
り、触媒や無電解めっき液の選定が必要であったり、表
面電位が不足して、所望の導体3が成長しない材料もあ
るなどの問題点があった。また、通常の高分子材料は正
に帯電することが多いため、陽イオンである金属をその
まま付着させることができなかったり、付着速度が遅い
などの問題点があった。Further, only by modifying the surface of the polymer material by irradiating it with an ultraviolet laser, the surface potential differs depending on the material, and it is necessary to select a catalyst or an electroless plating solution, or the surface potential is insufficient. However, there is a problem in that some materials do not grow the desired conductor 3. In addition, since ordinary polymer materials are often positively charged, there are problems that the metal that is a cation cannot be directly attached and that the attachment speed is slow.
【0017】また、気泡24で穴がおおわれるため微細
な凹部にめっきができなかったり、凹部全体を埋め込む
ことができなくなるなどの問題点があった。また、深さ
の異なる2つ以上の凹部102a,102bに同じ高さ
で導体3を形成することができないなどの問題点があっ
た。また、レーザ7加工時に発生する分解物13を除去
するために洗浄工程が設けられるが、洗浄に長時間を要
するなどの問題点があった。また絶縁材6上の分解物1
3の付着を防止するために、あらかじめ、絶縁材6上に
カバー材31を張り付ける方法もとられているが、カバ
ー材31を除去するための工夫がなされていなかった
り、絶縁材6上の分解物13が完全に除去できないなど
の問題点があった。Further, since the holes are covered with the bubbles 24, there are problems that the fine recesses cannot be plated or the entire recesses cannot be filled. Further, there is a problem that the conductor 3 cannot be formed at the same height in two or more recesses 102a and 102b having different depths. Further, although a cleaning process is provided to remove the decomposed material 13 generated during the processing of the laser 7, there is a problem that the cleaning requires a long time. In addition, the decomposition product 1 on the insulating material 6
In order to prevent the adhesion of No. 3, the method of pasting the cover material 31 on the insulating material 6 in advance has been taken, but no measures have been taken to remove the cover material 31, There was a problem that the decomposition product 13 could not be completely removed.
【0018】請求項1及び請求項3の発明は上記のよう
な問題点を解消するためになされたもので、導体パター
ンの出っ張りをなくすことができ、めっきの過度成長が
防止でき、回路層が平坦化できることによって、多層化
が容易にできるとともに、信頼性高い回路基板及びその
製造方法を提供することを目的とする。The inventions of claims 1 and 3 have been made to solve the above-mentioned problems. The protrusion of the conductor pattern can be eliminated, excessive growth of plating can be prevented, and the circuit layer can be formed. It is an object of the present invention to provide a circuit board and a method of manufacturing the circuit board, which can be multilayered easily by being flattened.
【0019】請求項4の発明は、回路層が平坦化できる
ことに加え、めっき工程を簡略化できる回路基板の製造
方法を提供することを目的とする。It is an object of the present invention to provide a method of manufacturing a circuit board, which can simplify the plating process in addition to flattening the circuit layer.
【0020】請求項5の発明は、回路層が平坦化できる
こと及びめっき工程を簡略化できることに加え、導体パ
ターン幅を変えずに電気抵抗を変えることができ小形化
が可能となり、さらに導通穴を回路層と同時に加工でき
工程が簡略化できる回路基板及びその製造方法を提供す
ることを目的とする。According to the invention of claim 5, in addition to the fact that the circuit layer can be flattened and the plating process can be simplified, the electric resistance can be changed without changing the width of the conductor pattern, which enables miniaturization and further the formation of a conductive hole. An object of the present invention is to provide a circuit board which can be processed simultaneously with a circuit layer and can be simplified in the process, and a manufacturing method thereof.
【0021】請求項6の発明は、回路層が平坦化できる
こと及びめっき工程を簡略化できることに加え、簡単な
工程で導体パターン幅を大きく変えずに電気抵抗を変え
ることができ小形化が可能となる回路基板の製造方法を
提供することを目的とする。According to the invention of claim 6, in addition to the fact that the circuit layer can be flattened and the plating process can be simplified, the electrical resistance can be changed by a simple process without largely changing the conductor pattern width, and miniaturization is possible. An object of the present invention is to provide a method of manufacturing a circuit board.
【0022】請求項2、7及び8の発明は、回路層が平
坦化できることに加え、めっき工程を簡略化して選択的
なめっきが可能である回路基板の製造方法を提供するこ
とを目的とする。It is an object of the inventions of claims 2, 7 and 8 to provide a method of manufacturing a circuit board, in which a circuit layer can be planarized and a plating step is simplified to enable selective plating. .
【0023】請求項9の発明は、回路層が平坦化できる
ことに加え、めっき工程を簡略化できると共に分解物な
どの不要物を除去して信頼性を向上できる回路基板の製
造方法を提供することを目的とする。The ninth aspect of the present invention provides a method for manufacturing a circuit board, which can flatten a circuit layer, simplify the plating process, and remove unnecessary substances such as decomposed products to improve reliability. With the goal.
【0024】請求項10の発明は、回路層が平坦化でき
ること、めっき工程を簡略化できること、分解物などの
不要物を除去して信頼性を向上できることに加えて、分
解物が樹脂と絶縁材の界面に入り込むのを防止できる回
路基板の製造方法を提供することを目的とする。According to the tenth aspect of the invention, in addition to the fact that the circuit layer can be flattened, the plating process can be simplified, unnecessary substances such as decomposed substances can be removed to improve reliability, and the decomposed substances can be made of resin and an insulating material. It is an object of the present invention to provide a method for manufacturing a circuit board, which is capable of preventing the circuit board from entering the interface.
【0025】請求項11及び請求項12の発明は、回路
層が平坦化できることに加えて、めっき工程を簡略化で
きると共にめっき速度を向上させる回路基板の製造方法
を提供することを目的とする。It is an object of the inventions of claims 11 and 12 to provide a method of manufacturing a circuit board, which can simplify the plating process and improve the plating rate in addition to the fact that the circuit layer can be flattened.
【0026】請求項13及び請求項14の発明は、回路
層が平坦化できると共に、パターンが微細でもめっきが
できることにより基板面積を小さくできる回路基板の製
造方法を提供することを目的とする。It is an object of the inventions of claims 13 and 14 to provide a method of manufacturing a circuit board in which the circuit layer can be flattened and the board area can be reduced by plating even if the pattern is fine.
【0027】[0027]
【課題を解決するための手段】請求項1の発明に係る回
路基板は、絶縁材に、凹状パターンあるいは穴を所望の
深さまで除去加工して、凹状パターンあるいは穴の凹部
に導体が埋め込まれているものである。A circuit board according to a first aspect of the present invention is characterized in that an insulating material is processed by removing a concave pattern or a hole to a desired depth, and a conductor is embedded in the concave pattern or the concave portion of the hole. There is something.
【0028】請求項2の発明に係る回路基板は、金属粒
子を含有する絶縁材に凹状パターン又は穴が形成されて
いて、これらの凹部が導体で埋め込まれているものであ
る。In the circuit board according to the invention of claim 2, concave patterns or holes are formed in the insulating material containing metal particles, and these concave portions are filled with a conductor.
【0029】請求項3の発明に係る回路基板の製造方法
は、プラズマエッチングにより絶縁材に凹状パターンま
たは穴を除去加工し、凹状パターンまたは穴の凹部に蓄
積された電荷を利用して金属を付着させ、無電解めっき
またはさらに電解めっきの併用により凹部に導体を埋め
込むものである。In the method of manufacturing a circuit board according to a third aspect of the present invention, the concave pattern or hole is removed from the insulating material by plasma etching, and the metal is attached by utilizing the charge accumulated in the concave portion of the concave pattern or hole. Then, the conductor is embedded in the recess by electroless plating or by using electrolytic plating in combination.
【0030】請求項4の発明に係る回路基板の製造方法
は、絶縁材に紫外レーザを照射して凹状パターンまたは
穴を除去加工し、凹状パターンまたは穴の凹部に蓄積さ
れた電荷を利用して金属を付着させ、無電解めっきまた
はさらに電解めっきの併用により凹部に導体を埋め込む
ものである。In the method of manufacturing a circuit board according to a fourth aspect of the present invention, the insulating material is irradiated with an ultraviolet laser to remove the concave pattern or the hole, and the charge accumulated in the concave portion of the concave pattern or the hole is used. A conductor is made to adhere to the concave portion by adhering a metal and using electroless plating or further electrolytic plating.
【0031】請求項5の発明に係る回路基板の製造方法
は、絶縁材に第一のパターンを有する第一のマスクを通
して紫外レーザを照射し所望の深さの凹状パターンある
いは穴を形成し、さらに第一のパターンと異なる第二の
パターンを有する第二のマスクを用いて絶縁材に紫外レ
ーザを照射して深さの異なる凹状パターンあるいは穴を
形成するものである。In the method of manufacturing a circuit board according to a fifth aspect of the present invention, the insulating material is irradiated with an ultraviolet laser through a first mask having a first pattern to form a concave pattern or hole having a desired depth. The second mask having a second pattern different from the first pattern is used to irradiate the insulating material with an ultraviolet laser to form concave patterns or holes having different depths.
【0032】請求項6の発明に係る回路基板の製造方法
は、所望のサイズのパターン幅又は穴径を有するマスク
を通して、所望の深さが得られるエネルギー密度で、絶
縁材に紫外レーザを照射することにより、1度の照射で
深さの異なる凹状パターン又は穴を形成するものであ
る。In the method of manufacturing a circuit board according to the sixth aspect of the present invention, the insulating material is irradiated with an ultraviolet laser at an energy density capable of obtaining a desired depth through a mask having a pattern width or hole diameter of a desired size. As a result, concave patterns or holes having different depths are formed by one irradiation.
【0033】請求項7の発明に係る回路基板の製造方法
は、金属を含有するガスを絶縁材に紫外レーザを照射し
て凹状パターンまたは穴を除去加工して、凹部にガスの
金属を付着させるものである。In the method of manufacturing a circuit board according to a seventh aspect of the present invention, a gas containing metal is irradiated with an ultraviolet laser on an insulating material to remove concave patterns or holes, and the metal of gas is attached to the concave. It is a thing.
【0034】請求項8の発明に係る回路基板の製造方法
は、金属粒子を含有する絶縁材に紫外レーザを照射して
凹状パターン又は穴を加工するとともに、凹部に金属粒
子を露出させ、無電解めっきあるいはさらに電解めっき
の併用で凹部に導体を埋め込むものである。In the method for manufacturing a circuit board according to the present invention, an insulating material containing metal particles is irradiated with an ultraviolet laser to form a concave pattern or holes, and at the same time, the metal particles are exposed in the concave portions, and electroless electrolysis is performed. The conductor is embedded in the recess by plating or by using electrolytic plating in combination.
【0035】請求項9の発明に係る回路基板の製造方法
は、絶縁材上に溶剤に可溶な樹脂を塗布して、紫外レー
ザを照射して、樹脂と絶縁材を除去加工して凹状パター
ンまたは穴を形成し、無電解めっきまたはさらに電解め
っきの併用して凹部に導体を埋め込み、その後樹脂を溶
剤に溶かして樹脂表面に付着した不要物を除去するもの
である。In the method for manufacturing a circuit board according to the invention of claim 9, a resin soluble in a solvent is applied on the insulating material, and an ultraviolet laser is irradiated to remove the resin and the insulating material to form a concave pattern. Alternatively, a hole is formed, a conductor is embedded in the recess by electroless plating or further electrolytic plating, and then the resin is dissolved in a solvent to remove unnecessary substances adhering to the resin surface.
【0036】請求項10の発明に係る回路基板の製造方
法は、紫外レーザの吸収係数が絶縁材より同程度もしく
は高い樹脂を絶縁材上に塗布して、紫外レーザを照射し
て、樹脂と絶縁材を除去加工して凹状パターンまたは穴
を形成するものである。According to a tenth aspect of the present invention, in a method for manufacturing a circuit board, a resin having an absorption coefficient of ultraviolet laser which is the same as or higher than that of an insulating material is applied onto the insulating material, and the ultraviolet laser is irradiated to insulate the resin from the resin. The material is removed to form a concave pattern or holes.
【0037】請求項11の発明に係る回路基板の製造方
法は、帯電させたガスを送り込みながら紫外レーザを照
射して、凹状パターンまたは穴を形成すると同時に凹部
を帯電させ、凹部に金属を付着させ無電解めっきあるい
はさらに電解めっきを併用して凹部に導体を埋め込むも
のである。According to the eleventh aspect of the present invention, there is provided a method of manufacturing a circuit board, wherein an ultraviolet laser is irradiated while feeding a charged gas to form a concave pattern or hole, and at the same time, the concave portion is charged and metal is attached to the concave portion. The conductor is embedded in the recess by using electroless plating or further electrolytic plating.
【0038】請求項12の発明に係る回路基板の製造方
法は、絶縁材上に樹脂を塗布し、紫外レーザを照射して
樹脂及び絶縁材に凹状パターンまたは穴を形成した後、
この回路基板に直流電圧を印加し電極間を放電させるこ
とによって樹脂および絶縁材の表面を帯電させるもので
ある。According to a twelfth aspect of the present invention, in a method of manufacturing a circuit board, a resin is applied on an insulating material, and an ultraviolet laser is irradiated to form a concave pattern or holes in the resin and the insulating material.
The surface of the resin and the insulating material is charged by applying a DC voltage to this circuit board and discharging between the electrodes.
【0039】請求項13の発明に係る回路基板の製造方
法は、絶縁材に形成された凹部に導体を埋め込むめっき
工程において、絶縁材上部に設置されたバーを移動ある
いは振動させ発生する気泡を除去しながら導体を析出さ
せるものである。In the circuit board manufacturing method according to the thirteenth aspect of the present invention, in the plating step of filling the conductor in the recess formed in the insulating material, the bubbles installed by moving or vibrating the bar installed above the insulating material are removed. While depositing the conductor.
【0040】請求項14の発明に係る回路基板の製造方
法は、バーが陽極であり凹部が陰極であって、導体を析
出させるものである。In the method for manufacturing a circuit board according to the fourteenth aspect of the present invention, the bar is the anode and the recess is the cathode, and the conductor is deposited.
【0041】[0041]
【作用】請求項1の発明における回路基板によれば、絶
縁材に凹状パターンまたは穴が形成され導体で埋め込ま
れているので凹凸のない層が形成できる。According to the circuit board of the first aspect of the present invention, since a concave pattern or hole is formed in the insulating material and is filled with the conductor, a layer without unevenness can be formed.
【0042】請求項2の発明における回路基板によれ
ば、金属粒子を含有する絶縁材に紫外レーザを照射する
と、凹状パターンあるいは穴が加工されると同時に凹部
表面に金属粒子が突出するため、これを核として無電解
めっきが可能となり、選択的に導体を析出できる。According to the circuit board of the second aspect of the present invention, when the insulating material containing the metal particles is irradiated with the ultraviolet laser, the concave pattern or the hole is processed, and at the same time, the metal particles are projected on the surface of the concave portion. It becomes possible to perform electroless plating by using as a nucleus and selectively deposit a conductor.
【0043】請求項3の発明における回路基板の製造方
法によれば、絶縁材に凹状パターンまたは穴を形成し導
体で埋め込んでいるので凹凸のない層が形成できる。According to the method of manufacturing a circuit board in the third aspect of the present invention, since a concave pattern or hole is formed in the insulating material and the conductor is embedded, a layer without irregularities can be formed.
【0044】請求項4の発明における回路基板の製造方
法によれば、絶縁材に紫外レーザ照射にするので凹部に
正あるいは負の電荷が蓄積し、これを負あるいは正の金
属触媒液に浸積することによって凹部のみに金属を付着
させることができ、これによりめっきが可能となり絶縁
材表面あるいは表面近傍まで導体を成長させて凹凸のな
い層が形成できる。According to the method of manufacturing a circuit board in the fourth aspect of the present invention, since the insulating material is irradiated with the ultraviolet laser, positive or negative charges are accumulated in the concave portion and are immersed in the negative or positive metal catalyst liquid. By doing so, the metal can be adhered only to the recesses, which enables plating and allows the conductor to grow to the surface of the insulating material or to the vicinity of the surface to form a layer without unevenness.
【0045】請求項5の発明における回路基板の製造方
法によれば、絶縁材に、第一のマスクを用いて紫外レー
ザを照射してさらに第二のマスクを挿入あるいは交換し
て紫外レーザを照射するので、異なる深さをもつ凹状パ
ターンまたは穴が除去加工できる。According to the method of manufacturing a circuit board in the fifth aspect of the present invention, the insulating material is irradiated with the ultraviolet laser by using the first mask, and the second mask is further inserted or replaced, and the insulating material is irradiated with the ultraviolet laser. As a result, concave patterns or holes having different depths can be removed.
【0046】請求項6の発明における回路基板の製造方
法によれば、所望のサイズのパターン幅又は穴径を有す
るマスクを用いてかつ所望の深さを得られるエネルギー
密度の紫外レーザにより絶縁材を除去加工するので、絶
縁材を所望の深さまで除去加工でき、1度の照射で深さ
の異なる凹状パターンあるいは穴が得られる。According to the method of manufacturing a circuit board in the sixth aspect of the present invention, the insulating material is formed by using an ultraviolet laser having an energy density capable of obtaining a desired depth using a mask having a pattern width or hole diameter of a desired size. Since the removing process is performed, the insulating material can be removed to a desired depth, and concave patterns or holes having different depths can be obtained by one irradiation.
【0047】請求項7の発明における回路基板の製造方
法によれば、金属を含有するガスに紫外レーザを照射す
ると、光分解あるいは熱分解が起こり、ガス分子は解離
し、金属成分が遊離する。金属成分は凹部に吸着されて
金属となるため、これにより無電解めっきが可能とな
り、選択的に導体を析出できる。According to the method of manufacturing a circuit board in the seventh aspect, when a gas containing a metal is irradiated with an ultraviolet laser, photolysis or thermal decomposition occurs, gas molecules are dissociated, and a metal component is liberated. Since the metal component is adsorbed in the concave portion to become a metal, this enables electroless plating and selectively deposits a conductor.
【0048】請求項8の発明における回路基板の製造方
法によれば、金属粒子を含有する絶縁材に紫外レーザを
照射すると、凹状パターンあるいは穴が加工されると同
時に凹部表面に金属粒子が突出するため、これをめっき
核として無電解めっきが可能となり、選択的に導体を析
出できる。According to the method of manufacturing a circuit board in the invention of claim 8, when the insulating material containing the metal particles is irradiated with the ultraviolet laser, the concave pattern or the hole is processed and at the same time, the metal particles are projected on the surface of the concave portion. Therefore, electroless plating can be performed using this as a plating nucleus, and the conductor can be selectively deposited.
【0049】請求項9の発明における回路基板の製造方
法によれば、あらかじめ溶剤に可溶な樹脂が塗布された
絶縁材に、紫外レーザを照射すると、樹脂と絶縁材が除
去加工され凹状パターンまたは穴が形成される。この凹
部に、紫外レーザにより蓄積された電荷を利用して金属
を付着させることもでき、紫外レーザで所望の電荷が蓄
積できない場合にも従来のめっき核形成工程を用いてめ
っき核を形成できるため、材料に限定されることなく、
金属を付着させることができる。これによって無電解め
っきが可能となり導体形成ができるとともに、めっき工
程の後に樹脂は溶剤に溶けるため、従来のめっき核形成
法を用いた場合に所望の場所以外に形成されためっきを
除去することができ、また紫外レーザで加工した時に発
生した分解物は絶縁材ではなく樹脂上に付着するため、
樹脂を溶剤に溶かす工程において同時に除去でき、完成
した基板において絶縁材上の分解物などの不要物の付着
はなく、凹凸のない層が形成できる。According to the method of manufacturing a circuit board of the ninth aspect of the invention, when an ultraviolet laser is applied to an insulating material coated with a solvent-soluble resin in advance, the resin and the insulating material are removed to form a concave pattern or A hole is formed. A metal can be attached to this recess by using the electric charge accumulated by the ultraviolet laser, and even when the desired electric charge cannot be accumulated by the ultraviolet laser, the plating nuclei can be formed by using the conventional plating nucleation step. , Without being limited to the material
Metals can be deposited. This allows electroless plating to form conductors, and since the resin dissolves in the solvent after the plating process, it is possible to remove the plating formed at locations other than the desired location when using the conventional plating nucleation method. Also, because the decomposed products generated when processed with an ultraviolet laser adhere to the resin instead of the insulating material,
The resin can be removed at the same time in the step of dissolving it in a solvent, and in the completed substrate, an unnecessary substance such as a decomposed product on the insulating material does not adhere and a layer having no unevenness can be formed.
【0050】請求項10の発明における回路基板の製造
方法によれば、紫外レーザを照射して、樹脂と絶縁材を
除去する工程において、吸収係数が絶縁材と同程度もし
くは高い樹脂を用いるため、紫外レーザは樹脂を透過し
にくく、樹脂が除去されてから紫外レーザが絶縁材に達
し、絶縁材を除去するため、分解物が樹脂と絶縁材の界
面に入り込み分解物が照射部以外に残ることがない。ま
た、導体を埋め込んだ後樹脂を除去すれば、余分なめっ
き層やレーザによる分解物などの不要物を除去できると
ともに、凹凸のない層が形成できる。According to the method of manufacturing a circuit board of the tenth aspect of the present invention, in the step of irradiating an ultraviolet laser to remove the resin and the insulating material, a resin having an absorption coefficient which is the same as or higher than that of the insulating material is used. The ultraviolet laser does not easily pass through the resin, and after the resin is removed, the ultraviolet laser reaches the insulating material and removes the insulating material, so the decomposed product enters the interface between the resin and the insulating material and the decomposed product remains outside the irradiated part. There is no. Further, if the resin is removed after the conductor is embedded, an unnecessary plating layer and unnecessary substances such as laser-decomposed products can be removed, and a layer without unevenness can be formed.
【0051】請求項11の発明における回路基板の製造
方法によれば、帯電させたガスを送り込みながら紫外レ
ーザを照射すると、絶縁材に凹状パターンまたは穴が除
去加工されると同時に、凹部に電荷が蓄積し凹部を帯電
させることができる。これを金属イオンを含んだ溶液に
接触させると金属イオンは早い速度で還元されて金属と
なる。この付着した金属を利用して、無電解めっきが可
能となり導体を形成することができる。また、電荷が安
定して充分大きい場合には無電解めっき液中の金属イオ
ンをそのまま成長させることができる。According to the method of manufacturing a circuit board in the invention of claim 11, when the ultraviolet laser is irradiated while feeding the charged gas, the concave pattern or the hole is removed in the insulating material, and at the same time, the electric charge is generated in the concave portion. It can accumulate and charge the recess. When this is brought into contact with a solution containing metal ions, the metal ions are reduced at a high rate to become metal. By using this attached metal, electroless plating becomes possible and a conductor can be formed. Further, when the charge is stable and sufficiently large, the metal ions in the electroless plating solution can be grown as they are.
【0052】請求項12の発明における回路基板の製造
方法によれば、紫外レーザにより樹脂を塗布した絶縁材
に凹状パターンまたは穴を加工した後、この回路基板に
直流電圧を印加し電極間を放電させることにより負電極
から電子が放出され、樹脂と絶縁財の表面が帯電するの
で、これに金属イオンを接触させると、安定かつ速い速
度で金属に還元でき、金属を付着させることができる。
これを無電解めっき液に浸積すると、導体を形成するこ
とができる。また電荷が安定して充分大きい場合には無
電解めっき液中の金属イオンをそのまま成長させること
ができる。According to the method of manufacturing a circuit board in the twelfth aspect of the invention, a concave pattern or a hole is formed in an insulating material coated with a resin by an ultraviolet laser, and then a DC voltage is applied to the circuit board to discharge between electrodes. By doing so, electrons are emitted from the negative electrode, and the surfaces of the resin and the insulating material are charged. Therefore, when a metal ion is brought into contact with this, the metal can be reduced to a metal at a stable and fast rate, and the metal can be attached.
By immersing this in an electroless plating solution, a conductor can be formed. If the charge is stable and sufficiently large, the metal ions in the electroless plating solution can be grown as they are.
【0053】請求項13の発明における回路基板の製造
方法によれば、絶縁材に形成された凹部に導体を埋め込
むためにめっきを行う時、めっき液中で起こる還元反応
により水素などの気体が発生するが、絶縁材上部に設置
されたバーを振動あるいは移動させることによって、気
体を常に絶縁材表面から逃がすことができるため、凹部
を覆いつくす気泡に成長することを防止でき、めっき液
を凹部に回り込ませることができるため、微細な部分で
もめっきを安定して行うことができる。According to the method of manufacturing a circuit board in the thirteenth aspect of the present invention, when plating is performed to fill the conductor in the recess formed in the insulating material, a gas such as hydrogen is generated by the reduction reaction that occurs in the plating solution. However, by vibrating or moving the bar installed on top of the insulating material, the gas can always escape from the surface of the insulating material, so that it is possible to prevent the growth of bubbles to cover the recess and prevent the plating solution from being deposited on the recess. Since it can be wrapped around, plating can be stably performed even in a fine portion.
【0054】請求項14の発明における回路基板の製造
方法によれば、絶縁材に形成された凹部に導体を埋め込
むためにめっきを行う時、気泡の除去の為に絶縁材上部
に設置されたバーを振動あるいは移動させるとともに、
凹部を陰極としバーを陽極として電解めっきを行うと、
陰極となる凹部に成長した金属は、陽極であるバーにぶ
つかると、めっき液を介さず電流が流れるためめっきは
それ以上成長しなくなるため、絶縁材表面から突出した
過度のめっき成長を防止できる。According to the method for manufacturing a circuit board in the fourteenth aspect of the present invention, when plating is performed to embed the conductor in the recess formed in the insulating material, the bar installed above the insulating material for removing bubbles. Vibrate or move
When electrolytic plating is performed using the recess as the cathode and the bar as the anode,
When the metal grown in the recess serving as the cathode hits the bar serving as the anode, a current does not flow through the plating solution, and the plating does not grow any more. Therefore, excessive plating growth protruding from the surface of the insulating material can be prevented.
【0055】[0055]
実施例1.以下、請求項1及び請求項3の発明の一実施
例を図について説明する。図1は、実施例1による回路
基板とその製造方法を工程順に示す断面図であり、図に
おいて、1は凹状パターン、1Aは導体パターン、2は
導通穴、3は導体、4はめっき核となる金属、6は絶縁
材、8はマスク、9は基板、12は樹脂、27は光、2
8は感光性レジスト材、29はマスクとなる金属であ
る。図1(a)は感光性レジスト材28を露光する工程
の断面図、図1(b)は感光性レジスト材28を現像し
て所望のパターンを金属29上に形成する工程の断面
図、図1(c)は金属29をウェットエッチングして凹
状パターン加工用マスク29をつくる工程の断面図、図
1(d)はドライエッチングにより金属29に覆われた
部分のみを残し凹状パターン1を加工する工程の断面
図、図1(e)はめっき核を形成させた後無電解めっき
で金属を絶縁材6の表面まで成長させ導体パターン1A
を形成する工程の断面図、図1(f)は樹脂12を除去
することにより所望のパターン以外の部分に形成された
金属3Aを除去する工程の断面図で、一層目の導体パタ
ーン1Aの形成が完了した断面図、図1(g)は多層化
を行った工程を示す断面図であり、2層目は前記と同様
の工程で穴を形成して穴の凹部を導体3で埋めて導通穴
2を形成した層であり、3層目は前記と同様な工程で導
体パターン1Aを形成した層であり、4層目は前記と同
様な工程で端子となる導通穴2を形成した層である。Example 1. An embodiment of the inventions of claims 1 and 3 will be described below with reference to the drawings. FIG. 1 is a cross-sectional view showing a circuit board and a method for manufacturing the same according to a first embodiment in the order of steps, in which 1 is a concave pattern, 1A is a conductor pattern, 2 is a conduction hole, 3 is a conductor, 4 is a plating nucleus. Metal, 6 is an insulating material, 8 is a mask, 9 is a substrate, 12 is resin, 27 is light, 2
Reference numeral 8 is a photosensitive resist material, and 29 is a metal serving as a mask. 1A is a sectional view of a step of exposing the photosensitive resist material 28, and FIG. 1B is a sectional view of a step of developing the photosensitive resist material 28 to form a desired pattern on the metal 29. 1 (c) is a cross-sectional view of a step of forming a concave pattern processing mask 29 by wet etching the metal 29, and FIG. 1 (d) shows the concave pattern 1 by dry etching, leaving only the portion covered with the metal 29. A cross-sectional view of the process, FIG. 1E shows a conductor pattern 1A in which a metal is grown to the surface of the insulating material 6 by electroless plating after forming a plating nucleus.
1F is a cross-sectional view of a step of removing the metal 3A formed on a portion other than a desired pattern by removing the resin 12, and FIG. 1 (g) is a cross-sectional view showing a step of forming a multilayer, and the second layer has a hole formed in the same step as described above and the recessed part of the hole is filled with a conductor 3 for conduction. The layer in which the hole 2 is formed, the third layer is the layer in which the conductor pattern 1A is formed in the same step as described above, and the fourth layer is the layer in which the conductive hole 2 to be a terminal is formed in the same step as described above. is there.
【0056】次に動作について説明する。基板9上に絶
縁材6,樹脂12,金属29,感光性のレジスト材28
が積層している。まず、レジスト材28に光27をマス
ク8を通して露光し(図1(a))、次にレジスト材2
8を現像して所望のパターンを金属29上に形成し(図
1(b))、さらにウェットエッチングすると金属29
は凹状パターン1を加工するために使用するマスクとな
る(図1(c))。例えば酸素プラズマなどによりドラ
イエッチングすると金属29で覆われていない樹脂1
2,絶縁材6は除去され、金属29に覆われた部分のみ
が残り、凹状パターン1が加工される(図1(d))。
次に加工部(凹部)の表面にめっき核を形成させた後、
無電解めっきで金属である導体3を絶縁材6の表面まで
成長させて導体パターン1Aを形成する。この時、絶縁
材6上にコーティングされた樹脂12が余分に形成され
る金属3Aから絶縁材6を保護する覆いとなる(図1
(e))。樹脂12を除去することにより所望のパター
ン以外の部分に形成された金属3Aが除去され、1層目
の導体パターン1Aの形成が完成する。この層は凹凸の
ない均一な表面である(図1(f))。前記と同様の工
程により絶縁材6を塗布し層間をつなぐ導通穴2をもつ
均一な層を形成し、さらに次に、前記と同様の工程によ
り絶縁材6を塗布し、再び導体パターン1Aをもつ均一
な層を形成し、さらに次に、前記と同様の工程により絶
縁材6を塗布し、端子となる導通穴2をもつ均一な層を
形成すると、各層の表面が凹凸がなく平坦であるためく
ずれることなく安定して多層化された基板を製造するこ
とができる。(図1(g))。Next, the operation will be described. Insulating material 6, resin 12, metal 29, photosensitive resist material 28 on substrate 9
Are stacked. First, the resist material 28 is exposed to the light 27 through the mask 8 (FIG. 1A), and then the resist material 2 is exposed.
8 is developed to form a desired pattern on the metal 29 (FIG. 1 (b)), and further wet etching is performed to form the metal 29.
Is a mask used for processing the concave pattern 1 (FIG. 1C). Resin 1 that is not covered with metal 29 when dry-etched with, for example, oxygen plasma 1
2. The insulating material 6 is removed, only the portion covered with the metal 29 remains, and the concave pattern 1 is processed (FIG. 1D).
Next, after forming plating nuclei on the surface of the processed portion (recess),
The conductor 3 which is a metal is grown up to the surface of the insulating material 6 by electroless plating to form the conductor pattern 1A. At this time, the resin 12 coated on the insulating material 6 serves as a cover for protecting the insulating material 6 from the excessively formed metal 3A (see FIG. 1).
(E)). By removing the resin 12, the metal 3A formed on the portion other than the desired pattern is removed, and the formation of the first-layer conductor pattern 1A is completed. This layer has a uniform surface without irregularities (FIG. 1 (f)). The insulating material 6 is applied by the same process as described above to form a uniform layer having the conductive holes 2 connecting the layers, and then the insulating material 6 is applied by the same process as described above and the conductor pattern 1A is provided again. If a uniform layer is formed and then the insulating material 6 is applied by the same process as described above to form a uniform layer having the conductive holes 2 to serve as terminals, the surface of each layer is flat without unevenness. It is possible to stably manufacture a multilayered substrate without breaking. (FIG. 1 (g)).
【0057】この発明における導体3を形成する工程
(図1(e))において、無電解めっきを用いる工程で
は、無電解めっきで薄い導体パターン1Aを形成した後
に、電解めっきを用いてもよい。導体3は、電気を通す
材質のものであればよく、例えば、銅、ニッケル、クロ
ム、銀、金などである。めっき核となる金属4を含有す
る溶液としては、例えば、塩化パラジュウムや塩化第1
すずの双方を含有するキャタリスト液があるが、塩化第
1すずを含有するセンシタイジング液デ処理した後、塩
化パラジュウムを含有するアクチベータ液を用いてもよ
い。これらの溶液に浸積させた後、例えば硫酸などのア
クセレータ液で不要な金属を除去するとともに、パラジ
ュウムなどを還元させ、金属化すればよい。無電解めっ
き液としては、例えば硫酸ニッケル、次亜リン酸ソー
ダ、クエン酸アンモンからなるpH8〜9.5程度の混
合液を用いればニッケルめっきができる。In the step of forming the conductor 3 in the present invention (FIG. 1 (e)), in the step of using electroless plating, electroplating may be used after forming the thin conductor pattern 1A by electroless plating. The conductor 3 may be made of a material that conducts electricity, and is, for example, copper, nickel, chromium, silver, gold or the like. Examples of the solution containing the metal 4 serving as a plating nucleus include palladium chloride and the first chloride.
Although there is a catalyst solution containing both tin, an activator solution containing palladium chloride may be used after the sensitizing solution containing stannous chloride has been detreated. After being immersed in these solutions, unnecessary metals may be removed with an accelerator solution such as sulfuric acid, and palladium may be reduced to metallize. As the electroless plating solution, for example, nickel plating can be performed by using a mixed solution of nickel sulfate, sodium hypophosphite, and ammonium citrate having a pH of about 8 to 9.5.
【0058】また、絶縁材6表面近傍まで成長したと
き、めっき処理を停止すればよいが、表面より過度に成
長させ、研磨などを用いて削り、凹凸をなくしてもよ
い。またエッチング液で溶かしても良い。絶縁材6は絶
縁性がよく、塗布が容易な材質であればよいが、一般に
はポリイミドやエポキシ樹脂のような高分子材料が用い
られる。セラミックなどの無機材料でもよく、有機材料
と無機材料からなるグリーンシートなどでもよい。金属
マスク29は、パターニングが可能で、かつドライエッ
チングで絶縁材6を除去する工程で、除去され難いもの
であればよく、アルミニュウムなどが用いられるが、一
般の金属を用いれば選択的に絶縁材が除去できる。また
樹脂12は金属29をパターニングするときに除去され
ず、凹状パターン1を加工するときに簡単に除去され導
体3形成後に簡単に除去できるものであれば特に限定す
るものではないが、アクリル樹脂を溶剤で溶かしたも
の、あるいはラミネートフィルムなどを用いればよい。The plating process may be stopped when the insulating material 6 has grown to the vicinity of the surface, but it may be grown excessively from the surface and removed by polishing or the like to eliminate the unevenness. Alternatively, it may be dissolved with an etching solution. The insulating material 6 may be a material having a good insulating property and easy to apply, but a polymer material such as polyimide or epoxy resin is generally used. An inorganic material such as ceramic may be used, or a green sheet made of an organic material and an inorganic material may be used. The metal mask 29 may be patterned so long as it is hard to be removed in the step of removing the insulating material 6 by dry etching, and aluminum or the like is used. However, if a general metal is used, the insulating material can be selectively used. Can be removed. Further, the resin 12 is not particularly removed when patterning the metal 29, and is not particularly limited as long as it is easily removed when the concave pattern 1 is processed and can be easily removed after the conductor 3 is formed. What was melt | dissolved with the solvent, a laminated film, etc. may be used.
【0059】さらに、この発明における回路基板製造方
法は、凹凸のない均一な層を形成でき、多層化に有利で
あるが、一層のみで形成したものであってもよい。Further, the method of manufacturing a circuit board according to the present invention can form a uniform layer having no irregularities, which is advantageous for forming a multilayer, but may be formed by only one layer.
【0060】実施例2.請求項4の発明の一実施例を図
について説明する。図2は、実施例2による回路基板の
製造方法を工程順に示す断面図であり、図において、5
は紫外レーザ7を照射した時に凹部に蓄積される電荷で
ある。図2(a)はマスク8をとおし絶縁材6に紫外レ
ーザ7を照射して凹状パターン1を加工する工程を示す
断面図、図2(b)は加工部(凹部)に蓄積された電荷
5を利用して、金属触媒中の金属イオンを還元させ、加
工部に金属4を付着させる工程を示す断面図、図2
(c)は付着させた金属4を無電解めっきで絶縁材6の
表面まで成長させ導体パターン1Aを形成する工程を示
す断面図で、1層目の導体パターン1Aの形成が完了し
た断面図、図2(d)は多層化を行った工程を示す断面
図であり、2層目は前記と同様の工程で穴を形成して穴
の凹部を導体3で埋めて導通穴2を形成した層であり、
3層目は前記と同様の工程で導体パターン1Aを形成し
た層であり、4層目は前記と同様の工程で端子となる導
通穴2を形成した層である。Example 2. An embodiment of the invention of claim 4 will be described with reference to the drawings. 2A to 2C are cross-sectional views showing a method of manufacturing a circuit board according to a second embodiment in the order of steps.
Is an electric charge accumulated in the concave portion when the ultraviolet laser 7 is irradiated. FIG. 2A is a sectional view showing a step of irradiating the insulating material 6 through the mask 8 with an ultraviolet laser 7 to process the concave pattern 1, and FIG. 2B is a sectional view showing charges 5 accumulated in the processed portion (recess). 2 is a cross-sectional view showing the step of reducing the metal ions in the metal catalyst by using the metal and attaching the metal 4 to the processed portion.
(C) is a cross-sectional view showing a step of growing the deposited metal 4 to the surface of the insulating material 6 by electroless plating to form the conductor pattern 1A, which is a cross-sectional view in which formation of the first-layer conductor pattern 1A is completed, FIG. 2 (d) is a cross-sectional view showing a step of forming a multi-layer, and the second layer is a layer in which holes are formed by the same steps as described above and the recesses of the holes are filled with conductors 3 to form conductive holes 2. And
The third layer is a layer in which the conductor pattern 1A is formed in the same process as described above, and the fourth layer is a layer in which the conductive holes 2 to be terminals are formed in the same process as described above.
【0061】次に動作について説明する。基板9上に絶
縁材6が塗布されている。まず、マスク8をとおし絶縁
材6に紫外レーザ7を照射する。絶縁材6は、マスク8
によって一部遮られ照射された紫外レーザ7によって、
凹状パターン1が加工されると同時に、高い光子エネル
ギーによって、正の電荷5が蓄積される(図2
(a))。逆の電荷をもたせた金属触媒溶液に浸積する
と、蓄積した電荷5により金属触媒中のマイナスイオン
e- は加工部に吸着され、これが直ちに金属イオンM+
を還元させ、加工部のみに金属4を析出させる(図2
(b))。この金属4をめっき核として無電解めっきを
行い、凹状パターン1のみに導体3を成長させることが
できる。また絶縁材6の表面近傍まで導体3の形成を行
うと、導体パターン1Aが形成された凹凸のない均一な
層が形成される。これで一層目が完成する(図2
(c))。前記と同様の工程により絶縁材6を塗布し層
間をつなぐ導通穴2を有する均一な層を形成し、さらに
次に、前記と同様の工程により絶縁材6を塗布し、再び
導体パターン1Aを有する均一な層を形成し、さらに次
に、前記と同様の工程により絶縁材6を塗布し、端子と
なる導通穴2を有する均一な層を形成すると、各層の表
面が凹凸がなく平坦であるため、安定して多層化された
基板を製造することができる(図2(d))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9. First, the insulating material 6 is irradiated with the ultraviolet laser 7 through the mask 8. The insulating material 6 is a mask 8
By the ultraviolet laser 7 which is partially shielded and irradiated by
At the same time as the concave pattern 1 is processed, a positive charge 5 is accumulated due to high photon energy (FIG. 2).
(A)). When immersed in a metal catalyst solution having an opposite charge, the accumulated charge 5 causes the negative ions e − in the metal catalyst to be adsorbed to the processed portion, which immediately causes the metal ion M +.
Is reduced, and metal 4 is deposited only on the processed part (Fig. 2).
(B)). Electroless plating can be performed by using this metal 4 as a plating nucleus to grow the conductor 3 only on the concave pattern 1. When the conductor 3 is formed up to the vicinity of the surface of the insulating material 6, a uniform layer having the conductor pattern 1A and no irregularities is formed. This completes the first layer (Fig. 2
(C)). The insulating material 6 is applied by the same process as described above to form a uniform layer having the conduction hole 2 connecting the layers, and then the insulating material 6 is applied by the same process as described above and the conductor pattern 1A is provided again. If a uniform layer is formed, and then the insulating material 6 is applied by the same process as described above to form a uniform layer having the conductive holes 2 to be terminals, the surface of each layer is flat without unevenness. Thus, it is possible to stably manufacture a multilayered substrate (FIG. 2D).
【0062】この発明において、紫外レーザ7は、絶縁
材6に密着したマスク8上に照射してもよく、絶縁材6
から離されたマスク8に照射してもよい。また、マスク
8と絶縁材6の間にレンズを設置して結像させる転写光
学系を用いて照射してもよい。金属4を付着する溶液と
しては、例えば、負に帯電させたパラジュウムコロイド
水溶液がある。また、紫外レーザ7は特に限定するもの
ではないが、低熱損傷で、高品質の除去が可能なエキシ
マレーザやYAG高調波などの短波長、短パルスレーザ
が好ましい。例えばKrFエキシマレーザを用いた場
合、ポリイミドで形成された絶縁材6を除去するのに数
十mJ/cm12 〜数十J/cm2 のエネルギーを用い
ればよい。In the present invention, the ultraviolet laser 7 may be irradiated onto the mask 8 which is in close contact with the insulating material 6.
The mask 8 separated from may be irradiated. Irradiation may be performed by using a transfer optical system in which a lens is provided between the mask 8 and the insulating material 6 to form an image. The solution to which the metal 4 is attached is, for example, a negatively charged aqueous solution of palladium colloid. Further, the ultraviolet laser 7 is not particularly limited, but an excimer laser having a low heat damage and capable of high quality removal, a short wavelength laser such as a YAG harmonic, or a short pulse laser is preferable. For example, when a KrF excimer laser is used, energy of several tens mJ / cm1 2 to several tens J / cm 2 may be used to remove the insulating material 6 formed of polyimide.
【0063】実施例3.請求項4の発明の他の一実施例
を図について説明する。図3は、実施例3による回路基
板の製造方法を工程順に示す断面図であり、実施例1の
金属マスク29を形成する工程に、実施例2を利用した
ものである。図3(a)は紫外レーザ7を照射して、絶
縁材6上に設けられた樹脂12に凹状パターン1を加工
する工程を示す断面図、図3(b)は加工部に金属4を
付着させる工程を示す断面図、図3(c)は付着させた
金属4を無電解めっきで樹脂12の表面まで成長させ金
属29によるマスクを形成する工程を示す断面図、図3
(d)は絶縁材6にドライエッチングで、樹脂12と絶
縁材6を除去し、凹状パターン1を加工する工程を示す
断面図、図3(e)はめっき核を形成させた後、無電解
めっきで導体3を絶縁材6の表面まで成長させて導体パ
ターン1Aを形成する工程を示す断面図、図3(f)は
樹脂12を除去し、所望のパターン以外の部分に形成さ
れた金属3Aを除去する工程を示す断面図で、1層目の
導体パターン1Aの形成が完了した断面図、図3(g)
は多層化を行った工程を示す断面図であり、2層目は前
記と同様の工程で穴を形成して穴の凹部を導体3で埋め
て導通穴2を形成した層であり、3層目は前記と同様の
工程で導体パターン1Aを形成した層であり、4層目は
前記と同様の工程で端子となる導通穴2を形成した層で
ある。Example 3. Another embodiment of the invention of claim 4 will be described with reference to the drawings. 3A to 3C are cross-sectional views showing a method of manufacturing a circuit board according to a third embodiment in the order of steps, wherein the second embodiment is used in the step of forming the metal mask 29 of the first embodiment. FIG. 3A is a cross-sectional view showing a step of irradiating an ultraviolet laser 7 to process the concave pattern 1 on the resin 12 provided on the insulating material 6, and FIG. 3C is a cross-sectional view showing a step of growing the deposited metal 4 to the surface of the resin 12 by electroless plating to form a mask of the metal 29, FIG.
FIG. 3D is a cross-sectional view showing a step of processing the concave pattern 1 by removing the resin 12 and the insulating material 6 by dry etching the insulating material 6, and FIG. 3E is an electroless method after forming a plating nucleus. FIG. 3F is a cross-sectional view showing the step of growing the conductor 3 to the surface of the insulating material 6 by plating to form the conductor pattern 1A. FIG. 3 (f) shows the metal 3A formed on the portion other than the desired pattern by removing the resin 12. 3 (g) is a cross-sectional view showing a step of removing the conductive pattern 1A of FIG.
Is a cross-sectional view showing a step of forming a multilayer, the second layer is a layer in which a hole is formed in the same step as described above and the recessed part of the hole is filled with a conductor 3 to form a conduction hole 2. The eye is a layer in which the conductor pattern 1A is formed in the same step as described above, and the fourth layer is a layer in which the conductive hole 2 to be a terminal is formed in the same step as described above.
【0064】次に動作について説明する。基板9上に絶
縁材6が塗布され、さらに絶縁材6上に樹脂12が塗布
されている。紫外レーザ7をマスク8を通して樹脂12
に照射する。紫外レーザ7は、マスク8によって一部遮
られ、樹脂12に凹状のパターン1を加工すると同時
に、高い光子エネルギーによって、加工部に電荷5が蓄
積する(図3(a))。蓄積した電荷5を利用して加工
部のみに金属4を析出でき(図3(b))、無電解めっ
きが可能となり、金属マスク29が形成できる(図3
(c))。実施例1では金属29はレジスト材の露光・
現像,ウェットエッチングで形成されたが、本実施例で
は紫外レーザ7,無電解めっきにより形成される。ここ
で形成された金属29を用いて、樹脂12と絶縁材6を
酸素プラズマなどによりエッチングすると、凹状パター
ン1が得られ(図3(d))、これにめっき核を形成し
無電解めっきにより絶縁材6表面近傍まで導体3の形成
を行い(図3(e))、絶縁材6上にコーティングした
樹脂12を除去すると、樹脂12上に余分に形成された
金属3Aも除去できるため、導体パターン1Aが形成さ
れた凹凸のない均一な層が形成される(図3(f))。
前記と同様の工程により絶縁材6を塗布し層間をつなぐ
導通穴2を有する均一な層を形成し、さらに次に、前記
と同様の工程により絶縁材6を塗布し、再び導体パター
ン1Aを有する均一な層を形成し、さらに次に、前記と
同様の工程により絶縁材6を塗布し、端子となる導通穴
2を有する均一な層を形成すると、各層の表面が凹凸が
なく平坦であるため、安定して多層化された基板を製造
することができる(図3(g))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9, and the resin 12 is applied on the insulating material 6. The ultraviolet laser 7 is passed through the mask 8 and the resin 12
To irradiate. The ultraviolet laser 7 is partially shielded by the mask 8 to process the concave pattern 1 in the resin 12, and at the same time, the high photon energy causes the charge 5 to be accumulated in the processed portion (FIG. 3A). Using the accumulated charge 5, the metal 4 can be deposited only on the processed portion (FIG. 3B), electroless plating can be performed, and the metal mask 29 can be formed (FIG. 3).
(C)). In the first embodiment, the metal 29 is exposed to the resist material.
Although it is formed by development and wet etching, it is formed by ultraviolet laser 7 and electroless plating in this embodiment. When the resin 12 and the insulating material 6 are etched by oxygen plasma or the like using the metal 29 formed here, a concave pattern 1 is obtained (FIG. 3D), and plating nuclei are formed on this to form electroless plating. When the conductor 3 is formed up to the vicinity of the surface of the insulating material 6 (FIG. 3E) and the resin 12 coated on the insulating material 6 is removed, the metal 3A excessively formed on the resin 12 can also be removed. A uniform layer having no irregularities on which the pattern 1A is formed is formed (FIG. 3F).
The insulating material 6 is applied by the same process as described above to form a uniform layer having the conduction hole 2 connecting the layers, and then the insulating material 6 is applied by the same process as described above and the conductor pattern 1A is provided again. If a uniform layer is formed, and then the insulating material 6 is applied by the same process as described above to form a uniform layer having the conductive holes 2 to be terminals, the surface of each layer is flat without unevenness. It is possible to stably manufacture a multilayered substrate (FIG. 3 (g)).
【0065】実施例4.請求項5の発明の一実施例を図
について説明する。図4は、実施例4による回路基板の
製造方法を工程順に示す断面図であり、図において、1
0は第一のパターンを有する第一のマスク、11は第二
のパターンを有する第二のマスク、102aは浅い凹
部、102bは深い凹部である。図4(a)は第一のパ
ターンを有する第一のマスク10を通して紫外レーザ7
を照射して、絶縁材6に凹状パターン1を加工する工程
を示す断面図、図4(b)は第一のマスク10の第一の
パターンと異なる第二のパターンを有する第二のマスク
11を設置し、さらに、絶縁材6に紫外レーザ7を照射
して、凹状パターン1を加工し、深さが異なる凹部10
2a,102bの形成する工程を示す断面図、図4
(c)は加工部に金属4を付着させ、付着させた金属4
を無電解めっきで絶縁材6の表面まで成長させ導体パタ
ーン1Aを形成する工程を示す断面図、図4(d)は多
層化を行った工程を示す断面図であり、2層目は前記と
同様の工程で第一のマスク10さらに第二のマスク11
を用いて紫外レーザ7を照射して凹状パターン1及び穴
を加工した後、それらの凹部を導体3で埋めた層であ
り、3層目は端子となる導通穴2を形成した層である。Example 4. An embodiment of the invention of claim 5 will be described with reference to the drawings. 4A to 4C are cross-sectional views showing a method of manufacturing a circuit board according to a fourth embodiment in the order of steps.
0 is a first mask having a first pattern, 11 is a second mask having a second pattern, 102a is a shallow recess, and 102b is a deep recess. FIG. 4A shows an ultraviolet laser 7 through a first mask 10 having a first pattern.
Of the second mask 11 having a second pattern different from the first pattern of the first mask 10 is shown in FIG. 4B. And irradiating the insulating material 6 with an ultraviolet laser 7 to process the concave pattern 1 to form the concave portions 10 having different depths.
4A and 4B are cross-sectional views showing the steps of forming 2a and 102b.
(C) shows the metal 4 attached to the processed part and the attached metal 4
Is a cross-sectional view showing the step of growing the conductor pattern 1A by electroless plating to the surface of the insulating material 6, and FIG. 4D is a cross-sectional view showing the step of forming a multilayer. In the same process, the first mask 10 and the second mask 11
Is used to irradiate an ultraviolet laser 7 to process the concave pattern 1 and the holes, and then the concave portions thereof are filled with the conductor 3, and the third layer is a layer in which the conductive holes 2 to be terminals are formed.
【0066】次に動作について説明する。基板9の上に
絶縁材6が塗布されている。絶縁材6に第一のパターン
を有する第一のマスク10を通して紫外レーザ7を照射
する。紫外レーザ7は、第一のマスク10によって一部
遮られ、絶縁材6に凹状のパターン1を加工すると同時
に、高い光子エネルギーによって、加工部に電荷5を蓄
積させる(図4(a))。さらに前記工程で所望の深さ
まで達した凹部を覆うような第二のパターンを有する第
二のマスク11を挿入して紫外レーザを照射することに
よって、異なる深さの凹部102a,102bを有する
凹状パターンを加工する。この実施例では、凹部の深さ
が異なるため、パターン幅でなく深さにより電気抵抗を
変えることができる。同時に加工部に電荷5が蓄積する
(図4(b))。電荷5を利用して加工部のみに金属4
を析出させることができるので、これをめっき核とし
て、凹部のみに導体3を成長させることができる。また
絶縁材6の表面近傍まで導体形成を行うと、深さの異な
る導体パターン1Aが形成された凹凸のない表面が均一
な層が形成される(図4(c))。前記と同様の工程に
より絶縁材6を塗布し第一のマスク10さらに第二のマ
スク11を用いて紫外レーザ7を照射して凹状パターン
1および穴を形成しそれらの凹部を導体3で埋め導体パ
ターン1A及び導通穴2を有する均一な層を形成し、さ
らに次に、絶縁材6を塗布し端子となる導通穴2を有す
る均一な層を形成すると、各層の表面が凹凸がなく平坦
であるため、安定して多層化された基板を製造すること
ができる(図4(d))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9. The insulating material 6 is irradiated with the ultraviolet laser 7 through the first mask 10 having the first pattern. The ultraviolet laser 7 is partially shielded by the first mask 10 to process the concave pattern 1 on the insulating material 6, and at the same time, accumulates the electric charge 5 in the processed portion by high photon energy (FIG. 4A). Further, by inserting a second mask 11 having a second pattern that covers the recesses reaching the desired depth in the above step and irradiating with an ultraviolet laser, a recessed pattern having recesses 102a and 102b of different depths. To process. In this embodiment, since the depths of the recesses are different, the electric resistance can be changed not by the pattern width but by the depth. At the same time, the electric charge 5 is accumulated in the processed portion (FIG. 4 (b)). Metal 4 is applied only to the machined part by using charge 5.
Since it can be deposited, the conductor 3 can be grown only in the concave portion by using this as a plating nucleus. Further, when a conductor is formed up to the vicinity of the surface of the insulating material 6, a layer having a uniform surface with no unevenness on which the conductor patterns 1A having different depths are formed is formed (FIG. 4C). The insulating material 6 is applied by the same process as the above, and the ultraviolet laser 7 is irradiated using the first mask 10 and the second mask 11 to form the concave pattern 1 and the holes, and the concave portions thereof are filled with the conductor 3. When a uniform layer having the pattern 1A and the conductive holes 2 is formed, and then an insulating material 6 is applied to form a uniform layer having the conductive holes 2 to serve as terminals, the surface of each layer is flat without unevenness. Therefore, it is possible to stably manufacture a multilayered substrate (FIG. 4D).
【0067】実施例5.請求項6の発明の一実施例を図
について説明する。図5は、実施例5による回路基板の
製造方法を工程順に示す断面図であり、図において、3
5は所望のサイズのパターン幅又は穴径を有するマスク
である。図5(a)は、絶縁材6に、あらかじめ所望の
深さが得られるようにパターン幅が設計されたマスク3
5を用いて、所望のエネルギー密度で紫外レーザ7を照
射し、絶縁材6を所望の深さまで除去加工し、深さの異
なる凹部を有する凹状パターン1を加工すると同時に加
工部を帯電させた工程を示す断面図、図5(b)は加工
部に蓄積された電荷5を利用して、加工部に金属4を付
着させ、無電解めっきで絶縁材6の表面まで導体3を成
長させ導体パターン1Aを形成する工程を示す断面図
で、1層目の導体パターン1A形成が完了した断面図、
図5(c)は多層化を行った工程を示す断面図であり、
2層目は前記と同様の工程で紫外レーザ7を照射して穴
を加工した後その穴を導体3で埋めて導通穴2を形成し
た層である。Example 5. An embodiment of the invention of claim 6 will be described with reference to the drawings. FIG. 5 is a cross-sectional view showing a method of manufacturing a circuit board according to a fifth embodiment in the order of steps.
Reference numeral 5 is a mask having a desired pattern width or hole diameter. FIG. 5A shows a mask 3 in which a pattern width is designed in advance on the insulating material 6 so as to obtain a desired depth.
5, a step of irradiating an ultraviolet laser 7 at a desired energy density, removing the insulating material 6 to a desired depth, processing the concave pattern 1 having concave portions having different depths, and charging the processed portion at the same time. FIG. 5B is a cross-sectional view showing a conductor pattern in which a metal 4 is attached to the processed portion by using the electric charge 5 accumulated in the processed portion and the conductor 3 is grown to the surface of the insulating material 6 by electroless plating. 1A is a cross-sectional view showing a step of forming 1A, which is a cross-sectional view in which formation of the first-layer conductor pattern 1A is completed,
FIG. 5C is a cross-sectional view showing a step of forming a multilayer,
The second layer is a layer in which an ultraviolet laser 7 is irradiated in the same process as described above to form a hole and then the hole is filled with a conductor 3 to form a conduction hole 2.
【0068】次に動作について説明する。基板9上に絶
縁材6が塗布される。絶縁材6に、紫外レーザ7を比較
的低いエネルギー密度で、パターン幅が変えられたマス
ク35を通して照射すると、パターンの凹部は深さ方向
で細くなり、照射を繰り返しても深さが進まなくなるた
め、深さを変えた凹状パターンの加工が可能である。す
なわち、一度の照射で深さが異なる凹状パターンが形成
できる。この深さを変えることにより電気抵抗を変える
ことができる。また加工と同時に加工部に電荷5が蓄積
される(図5(a))。電荷5を利用して加工部のみに
金属4を析出させるので、これをめっき核として、凹状
パターン1のみに導体3を成長させることができる。ま
た絶縁材6の表面近傍まで導体形成を行うと、導体パタ
ーン1Aが形成された凹凸のない均一な層が形成される
(図5(b))。さらに、次に、前記の工程と同様にし
て作製した層間をつなぐ導通穴2を有する均一な層を形
成し、これを繰り返すと、各層の表面が凹凸がなく平坦
であるため安定して多層化された基板を製造することが
できる(図5(c))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9. When the insulating material 6 is irradiated with the ultraviolet laser 7 at a relatively low energy density through the mask 35 having a changed pattern width, the concave portion of the pattern becomes thin in the depth direction, and the depth does not advance even if the irradiation is repeated. It is possible to process concave patterns with different depths. That is, a concave pattern having different depths can be formed by one irradiation. The electric resistance can be changed by changing this depth. At the same time as the processing, the electric charge 5 is accumulated in the processed portion (FIG. 5A). Since the metal 4 is deposited only on the processed portion by utilizing the electric charge 5, the conductor 3 can be grown only on the concave pattern 1 by using this as a plating nucleus. Further, when the conductor is formed up to the vicinity of the surface of the insulating material 6, a uniform layer having no irregularities on which the conductor pattern 1A is formed is formed (FIG. 5B). Further, next, a uniform layer having the conduction holes 2 for connecting the layers, which is manufactured in the same manner as the above-described step, is formed, and when this is repeated, the surface of each layer is flat without unevenness, and a stable multilayer is formed. The manufactured substrate can be manufactured (FIG. 5C).
【0069】またこの発明によるめっき形成は、ななめ
方向に形成されるため、絶縁材6表面近傍で停止させる
ことがむずかしいため、表面より過度に成長させ、研磨
などを用いて削り、凹凸をなくしてもよい。Further, since the plating according to the present invention is formed in the licking direction, it is difficult to stop it near the surface of the insulating material 6. Therefore, the plating is excessively grown from the surface and scraped by polishing or the like to eliminate unevenness. Good.
【0070】また、パターン深さは、材料、パターンの
幅、あるいは加工エネルギー密度に依存するが、例えば
絶縁材6としてポリイミドを用いた場合は、パターン幅
10ミクロンとなるように設定されたマスク35を用い
て、約0.3J/cm2 のエネルギー密度で紫外レーザ
7を照射すると、約10ミクロンの深さが得られ、パタ
ーン幅20ミクロンとなるように設定されたマスク35
を用いて、約0.3J/cm2 のエネルギー密度で紫外
レーザ7を照射すると、約25ミクロンの深さが得られ
る。The pattern depth depends on the material, the width of the pattern, or the processing energy density. When polyimide is used as the insulating material 6, for example, the mask 35 is set to have a pattern width of 10 μm. By irradiating the ultraviolet laser 7 with an energy density of about 0.3 J / cm 2 , a depth of about 10 microns is obtained and a mask 35 set to have a pattern width of 20 microns.
Is irradiated with the ultraviolet laser 7 at an energy density of about 0.3 J / cm 2 , a depth of about 25 microns is obtained.
【0071】実施例6.請求項7の発明の一実施例を図
について説明する。図6は、実施例6による回路基板の
製造方法を工程順に示す断面図であり、図において、3
2は金属を含有する有機ガス(金属を含有するガス)、
33は分解された有機成分である。図6(a)は、金属
を含有する有機ガス32を流しながら、マスク8をとお
し、絶縁材6に紫外レーザ7を照射して、凹状パターン
1を加工すると同時に、ガス32を分解させて、金属成
分4Aを加工部に付着させる工程を示す断面図、図6
(b)は加工部に付着した金属成分4Aをめっき核とし
て、金属を無電解めっきで絶縁材6の表面まで成長させ
導体パターン1Aを形成する工程を示す断面図で、1層
目の導体パターン1Aの形成が完了した断面図、図6
(c)は多層化を行った工程を示す断面図であり、2層
目は前記と同様の工程で穴を形成して穴を導体3で埋め
て導通穴2を形成した層であり、3層目は前記と同様の
工程で導体パターン1Aを形成した層であり、4層目は
前記と同様の工程で端子となる導通穴2を形成した層で
ある。Example 6. An embodiment of the invention of claim 7 will be described with reference to the drawings. FIG. 6 is a cross-sectional view showing a method of manufacturing a circuit board according to a sixth embodiment in the order of steps.
2 is an organic gas containing a metal (a gas containing a metal),
33 is the decomposed organic component. In FIG. 6A, while flowing the metal-containing organic gas 32, the insulating material 6 is irradiated with the ultraviolet laser 7 through the mask 8 to process the concave pattern 1 and at the same time decompose the gas 32, Sectional drawing which shows the process of attaching 4 A of metal components to a process part, FIG.
(B) is a cross-sectional view showing a step of growing a metal to the surface of the insulating material 6 by electroless plating using the metal component 4A attached to the processed portion as a plating nucleus to form the conductor pattern 1A. FIG. 6 is a cross-sectional view in which formation of 1A is completed.
(C) is a cross-sectional view showing a step of forming a multilayer, the second layer is a layer in which holes are formed in the same step as described above and the holes are filled with conductors 3 to form conductive holes 2. The fourth layer is a layer in which the conductor pattern 1A is formed in the same process as described above, and the fourth layer is a layer in which the conductive holes 2 to be terminals are formed in the same process as described above.
【0072】次に動作について説明する。基板9上に絶
縁材6が塗布されている。金属を含有する有機ガス32
を導入しながら、マスク8を通して絶縁材6に紫外レー
ザ7を照射すると、絶縁材6上に凹状パターン1が形成
される。この時、ガス32の分子は解離し、有機成分3
3と金属成分4に分かれ、有機成分33は気化し、金属
成分4Aは凹状パターン1の加工部に吸着される(図6
(a))。この金属成分4Aをめっき核として、無電解
めっきを行う。ここで、金属成分4Aはめっき核となり
無電解めっきが可能となるのでめっき工程が簡略化す
る。さらに、金属成分4Aは凹状パターン1の加工部の
みに吸着するので凹状パターン1の凹部のみに選択的に
導体3を成長させることができる。絶縁材6の表面近傍
まで導体3形成を行うと、導体パターン1Aが形成され
た凹凸のない均一な層が形成される(図6(b))。前
記と同様の工程により絶縁材6を塗布し層間をつなぐ導
通穴2を有する均一な層を形成し、さらに次に、前記と
同様の工程により絶縁材6を塗布し、再び導体パターン
1Aを有する均一な層を形成し、さらに次に、前記と同
様の工程により絶縁材6を塗布し、端子となる導通穴2
を有する均一な層を形成すると、各層の表面が凹凸がな
く平坦であるため、安定して多層化された基板を製造す
ることができる(図6(c))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9. Organic gas containing metal 32
When the insulating material 6 is irradiated with the ultraviolet laser 7 through the mask 8 while introducing the above, the concave pattern 1 is formed on the insulating material 6. At this time, the molecules of the gas 32 are dissociated, and the organic component 3
3 and the metal component 4, the organic component 33 is vaporized, and the metal component 4A is adsorbed to the processed portion of the concave pattern 1 (FIG. 6).
(A)). Electroless plating is performed using this metal component 4A as a plating nucleus. Here, since the metal component 4A serves as a plating nucleus and enables electroless plating, the plating process is simplified. Furthermore, since the metal component 4A is adsorbed only on the processed portion of the concave pattern 1, the conductor 3 can be selectively grown only on the concave portion of the concave pattern 1. When the conductor 3 is formed up to the vicinity of the surface of the insulating material 6, a uniform layer having the conductor pattern 1A and no unevenness is formed (FIG. 6B). The insulating material 6 is applied by the same process as described above to form a uniform layer having the conduction hole 2 connecting the layers, and then the insulating material 6 is applied by the same process as described above and the conductor pattern 1A is provided again. A uniform layer is formed, and then, the insulating material 6 is applied by the same process as described above to form the conductive holes 2 to be terminals.
When a uniform layer having the above is formed, the surface of each layer is flat without unevenness, so that it is possible to stably manufacture a multilayered substrate (FIG. 6C).
【0073】またこの発明における金属を含有する有機
ガス32は、どの様な種類のものでもよいが、例えば、
Cr(CO)6 、Mo(CO)6 、W(CO)6 、(C
5 H5 )Fe、(C5 H5 )Ni、Al(CH3 )3 、
Zn(CH3 )3 、Cd(CH3 )2 、などを用いれ
ば、それぞれCr、Mo、W、Fe、Ni、Al、Z
n、Cdなどを付着させることができる。また有機ガス
でなくても金属成分を解離できれば、TiCl4 などで
もよい。また付着させる金属成分4Aは導体3と異なる
ものでもよい。The metal-containing organic gas 32 in the present invention may be of any kind.
Cr (CO) 6 , Mo (CO) 6 , W (CO) 6 , (C
5 H 5 ) Fe, (C 5 H 5 ) Ni, Al (CH 3 ) 3 ,
Zn (CH 3) 3, Cd (CH 3) 2, the like is used, each Cr, Mo, W, Fe, Ni, Al, Z
n, Cd, etc. can be attached. Further, TiCl 4 or the like may be used as long as the metal component can be dissociated even if it is not an organic gas. Further, the metal component 4A to be attached may be different from the conductor 3.
【0074】実施例7.請求項2および請求項8の発明
の一実施例を図について説明する。図7は、実施例6に
よる回路基板の製造方法を工程順に示す断面図であり、
図において、34は金属粒子を含有する絶縁材である。
図7(a)は、金属粒子4Bを混入した絶縁材34上
に、金属粒子4Bを含有しない絶縁材6を塗布する工
程、図7(b)はマスク8をとおし、絶縁材6に紫外レ
ーザ7を照射して、金属粒子4Bを混入しない絶縁材6
と金属粒子4Bを混入した絶縁材34を除去し、凹状パ
ターン1を加工すると同時に、絶縁材34中の金属粒子
4Bを加工部に露出させる工程を示す断面図、図7
(c)は加工部に露出した金属をめっき核として、導体
となる金属を無電解めっきで絶縁材6の表面まで成長さ
せ導体パターン1Aを形成する工程を示す断面図で、1
層目の導体パターン1A形成が完了した断面図、図7
(d)は多層化を行った工程を示す断面図であり、2層
目は前記と同様の工程で穴を形成して穴を導体3で埋め
て導通穴2を形成した層であり、3層目は前記と同様の
工程で導体パターン1Aを形成した層であり、4層目は
前記と同様の工程で端子となる導通穴2を形成した層で
ある。Example 7. An embodiment of the inventions of claims 2 and 8 will be described with reference to the drawings. 7A to 7D are cross-sectional views showing a method of manufacturing a circuit board according to a sixth embodiment in the order of steps,
In the figure, 34 is an insulating material containing metal particles.
7A is a step of applying the insulating material 6 not containing the metal particles 4B onto the insulating material 34 mixed with the metal particles 4B, and FIG. 7B is a process of passing the mask 8 through the mask 8 and applying an ultraviolet laser to the insulating material 6. Insulating material 6 that does not mix metal particles 4B by irradiating 7
7 is a cross-sectional view showing a step of removing the insulating material 34 mixed with the metal particles 4B and processing the concave pattern 1 and simultaneously exposing the metal particles 4B in the insulating material 34 to the processed portion.
(C) is a cross-sectional view showing a step of forming a conductor pattern 1A by growing a metal serving as a conductor to the surface of the insulating material 6 by electroless plating using the metal exposed in the processed portion as a plating nucleus.
FIG. 7 is a cross-sectional view in which formation of the conductor pattern 1A of the second layer is completed.
(D) is a cross-sectional view showing a step of forming a multilayer, and the second layer is a layer in which holes are formed in the same step as described above and the holes are filled with conductors 3 to form conductive holes 2. The fourth layer is a layer in which the conductor pattern 1A is formed in the same process as described above, and the fourth layer is a layer in which the conductive holes 2 to be terminals are formed in the same process as described above.
【0075】次に動作について説明する。金属粒子4B
を混入した絶縁材34に金属粒子4Bを混入しない絶縁
材6を塗布する(図7(a))。絶縁材6に、マスク8
を通して紫外レーザ7を照射すると、絶縁材6と絶縁材
34は除去され、凹状パターン1が形成される。この
時、絶縁材34中の金属粒子4Bは加工部上に露出する
(図7(b))。この金属成分4Bをめっき核として、
無電解めっきを行う。ここで、金属成分4Bはめっき核
となり、これによって無電解めっきが可能となるのでめ
っき工程が簡略化する。さらに、金属成分4Bは凹状パ
ターン1の加工部のみに突出するので凹状パターン1の
凹部のみに選択的に導体3を成長させることができる。
絶縁材6の表面近傍まで導体3の形成を行うと、導体パ
ターン1Aが形成された凹凸のない均一な層が形成され
る(図7(c))。さらに次に、前記と同様の工程によ
り絶縁材34と絶縁材6を塗布し層間をつなぐ導通穴2
を有する均一な層を形成し、さらに次に、前記と同様の
工程により絶縁材34と絶縁材6を塗布し、再び凹状パ
ターン1を有する均一な層を形成し、さらに次に、前記
と同様の工程により絶縁材34と絶縁材6を塗布し、端
子となる導通穴2を有する均一な層を形成すると、各層
の表面が凹凸のなく平坦であるため、安定して多層化さ
れた基板を製造することができる(図7(d))。Next, the operation will be described. Metal particle 4B
The insulating material 6 in which the metal particles 4B are not mixed is applied to the insulating material 34 in which the metal particles 4B are mixed (FIG. 7A). Insulating material 6 and mask 8
When the ultraviolet laser 7 is irradiated therethrough, the insulating material 6 and the insulating material 34 are removed and the concave pattern 1 is formed. At this time, the metal particles 4B in the insulating material 34 are exposed on the processed portion (FIG. 7B). Using this metal component 4B as a plating nucleus,
Perform electroless plating. Here, the metal component 4B serves as a plating nucleus, which enables electroless plating, thereby simplifying the plating process. Furthermore, since the metal component 4B projects only in the processed portion of the concave pattern 1, the conductor 3 can be selectively grown only in the concave portion of the concave pattern 1.
When the conductor 3 is formed up to the vicinity of the surface of the insulating material 6, a uniform layer having the conductor pattern 1A and no unevenness is formed (FIG. 7C). Next, the insulating material 34 and the insulating material 6 are applied by the same process as described above to connect the layers to each other to form the conduction hole 2.
A uniform layer having the concave pattern 1 is formed again by applying the insulating material 34 and the insulating material 6 by the same process as described above. When the insulating material 34 and the insulating material 6 are applied by the step of (1) to form a uniform layer having the conduction holes 2 to be terminals, the surface of each layer is flat without unevenness, so that a stable multilayered substrate can be obtained. It can be manufactured (FIG. 7 (d)).
【0076】またこの発明における金属粒子4Bは、ど
の様な種類のものでもよいが、例えば、Cr、Ni、A
l、Cu、などを用いればよい。混入する金属粒子4B
は導体3と異なるものでもよい。金属粒子4Bを混入さ
せる絶縁材34は特に限定するものではないが、ポリイ
ミドやエポキシ樹脂などでよい。The metal particles 4B in the present invention may be of any kind, for example, Cr, Ni, A
l, Cu, or the like may be used. Mixed metal particles 4B
May be different from the conductor 3. The insulating material 34 in which the metal particles 4B are mixed is not particularly limited, but polyimide or epoxy resin may be used.
【0077】実施例8.請求項9の発明の一実施例を図
について説明する。図8は、実施例8による回路基板の
製造方法を工程順に示す断面図である。図8(a)は絶
縁材6上に溶剤に可溶な樹脂12を塗布する工程を示す
断面図、図8(b)はマスク8をとおし、樹脂12に紫
外レーザ7を照射して、樹脂12と絶縁材6を除去し、
凹状パターン1を加工する工程を示す断面図、図8
(c)は加工部に蓄積された電荷5を利用して、付着さ
せた金属4を無電解めっきで絶縁材6の表面まで成長さ
せ導体パターン1Aを形成する工程を示す断面図、図8
(d)は樹脂12を溶剤で溶かし、凹状パターン1加工
中に発生し樹脂に付着した分解物13(不要物)を除去
する工程を示す断面図で、1層目の導体パターン1Aの
形成が完了した断面図、図8(e)は多層化を行った工
程を示す断面図であり、2層目は前記と同様の工程で穴
を形成して穴を導体3で埋めて導通穴2を形成した層で
あり、3層目は前記と同様の工程で導体パターン1Aを
形成した層であり、4層目は前記と同様の工程で端子と
なる導通穴2を形成した層である。Example 8. An embodiment of the invention of claim 9 will be described with reference to the drawings. 8A to 8D are cross-sectional views showing a method of manufacturing a circuit board according to the eighth embodiment in the order of steps. FIG. 8A is a cross-sectional view showing a step of applying a solvent-soluble resin 12 onto the insulating material 6, and FIG. 8B is a diagram showing the resin 12 irradiated with an ultraviolet laser 7 through a mask 8. 12 and insulating material 6 are removed,
Sectional drawing which shows the process of processing the concave pattern 1, FIG.
8C is a cross-sectional view showing a step of forming the conductor pattern 1A by growing the deposited metal 4 to the surface of the insulating material 6 by electroless plating by using the charge 5 accumulated in the processed portion.
(D) is a cross-sectional view showing a step of dissolving the resin 12 with a solvent and removing the decomposed material 13 (unnecessary material) generated during the processing of the concave pattern 1 and adhering to the resin. The completed cross-sectional view, FIG. 8E is a cross-sectional view showing the step of forming the multilayer structure, and the second layer is formed with a hole in the same step as described above and the hole is filled with the conductor 3 to form the conduction hole 2. The third layer is a layer in which the conductor pattern 1A is formed in the same step as described above, and the fourth layer is a layer in which the conductive hole 2 serving as a terminal is formed in the same step as described above.
【0078】次に動作について説明する。基板9上に絶
縁材6を塗布し、さらにその上に溶剤に可溶な樹脂12
を塗布する(図8(a))。樹脂12にマスク8を通し
て紫外レーザ7を照射する。マスク8により一部遮られ
て照射された紫外レーザ7は樹脂12と絶縁材6を除去
し、凹状パターン1を加工すると同時に、高い光子エネ
ルギーによって、加工部に電荷5が蓄積する。この時、
紫外レーザ7により加工する時に発生するすすなどの分
解物13が樹脂12上に付着する(図8(b))。電荷
5を利用して加工部に金属4を吸着させ、これをめっき
核として、凹状パターン1の凹部のみに導体3を成長さ
せることができる。また絶縁材6の表面近傍まで導体3
形成を行うと、導体パターン1Aが形成された凹凸のな
い均一な層が形成される(図8(c))。この後に、樹
脂12を溶剤で溶かし除去すると分解物13や付着した
金属またはめっき溶液などを絶縁材6上から完全に除去
できる。従って、絶縁材6上に分解物13の付着がな
く、表面が平坦な層が形成される(図8(d))。前記
と同様の工程により絶縁材6と樹脂12を塗布し層間を
つなぐ導通穴2を有する均一な層を形成し、さらに次
に、前記と同様の工程により絶縁材6と樹脂12を塗布
し、再び導体パターン1Aを有する均一な層を形成し、
さらに次に、前記と同様の工程により絶縁材6と樹脂1
2を塗布し、端子となる導通穴2を有する均一な層を形
成すると、各層の表面が凹凸がなく平坦であるため、安
定して多層化された基板を製造することができる(図8
(e))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9, and the resin 12 soluble in the solvent is further applied thereon.
Is applied (FIG. 8A). The resin 12 is irradiated with the ultraviolet laser 7 through the mask 8. The ultraviolet laser 7, which is partially shielded by the mask 8 and irradiated, removes the resin 12 and the insulating material 6 to process the concave pattern 1, and at the same time, the electric charge 5 is accumulated in the processed portion by high photon energy. This time,
Decomposition products 13 such as soot generated during processing by the ultraviolet laser 7 adhere to the resin 12 (FIG. 8B). The metal 4 is adsorbed to the processed portion by using the electric charge 5, and the conductor 3 can be grown only in the concave portion of the concave pattern 1 by using the metal 4 as a plating nucleus. In addition, the conductor 3 up to the surface of the insulating material 6
When it is formed, a uniform layer having no conductor pattern and having the conductor pattern 1A is formed (FIG. 8C). After that, if the resin 12 is dissolved and removed with a solvent, the decomposed product 13 and the adhered metal or plating solution can be completely removed from the insulating material 6. Therefore, the decomposition product 13 does not adhere to the insulating material 6 and a layer having a flat surface is formed (FIG. 8D). The insulating material 6 and the resin 12 are applied by the same process as the above to form a uniform layer having the conduction hole 2 connecting the layers, and then the insulating material 6 and the resin 12 are applied by the same process as the above. Forming a uniform layer again having the conductor pattern 1A,
Then, the insulating material 6 and the resin 1 are processed by the same steps as described above.
When 2 is applied to form a uniform layer having the conductive holes 2 that serve as terminals, the surface of each layer is flat without unevenness, so that a multilayer substrate can be stably manufactured (FIG. 8).
(E)).
【0079】この発明におけるめっき核は、樹脂12上
に形成されてもよいため、図16に示した従来の方法で
形成されてもよい。従って、紫外レーザ7で所望の電荷
5が蓄積されない場合は、図16の従来の方法でめっき
核を形成すればよい。そのため、材料は限定されない。Since the plating nuclei in the present invention may be formed on the resin 12, they may be formed by the conventional method shown in FIG. Therefore, when the desired charges 5 are not accumulated by the ultraviolet laser 7, the plating nuclei may be formed by the conventional method shown in FIG. Therefore, the material is not limited.
【0080】実施例9.請求項10の発明の一実施例を
図について説明する。図9は、実施例9による回路基板
の製造方法を工程順に示す断面図であり、図10は加工
に用いるレーザエネルギー密度とパルス当りの除去深さ
の関係において、絶縁材6と樹脂12の特性を示したグ
ラフである。図9において、12はあらかじめ絶縁材6
に塗布された吸収係数が高く溶剤に可溶な樹脂である。
図9(a)は絶縁材6上に吸収係数が高く溶剤に可溶な
樹脂12を塗布する工程を示す断面図、図9(b)はマ
スク8をとおし、樹脂12に図10におけるエネルギー
密度Aで紫外レーザ7を照射して、樹脂12を除去する
工程を示した断面図、図9(c)はマスク8をとおし、
絶縁材6に図10におけるエネルギー密度Bで紫外レー
ザ7を照射して、絶縁材6を除去して凹状パターン1を
形成する工程を示した断面図、図9(d)は加工部に蓄
積された電荷5を利用して付着させた金属4を無電解め
っきで絶縁材6の表面まで成長させ導体パターン1Aを
形成する工程を示す断面図、図9(e)は樹脂12を溶
剤で溶かし、凹状パターン1加工中に発生し樹脂12に
付着した分解物13を除去する工程を示す断面図で、1
層目の導体パターン1Aの形成が完了した断面図、図9
(f)は多層化を行った工程を示す断面図であり、2層
目は前記と同様の工程で穴を形成して穴を導体3で埋め
て導通穴2を形成した層であり、3層目は前記と同様の
工程で導体パターン1Aを形成した層であり、4層目は
前記と同様の工程で端子となる導通穴2を形成した層で
ある。Example 9. An embodiment of the invention of claim 10 will be described with reference to the drawings. FIG. 9 is a cross-sectional view showing the method of manufacturing a circuit board according to the ninth embodiment in the order of steps. FIG. 10 shows the characteristics of the insulating material 6 and the resin 12 in relation to the laser energy density used for processing and the removal depth per pulse. It is a graph showing. In FIG. 9, 12 is an insulating material 6 in advance.
It has a high absorption coefficient and is soluble in solvents.
9A is a cross-sectional view showing a step of applying a resin 12 having a high absorption coefficient and soluble in a solvent onto the insulating material 6, and FIG. 9B is a mask 8 through the mask 8 and the resin 12 has an energy density in FIG. FIG. 9C is a sectional view showing a step of removing the resin 12 by irradiating the ultraviolet laser 7 at A, and FIG.
A sectional view showing a step of irradiating the insulating material 6 with the ultraviolet laser 7 at the energy density B in FIG. 10 to remove the insulating material 6 to form the concave pattern 1, FIG. 9D is accumulated in the processed portion. 9E is a cross-sectional view showing a step of growing the metal 4 attached using the electric charge 5 to the surface of the insulating material 6 by electroless plating to form the conductor pattern 1A. FIG. FIG. 1 is a cross-sectional view showing a step of removing a decomposed product 13 generated during processing of the concave pattern 1 and attached to the resin 12.
FIG. 9 is a cross-sectional view in which formation of the conductor pattern 1A of the second layer is completed.
(F) is a cross-sectional view showing a step of forming a multilayer, the second layer is a layer in which holes are formed in the same step as described above and the holes are filled with conductors 3 to form conduction holes 2. The fourth layer is a layer in which the conductor pattern 1A is formed in the same process as described above, and the fourth layer is a layer in which the conductive holes 2 to be terminals are formed in the same process as described above.
【0081】次に動作について説明する。基板9上に絶
縁材6が塗布され、さらにその上に樹脂12が塗布され
る(図9(a))。まず、樹脂12にマスク8を通して
紫外レーザ7を絶縁材6が加工できないエネルギー密度
Aで照射する。この紫外レーザ7は絶縁材6を加工でき
ないのだから、樹脂12のみを除去する。この加工時に
すすなどの分解物13が発生し樹脂12上に付着する
(図9(b))。その後マスク8を通して紫外レーザ7
を絶縁材6が加工できるエネルギー密度Bで照射する。
この紫外レーザ7は絶縁材6を加工できるのだから、絶
縁材6を除去し、凹状パターン1を加工する。従って、
樹脂12を透過した紫外レーザ7によりさきに絶縁材6
が加工されて、分解ガスにより樹脂12が膨れたり、樹
脂12と絶縁材6の界面に分解物13が埋め込まれたり
せず、完全に樹脂12を除去することができ、所望の凹
状パターン1が加工ができる。また同時に、高い光子エ
ネルギーによって、電荷5が蓄積する(図9(c))。
この電荷5を利用して加工部に金属4を吸着させ、これ
をめっき核として、凹状パターンの凹部のみに導体3を
成長させることができる。絶縁材6の表面近傍まで導体
3の形成を行うと、導体パターン1Aが形成された凹凸
のない均一な層が形成される(図9(d))。またこの
後に、樹脂12を溶剤で溶かし除去すると分解物13や
付着した金属またはめっき溶液などを絶縁材13上から
完全に除去できる。従って、絶縁材6上に分解物13の
付着がなく、表面が平坦な層が形成される(図9
(e))。前記と同様の工程により絶縁材6と樹脂12
を塗布し層間をつなぐ導通穴2を有する均一な層を形成
し、さらに次に、前記と同様の工程により絶縁材6と樹
脂12を塗布し、再び導体パターン1Aを有する均一な
層を形成し、さらに次に、前記と同様の工程により絶縁
材6と樹脂12を塗布し、端子となる導通穴2を有する
均一な層を形成すると、各層の表面が凹凸がなく平坦で
あるため、安定して多層化された基板を製造することが
できる(図9(f))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9, and the resin 12 is further applied thereon (FIG. 9A). First, the resin 12 is irradiated with the ultraviolet laser 7 through the mask 8 at an energy density A at which the insulating material 6 cannot be processed. Since this ultraviolet laser 7 cannot process the insulating material 6, only the resin 12 is removed. During this processing, decomposition products 13 such as soot are generated and adhere to the resin 12 (FIG. 9B). After that, the ultraviolet laser 7 is passed through the mask 8.
Is irradiated with an energy density B capable of processing the insulating material 6.
Since this ultraviolet laser 7 can process the insulating material 6, the insulating material 6 is removed and the concave pattern 1 is processed. Therefore,
The insulating material 6 was previously formed by the ultraviolet laser 7 transmitted through the resin 12.
Is processed, and the resin 12 is not swollen by the decomposition gas and the decomposition product 13 is not embedded in the interface between the resin 12 and the insulating material 6, and the resin 12 can be completely removed, and the desired concave pattern 1 is formed. Can be processed. At the same time, the charge 5 is accumulated due to the high photon energy (FIG. 9C).
By utilizing this electric charge 5, the metal 4 is adsorbed to the processed portion, and the conductor 3 can be grown only in the concave portion of the concave pattern by using this as the plating nucleus. When the conductor 3 is formed up to the vicinity of the surface of the insulating material 6, a uniform layer having the conductor pattern 1A and no unevenness is formed (FIG. 9D). Further, after that, if the resin 12 is dissolved in a solvent and removed, the decomposed product 13 and the adhered metal or plating solution can be completely removed from the insulating material 13. Therefore, the decomposition product 13 does not adhere to the insulating material 6, and a layer having a flat surface is formed (FIG. 9).
(E)). The insulating material 6 and the resin 12 are subjected to the same steps as described above.
Is applied to form a uniform layer having a conduction hole 2 connecting the layers, and then the insulating material 6 and the resin 12 are applied by the same steps as described above to form a uniform layer having the conductor pattern 1A again. Then, when the insulating material 6 and the resin 12 are applied by the same process as described above to form a uniform layer having the conductive holes 2 to serve as terminals, the surface of each layer is flat without unevenness, and thus stable. Thus, a multi-layered substrate can be manufactured (FIG. 9F).
【0082】この発明において、絶縁材6にポリイミド
を用いた場合に用いる吸収係数の高い樹脂12として
は、例えばポリスチレンがあり、溶剤としては、テトラ
ヒドロフラン、ケトン類、トルエン、ベンゼンなどを使
用することができる。テトラヒドロフランに溶かしたポ
リスチレン溶液をスピンコータで数千オングストローム
から数ミクロン程度の厚さでポリイミド上に塗布し、エ
ネルギー密度0.02〜0.3J/cm2 程度のエネル
ギー密度Aで紫外レーザ4を照射して、樹脂12を完全
に除去し、かかる後にエネルギー密度0.4〜1J/c
m2 程度のエネルギー密度Bでポリイミドを除去すると
所望の凹状パターン1が加工でき、これに導体3を埋め
込んだ後に樹脂12を除去すると完全に分解物13のな
い回路基板が得られた。またこの他、種々の絶縁材6に
対し、例えば、適正な溶剤に溶かされたスチレン、ウレ
タン、アミド、テレフタレート、フェニレンサルファイ
ド、スルフォン系の樹脂12を用いると、特に紫外レー
ザ7の吸収係数が高いため、樹脂12を透過した紫外レ
ーザ7が絶縁材6を除去することなく、樹脂12を除去
できる。また樹脂12を除去するエネルギー密度は絶縁
材6のしきい値エネルギー密度より低いことが好ましい
が、吸収係数の高い樹脂12ではしきい値エネルギー密
度以上でも、樹脂12を透過するエネルギーが小さいた
め、樹脂12を絶縁材6のしきい値以上のエネルギー密
度で加工してもよく、またエネルギー密度Aとエネルギ
ー密度Bは同じであってもよい。In the present invention, polystyrene 12 is used as the resin 12 having a high absorption coefficient when polyimide is used as the insulating material 6, and tetrahydrofuran, ketones, toluene, benzene or the like is used as the solvent. it can. A polystyrene solution dissolved in tetrahydrofuran is applied on a polyimide with a thickness of about several thousand angstroms to several microns by a spin coater, and the ultraviolet laser 4 is irradiated with an energy density A of energy density 0.02 to 0.3 J / cm 2. Completely remove the resin 12, and after that, the energy density is 0.4 to 1 J / c.
When the polyimide was removed with an energy density B of about m 2 , the desired concave pattern 1 could be processed, and when the resin 12 was removed after embedding the conductor 3 in this, a circuit board completely free of decomposed products 13 was obtained. Further, in addition to these, for example, when various resins such as styrene, urethane, amide, terephthalate, phenylene sulfide, and sulfone resin 12 dissolved in an appropriate solvent are used for various insulating materials 6, the absorption coefficient of the ultraviolet laser 7 is particularly high. Therefore, the ultraviolet laser 7 that has passed through the resin 12 can remove the resin 12 without removing the insulating material 6. Further, the energy density for removing the resin 12 is preferably lower than the threshold energy density of the insulating material 6, but since the resin 12 having a high absorption coefficient has a small energy permeating through the resin 12 even if it is equal to or higher than the threshold energy density, The resin 12 may be processed with an energy density equal to or higher than the threshold value of the insulating material 6, and the energy density A and the energy density B may be the same.
【0083】実施例10.請求項11の発明の一実施例
を図について説明する。図11は、実施例10による回
路基板の製造方法を工程順に示す断面図であり、図にお
いて、15は針状電極、16はガス導入口、17は帯電
させたガス、18は帯電させたガスにより蓄積された電
荷である。図11(a)は絶縁材6上に溶剤に可溶な樹
脂12を塗布する工程を示す断面図、図11(b)は、
針状電極15間に導入し負に帯電させたガス17を樹脂
12上に流しながら、マスク8をとおして樹脂12上に
紫外レーザ7を照射して、樹脂12と絶縁材6を除去
し、凹状パターン1を加工すると同時に、加工部に負の
電荷18を蓄積させる工程を示す断面図、図11(c)
は加工部に蓄積された負電荷18を利用して、金属触媒
液、あるいは無電解めっき液の金属イオンM+ を還元さ
せて、加工部に金属を付着させ、これを絶縁材6の表面
まで成長させ導体パターン1Aを形成する工程を示す断
面図、図11(d)は樹脂12を溶剤で溶かし、凹状パ
ターン1加工中に発生し樹脂12に付着した分解物13
を除去する工程を示す断面図で、1層目の導体パターン
1Aの形成が完了した断面図、図11(e)は多層化を
行った工程を示す断面図であり、2層目は前記と同様の
工程で穴を形成して穴を導体3で埋めて導通穴2を形成
した層であり、3層目は前記と同様の工程で導体パター
ン1Aを形成した層であり、4層目は前記と同様の工程
で端子となる導通穴2を形成した層である。Example 10. An embodiment of the invention of claim 11 will be described with reference to the drawings. FIG. 11 is a cross-sectional view showing a method of manufacturing a circuit board according to Example 10 in the order of steps. In the figure, 15 is a needle electrode, 16 is a gas inlet, 17 is a charged gas, and 18 is a charged gas. Is the charge accumulated by. FIG. 11A is a sectional view showing a step of applying a solvent-soluble resin 12 onto the insulating material 6, and FIG.
An ultraviolet laser 7 is radiated onto the resin 12 through the mask 8 while flowing the negatively charged gas 17 introduced between the needle electrodes 15 onto the resin 12 to remove the resin 12 and the insulating material 6. FIG. 11C is a cross-sectional view showing the step of processing the concave pattern 1 and at the same time, accumulating the negative charges 18 in the processed part.
Uses the negative charge 18 accumulated in the processed portion to reduce the metal ion M + of the metal catalyst solution or the electroless plating solution to adhere the metal to the processed portion, and to bring this to the surface of the insulating material 6. FIG. 11D is a cross-sectional view showing a step of growing the conductive pattern 1A, and FIG. 11D shows a decomposed product 13 generated during the processing of the concave pattern 1 by dissolving the resin 12 with a solvent and adhering to the resin 12.
Is a cross-sectional view showing a step of removing the conductive pattern 1A of the first layer is completed, FIG. 11 (e) is a cross-sectional view showing a step of multilayering, and the second layer is A layer in which a hole is formed in the same process and the conductive hole 3 is filled with the conductor 3 to form the conduction hole 2, a third layer is a layer in which the conductor pattern 1A is formed in the same process as described above, and a fourth layer is This is a layer in which the conductive holes 2 to be terminals are formed in the same process as described above.
【0084】次に動作について説明する。基板9上に絶
縁材6を塗布し、さらにその上に溶剤に可溶な樹脂12
を塗布する(図11(a))。直流電圧を印加した針状
電極15間にガス導入口16からガスを流し、放電をお
こすことによってガスを負に帯電させ、この帯電させた
ガス17を樹脂12表面に送り込みながら、マスク8を
通して紫外レーザ7を樹脂12上に照射すると、樹脂1
2と絶縁材6は除去され、凹状パターン1が加工され
る。同時に、ガス17の負電荷18が加工部及び樹脂1
2表面に蓄積し、負に帯電する。この時、紫外レーザ7
により発生するすすなどの分解物13が樹脂12上に付
着する(図11(b))。これに金属イオンM+ を含ん
だ溶液に接触させると金属イオンM+ はマイナスイオン
に引っ張られ、速いめっき速度で還元されて金属とな
り、無電解めっきが可能となる。従って、凹状パターン
1の凹部に導体3を成長させることができる。絶縁材6
の表面近傍まで導体3を形成すると、導体パターン1A
が形成された凹凸のない均一な層が形成される(図11
(c))。またこの後に、樹脂12を溶剤で溶かし除去
すると分解物13や余分に付着した金属などを絶縁材6
上から除去できる。従って、絶縁材6上に分解物13の
付着がなく、表面が平坦な層が形成される(図11
(d))。前記と同様の工程により絶縁材6と樹脂12
を塗布し層間をつなぐ導通穴2を有する均一な層を形成
し、さらに次に、前記と同様の工程により絶縁材6と樹
脂12を塗布し、再び導体パターン1Aを有する均一な
層を形成し、さらに次に、前記と同様の工程により絶縁
材6と樹脂12を塗布し、端子となる導通穴2を有する
均一な層を形成すると、各層の表面が凹凸がなく平坦で
あるため、安定して多層化された基板を製造することが
できる(図11(e))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9, and the resin 12 soluble in the solvent is further applied thereon.
Is applied (FIG. 11A). Gas is flowed from the gas inlet 16 between the needle-shaped electrodes 15 to which a DC voltage is applied, and the gas is negatively charged by causing discharge, and while the charged gas 17 is fed to the surface of the resin 12, ultraviolet rays are passed through the mask 8. When the resin 7 is irradiated with the laser 7, the resin 1
2 and the insulating material 6 are removed, and the concave pattern 1 is processed. At the same time, the negative charge 18 of the gas 17 causes the processed portion and the resin 1
2 Accumulates on the surface and becomes negatively charged. At this time, the ultraviolet laser 7
Decomposition products 13 such as soot generated by the above process adhere to the resin 12 (FIG. 11B). When this is brought into contact with a solution containing the metal ion M + , the metal ion M + is pulled by the negative ion and reduced at a high plating rate to become a metal, enabling electroless plating. Therefore, the conductor 3 can be grown in the concave portion of the concave pattern 1. Insulation 6
When the conductor 3 is formed up to near the surface of the
A uniform layer having no irregularities is formed (FIG. 11).
(C)). After that, if the resin 12 is dissolved in a solvent and removed, the decomposed material 13 and excess metal attached to the insulating material 6
Can be removed from above. Therefore, the decomposition product 13 does not adhere to the insulating material 6, and a layer having a flat surface is formed (FIG. 11).
(D)). The insulating material 6 and the resin 12 are subjected to the same steps as described above.
Is applied to form a uniform layer having a conduction hole 2 connecting the layers, and then the insulating material 6 and the resin 12 are applied by the same steps as described above to form a uniform layer having the conductor pattern 1A again. Then, when the insulating material 6 and the resin 12 are applied by the same process as described above to form a uniform layer having the conductive holes 2 to serve as terminals, the surface of each layer is flat without unevenness, and thus stable. Thus, a multi-layered substrate can be manufactured (FIG. 11E).
【0085】この発明において、針状電極15などに印
加する電圧は交流でもよく、負に帯電したガス17のみ
を取り出せばよい。また加工部の帯電が安定して十分大
きく無電解めっき液中の金属イオンをそのまま付着する
ことができれば、金属触媒を用いず、無電解めっき液に
浸積すればよい。紫外レーザ7による帯電により、加工
部のみに選択的にめっきが行える場合には特に樹脂12
は必要としない。また紫外レーザ7を用いない加工部の
めっき核形成工程にも利用でき、パターン形状も凹に限
定したものではない。また放電方法は他の方法でもよ
く、電極形状も針に限ったものではない。またガスは電
子を付着しやすいものならなおよく、例えばN2 、O
2 、SF6 などのガス、あるいはこれらを含有するガス
が好ましい。In the present invention, the voltage applied to the needle electrode 15 or the like may be alternating current, and only the negatively charged gas 17 may be taken out. Further, if the processed part is stably charged and the metal ions in the electroless plating solution can be adhered as they are, it may be immersed in the electroless plating solution without using a metal catalyst. When the plating can be selectively performed only on the processed portion by charging with the ultraviolet laser 7, the resin 12
Does not need. Further, the pattern shape is not limited to the concave shape, and it can be used for the plating nucleus forming step of the processed portion without using the ultraviolet laser 7. Further, the discharging method may be another method, and the electrode shape is not limited to the needle. Further, the gas is more preferable if it can easily attach electrons, for example, N 2 or O.
2 , gases such as SF 6 and gases containing these are preferable.
【0086】実施例11.請求項12の発明の一実施例
を図について説明する。図12は、実施例11による回
路基板の製造方法を工程順に示す断面図であり、図にお
いて、19は負電極、20は正電極、21はパルス発生
器、22は電子である。図12(a)は絶縁材6上に溶
剤に可溶な樹脂12を塗布する工程を示す断面図、図1
2(b)は、樹脂12上に紫外レーザ7を照射して、樹
脂12と絶縁材6を除去し、凹状パターン1を加工する
工程を示す断面図、図12(c)は樹脂12上部、およ
び絶縁材6下部にそれぞれ設置された負電極19、およ
び正電極20に、パルス発生器21により直流のパルス
電圧を印加し、電極19,20間を放電させ負電極19
から電子22を放出させて、樹脂12表面および加工部
を負に帯電させる工程を示す断面図、図12(d)は蓄
積された負電荷を利用して、金属触媒液、あるいは無電
解めっき液の金属イオンを還元させて、加工部に付着さ
せ、これを絶縁材6の表面まで成長させ導体パターン1
Aを形成する工程を示す断面図、図12(e)は樹脂1
2を溶剤で溶かし、凹状パターン1加工中に発生し樹脂
12上に形成された導体3を除去する工程を示す断面図
で、1層目の導体パターン1Aの形成が完了した断面
図、図12(f)は多層化を行った工程を示す断面図で
あり、2層目は前記と同様の工程で穴を形成して穴を導
体3で埋めて導通穴2を形成した層であり、3層目は前
記と同様の工程で導体パターン1Aを形成した層であ
り、4層目は前記と同様の工程で端子となる導通穴2を
形成した層である。Example 11. An embodiment of the invention of claim 12 will be described with reference to the drawings. FIG. 12 is a cross-sectional view showing a method of manufacturing a circuit board according to the eleventh embodiment in the order of steps, in which 19 is a negative electrode, 20 is a positive electrode, 21 is a pulse generator, and 22 is an electron. FIG. 12A is a sectional view showing a step of applying a solvent-soluble resin 12 onto the insulating material 6, FIG.
2B is a cross-sectional view showing a step of irradiating the resin 12 with an ultraviolet laser 7 to remove the resin 12 and the insulating material 6 and process the concave pattern 1, and FIG. 12C is an upper portion of the resin 12. A DC pulse voltage is applied by the pulse generator 21 to the negative electrode 19 and the positive electrode 20, which are respectively installed under the insulating material 6 to discharge between the electrodes 19 and 20 to cause the negative electrode 19 to discharge.
FIG. 12D is a cross-sectional view showing a process of discharging electrons 22 from the substrate to negatively charge the surface of the resin 12 and the processed portion. FIG. 12D shows a metal catalyst solution or an electroless plating solution utilizing the accumulated negative charge. Of the metal pattern of the conductor pattern 1 is reduced and adhered to the processed portion, and this is grown to the surface of the insulating material 6.
12E is a cross-sectional view showing the step of forming A, and FIG.
12 is a cross-sectional view showing a step of dissolving 2 in a solvent and removing the conductor 3 formed on the resin 12 that occurs during processing of the concave pattern 1; FIG. (F) is a cross-sectional view showing a step of forming a multilayer, the second layer is a layer in which holes are formed in the same step as described above and the holes are filled with conductors 3 to form conduction holes 2. The fourth layer is a layer in which the conductor pattern 1A is formed in the same process as described above, and the fourth layer is a layer in which the conductive holes 2 to be terminals are formed in the same process as described above.
【0087】次に動作について説明する。基板9上に絶
縁材6を塗布し、さらにその上に溶剤に可溶な樹脂12
を塗布する(図12(a))。マスク8を通して紫外レ
ーザ7を樹脂12に照射すると、樹脂12と絶縁材6が
除去され凹状パターン1が形成される。同時に加工部に
電荷5が蓄積される。さらに、すすなどの分解物13が
樹脂12上に付着する(図12(b))。次に、樹脂1
2上部および絶縁材6下部にそれぞれ負電極19および
正電極20を設置し、パルス発生器21により直流のパ
ルス電圧を印加すると、電極19,20間が放電し、負
電極19から電子22が放出され、樹脂12表面および
加工部は負に帯電する(図12(c))。これに金属イ
オンを接触させると、安定して金属に還元させることが
できるとともに、速い速度で還元でき、金属を付着させ
ることができる。これを無電解めっき液に浸積すると、
導体3を形成することができる(図12(d))。さら
に導体3の形成の後、溶剤に浸積させることによって、
所望のパターン以外の部分に形成されためっき3は樹脂
12とともに取り去ることができ、凹凸のない層が形成
できる(図12(e))。前記と同様の工程により絶縁
材6と樹脂12を塗布し層間をつなぐ導通穴2を有する
均一な層を形成し、さらに次に、前記と同様の工程によ
り絶縁材6と樹脂12を塗布し、再び導体パターン1A
を有する均一な層を形成し、さらに次に、前記と同様の
工程により絶縁材6と樹脂12を塗布し、端子となる導
通穴2を有する均一な層を形成すると、各層の表面が凹
凸がなく平坦であるため、安定して多層化された基板を
製造することができる(図12(f))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9, and the resin 12 soluble in the solvent is further applied thereon.
Is applied (FIG. 12A). When the resin 12 is irradiated with the ultraviolet laser 7 through the mask 8, the resin 12 and the insulating material 6 are removed and the concave pattern 1 is formed. At the same time, the electric charge 5 is accumulated in the processed portion. Further, decomposition products 13 such as soot adhere to the resin 12 (FIG. 12 (b)). Next, resin 1
2 When the negative electrode 19 and the positive electrode 20 are installed on the upper part and the lower part of the insulating material 6, respectively, and when a pulse voltage of DC is applied by the pulse generator 21, the electrodes 19 and 20 are discharged, and the electron 22 is emitted from the negative electrode 19. Then, the surface of the resin 12 and the processed portion are negatively charged (FIG. 12C). By bringing this into contact with a metal ion, the metal can be stably reduced, and at the same time, the metal can be attached at a high speed. When immersed in electroless plating solution,
The conductor 3 can be formed (FIG. 12 (d)). Further, after forming the conductor 3, by immersing in the solvent,
The plating 3 formed on a portion other than the desired pattern can be removed together with the resin 12 to form a layer having no unevenness (FIG. 12 (e)). The insulating material 6 and the resin 12 are applied by the same process as the above to form a uniform layer having the conduction hole 2 connecting the layers, and then the insulating material 6 and the resin 12 are applied by the same process as the above. Conductor pattern 1A again
When a uniform layer having a conductive hole 2 to be a terminal is formed by applying the insulating material 6 and the resin 12 by the same process as described above to form a uniform layer having a conductive hole 2 as a terminal, the surface of each layer becomes uneven. Since it is not flat, it is possible to stably manufacture a multilayered substrate (FIG. 12F).
【0088】この発明において、電極19,20間のパ
ルス電圧は絶縁破壊が起きず、所望の帯電が得られるも
のなら特に限定するものではないが、数ボルト〜数キロ
ボルト程度が好ましい。また、電極19,20間に印加
する電圧はパルスでなくてもよい。さらに、加工部に蓄
積される電荷が安定して充分大きい場合には無電解めっ
き液中の金属イオンをそのまま成長させてもよい。また
紫外レーザ7を用いない加工部のめっき核形成工程にも
利用でき、パターン形状も凹に限定したものではない。
また電極19,20形状は平板でもよくパターン状のも
のでもよい。In the present invention, the pulse voltage between the electrodes 19 and 20 is not particularly limited as long as dielectric breakdown does not occur and desired charge can be obtained, but is preferably about several volts to several kilovolts. Moreover, the voltage applied between the electrodes 19 and 20 does not need to be a pulse. Furthermore, when the electric charge accumulated in the processed portion is stable and sufficiently large, the metal ions in the electroless plating solution may be grown as they are. Further, the pattern shape is not limited to the concave shape, and it can be used for the plating nucleus forming step of the processed portion without using the ultraviolet laser 7.
The shape of the electrodes 19 and 20 may be flat or patterned.
【0089】実施例12.請求項13の発明の一実施例
を図について説明する。図13は、実施例12による気
泡の成長を防止するめっき方法を工程順を示す断面図で
あり、図において、23は気体を除去するためのバー、
24はめっき液中の金属イオンの還元反応に伴い発生す
る水素などの気泡である。図13(a)は絶縁材6の凹
部にめっきを行う際に、めっき液に浸積する間絶縁材3
上のバー23を振動、あるいは移動させることを示す断
面図、13(b)はめっきが絶縁材3表面まで成長する
工程を示す断面図である。Example 12 An embodiment of the invention of claim 13 will be described with reference to the drawings. FIG. 13 is a cross-sectional view showing the order of steps in a plating method for preventing bubble growth according to Example 12, in which 23 is a bar for removing gas,
24 is a bubble such as hydrogen generated along with the reduction reaction of the metal ion in the plating solution. FIG. 13A shows the insulating material 3 during immersion in the plating solution when plating the concave portion of the insulating material 6.
13B is a cross-sectional view showing vibration or movement of the upper bar 23, and FIG. 13B is a cross-sectional view showing a process in which plating grows up to the surface of the insulating material 3.
【0090】次に動作について説明する。基板9上に絶
縁材6を塗布し、絶縁材6に凹部を形成する。この凹部
にめっき核を付着させ、めっき液に浸積する。めっき工
程の間、還元により水素などの気体が発生し気泡24と
なり凹部の側壁に沿って上昇するが、絶縁材6上部に設
置されたバー23を振動あるいは移動させることによ
り、機械的に上縁部に集まった気泡24を除去して、常
に絶縁材6表面から逃がすことができる。そのため、凹
部を覆いつくす気泡に成長することを防止でき、かつめ
っき液が凹部に回り込むことができるため、微細な部分
でもめっきを安定して成長させることができる(図13
(a))。導体3を絶縁材6の表面まで成長させて、凹
部に導体3を埋め込んだ凹凸のない均一な層が形成でき
る(図13(b))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9 to form a recess in the insulating material 6. The plating nuclei are attached to the recesses and immersed in the plating solution. During the plating process, gas such as hydrogen is generated by the reduction and becomes bubbles 24 and rises along the side wall of the recess. However, by vibrating or moving the bar 23 installed above the insulating material 6, the upper edge is mechanically increased. The bubbles 24 gathered in the portion can be removed so that they can always escape from the surface of the insulating material 6. Therefore, it is possible to prevent the bubbles from growing up to cover the recesses, and since the plating solution can flow around the recesses, it is possible to stably grow the plating even in a fine portion (FIG. 13).
(A)). By growing the conductor 3 up to the surface of the insulating material 6, it is possible to form a uniform layer having no irregularities in which the conductor 3 is embedded in the recess (FIG. 13B).
【0091】またこの発明において、めっきは無電解め
っき電解めっきでもよい。まためっっきが絶縁上を過度
に成長した場合には研磨などで削ってもよい。バー23
を砥石にし研磨が行えるようにしてもよい。また凹部は
穴でもパターンでもよい。In the present invention, the plating may be electroless plating or electrolytic plating. Further, when the plating grows excessively on the insulation, it may be removed by polishing or the like. Bar 23
May be used as a grindstone so that polishing can be performed. The recess may be a hole or a pattern.
【0092】実施例13.請求項14の発明の一実施例
を図について説明する。図14は、実施例13による過
度の成長を防止するめっき方法を工程順に示す断面図で
あり、図において、25は絶縁材上に設置された気体を
除去するための陽極となるバー、26は電源である。図
14(a)は絶縁材6に加工された深さの異なる凹部1
02a,102bに電解めっきを行う際の断面図で、め
っき液に浸積する間絶縁材6上の陽極バー25を振動、
あるいは移動させることを示す基板の断面図、14
(b)は凹部102aにおいてめっきが絶縁材6表面ま
で成長したことを示す断面図、14(c)は凹部102
bにおいてもめっきが絶縁材表面まで成長したことを示
す断面図である。Example 13. An embodiment of the invention of claim 14 will be described with reference to the drawings. FIG. 14 is a cross-sectional view showing a plating method for preventing excessive growth according to Example 13 in the order of steps, in which 25 is a bar which serves as an anode for removing gas provided on an insulating material, and 26 is a bar. Power. FIG. 14 (a) shows a recess 1 formed in the insulating material 6 and having different depths.
02a, 102b is a cross-sectional view when performing electrolytic plating, in which the anode bar 25 on the insulating material 6 is vibrated while being immersed in the plating solution,
Alternatively, a cross-sectional view of the substrate showing that it is moved, 14
14B is a cross-sectional view showing that the plating has grown to the surface of the insulating material 6 in the recess 102a, and FIG. 14C is the recess 102.
FIG. 7B is a cross-sectional view showing that plating has grown to the surface of the insulating material also in b.
【0093】次に動作について説明する。基板9上に絶
縁材6を塗布する。絶縁材6に異なる深さの凹部102
a,102bを形成する。凹部102a,102bに、
あらかじめ無電解めっきを行ったあと、凹部を陰極と
し、絶縁材6上部に設置されたバー25を陽極として電
解めっきを行うと、めっき液中で起こる還元反応により
水素などの気体が発生して気泡24となる。しかしなが
ら、陽極からなるバー25を振動あるいは移動させるこ
とにより、気泡24を常に絶縁材6表面から逃がすこと
ができるため、気泡24が凹部102a,102bを覆
いつくすまで成長することを防止でき、めっき液を凹部
に回り込ませることができる。従って、微細な部分でも
めっきを安定して行うことができる(図14(a))。
さらに、陰極となる凹部102a,102b上に成長し
た金属3は、陽極からなるバー25にぶつかると、めっ
き液を介さず電流が流れるためめっきはそれ以上成長し
なくなるため、絶縁材表面から突出した過度のめっき成
長を防止できる。またこの図に示すように、凹部102
a,102bが深さが異なる場合には、深さごとに配線
を分け、並列につないでおくと浅い凹部102aが短絡
しても(図14(b))、引続き深い凹部102bには
金属3が成長し、最後にすべての凹部102a,102
bにおいて、絶縁材6表面近傍までの導体3形成が可能
となり、凹凸のない均一な層が形成できる(図14
(c))。Next, the operation will be described. The insulating material 6 is applied on the substrate 9. Recesses 102 having different depths in the insulating material 6
a and 102b are formed. In the recesses 102a and 102b,
When electroless plating is performed in advance and electrolytic plating is performed using the recessed portion as a cathode and the bar 25 provided above the insulating material 6 as an anode, a gas such as hydrogen is generated due to a reduction reaction occurring in the plating solution and bubbles are generated. 24. However, by vibrating or moving the bar 25 made of an anode, the bubbles 24 can be always escaped from the surface of the insulating material 6. Therefore, it is possible to prevent the bubbles 24 from growing until they cover the recesses 102a and 102b, and the plating solution. Can go around the recess. Therefore, the plating can be stably performed even on a fine portion (FIG. 14 (a)).
Furthermore, when the metal 3 grown on the concave portions 102a and 102b serving as the cathode collides with the bar 25 serving as the anode, a current flows without passing through the plating solution, and the plating does not grow any more, so that it protrudes from the surface of the insulating material. It is possible to prevent excessive plating growth. Further, as shown in this figure, the recess 102
When the depths of a and 102b are different from each other, if the wiring is divided for each depth and connected in parallel, even if the shallow recess 102a is short-circuited (FIG. 14 (b)), the metal 3 is still present in the deep recess 102b. Grows and finally all the recesses 102a, 102
In b, the conductor 3 can be formed up to the vicinity of the surface of the insulating material 6, and a uniform layer without unevenness can be formed (FIG. 14).
(C)).
【0094】この発明において、凹部は穴でもパターン
でもよい。陽極からなるバー25は平板でもよく、櫛状
でもよい。In the present invention, the recess may be a hole or a pattern. The bar 25 made of an anode may be a flat plate or a comb.
【0095】[0095]
【発明の効果】以上のように、請求項1の発明によれ
ば、絶縁材に凹状パターンまたは穴を形成し、その凹部
を導体で埋め込むように構成したので、凹凸のない層が
形成でき回路層が平坦化できることによって多層化が容
易にできるとともに、回路基板の信頼性が高まる効果が
ある。As described above, according to the first aspect of the present invention, since the concave pattern or hole is formed in the insulating material and the concave portion is filled with the conductor, a layer without unevenness can be formed and the circuit can be formed. Since the layers can be flattened, the layers can be easily formed and the reliability of the circuit board can be improved.
【0096】請求項2の発明によれば、金属粒子を含有
する絶縁材に紫外レーザを照射して凹状パターンあるい
は穴を加工して、凹部の表面に金属粒子が露出させ、こ
れによりまたはさらに電解めっきの併用により導体を析
出させるように構成したので、選択的にめっきが可能で
めっき工程が簡略化できる効果がある。According to the second aspect of the present invention, the insulating material containing the metal particles is irradiated with an ultraviolet laser to process the concave pattern or the holes to expose the metal particles on the surface of the concave portion, and thereby the metal particles are further electrolyzed. Since the conductor is deposited by the combined use of plating, selective plating is possible and the plating process can be simplified.
【0097】請求項3の発明によれば、プラズマエッチ
ングにより絶縁材に凹状パターンまたは穴を形成し、そ
の凹部を導体で埋め込むように構成したので、凹凸のな
い層が形成でき回路層が平坦化できることによって多層
化が容易にできるとともに、回路基板の信頼性が高まる
効果がある。According to the third aspect of the invention, since the concave pattern or hole is formed in the insulating material by plasma etching and the concave portion is filled with the conductor, a layer without unevenness can be formed and the circuit layer is flattened. By doing so, it is possible to easily form a multilayer structure and to improve the reliability of the circuit board.
【0098】請求項4の発明によれば、紫外レーザ照射
により絶縁材を除去加工して凹状パターンまたは穴を形
成すると同時に、凹部に正あるいは負の電荷を蓄積させ
るので、これを負あるいは正の金属触媒液に浸積するこ
とによって凹部のみに金属を付着させ、これにより無電
解めっきまたはさらに電解めっきの併用により導体を成
長させるように構成したので、めっき工程が簡略化でき
る効果がある。According to the fourth aspect of the present invention, the insulating material is removed by the ultraviolet laser irradiation to form the concave pattern or the hole, and at the same time, the positive or negative electric charge is accumulated in the concave portion. Since the metal is adhered only to the concave portion by being immersed in the metal catalyst solution, and the conductor is grown by the electroless plating or the combined use of the electrolytic plating, the plating process can be simplified.
【0099】請求項5の発明によれば、パターンの異な
る第一のマスクと第二のマスクを用いて紫外レーザ照射
することにより異なる深さをもつ凹状パターンまたは穴
を形成するように構成したので、導体パターンと導通穴
を同時に加工でき工程を簡略化できるとともに、パター
ン幅を変えずに深さを変えて電気抵抗の異なる導体パタ
ーンを作製することができるため小形化が可能になる効
果がある。According to the fifth aspect of the present invention, the first mask and the second mask having different patterns are used to irradiate with an ultraviolet laser to form concave patterns or holes having different depths. , The conductor pattern and the conduction hole can be processed at the same time, and the process can be simplified, and the conductor pattern having different electric resistances can be manufactured by changing the depth without changing the pattern width, which has the effect of miniaturization. .
【0100】請求項6の発明によれば、所望の深さが得
られるようにパターン幅または穴径のサイズが設計され
たマスクを用いて所望のエネルギー密度で紫外レーザを
照射して一度の照射で絶縁材に深さが異なる所望の深さ
まで凹状パターンまたは穴を形成するように構成したの
で、導体パターンと導通穴を1度の照射という簡単な工
程で作製でき工程を簡略化できるとともに、パターン幅
を大きく変えずに深さを変えて電気抵抗の異なる導体パ
ターンを作製することができるため小形化が可能になる
効果がある。According to the sixth aspect of the present invention, an ultraviolet laser is irradiated at a desired energy density using a mask having a pattern width or a hole diameter size designed so that a desired depth can be obtained. Since it was configured to form a concave pattern or hole to a desired depth with different depth in the insulating material, the conductor pattern and the conduction hole can be produced by a simple process of irradiating once, and the process can be simplified. Since the conductor patterns having different electric resistances can be produced by changing the depth without largely changing the width, there is an effect that miniaturization is possible.
【0101】請求項7の発明によれば、金属を含有する
ガスを導入した状態で絶縁材に紫外レーザを照射し凹状
パターンまたは穴を加工するとともに、ガスの金属を凹
部に付着させてこれにより無電解めっきまたはさらに電
解めっきの併用により導体を析出させるように構成した
ので、選択的にめっきが可能でめっき工程が簡略化でき
る効果がある。According to the invention of claim 7, the insulating material is irradiated with an ultraviolet laser while the gas containing the metal is introduced to process the concave pattern or the hole, and at the same time, the metal of the gas is adhered to the concave portion. Since the conductor is deposited by the electroless plating or the combined use of the electrolytic plating, selective plating is possible and the plating process can be simplified.
【0102】請求項8の発明によれば、金属粒子を含有
する絶縁材に紫外レーザを照射して凹状パターンあるい
は穴を加工すると、凹部の表面に金属粒子が露出し、こ
れにより無電解めっきまたはさらに電解めっきの併用に
より導体を析出させるように構成したので、選択的にめ
っきが可能でめっき工程が簡略化できる効果がある。According to the invention of claim 8, when the insulating material containing metal particles is irradiated with an ultraviolet laser to form a concave pattern or a hole, the metal particles are exposed on the surface of the concave portion, whereby electroless plating or Furthermore, since the conductor is deposited by the combined use of electrolytic plating, selective plating is possible and the plating process can be simplified.
【0103】請求項9の発明によれば、絶縁材に溶剤に
可溶な樹脂を塗布して、紫外レーザを照射し樹脂と絶縁
材に凹状パターンまたは穴を除去加工し、凹部に蓄積さ
れた電荷を利用して金属を付着させこれにより無電解め
っきまたはさらに電解めっきの併用により導体を析出さ
せ、さらに溶剤に樹脂を溶かし不要物を除去するように
構成したので、めっき工程が簡略するとともに、不要物
を除去でき信頼性が向上する効果がある。According to the invention of claim 9, a resin soluble in a solvent is applied to the insulating material, and an ultraviolet laser is irradiated to remove the concave pattern or holes in the resin and the insulating material to accumulate in the concave portion. Since a conductor is deposited by electroless plating or a combination of further electroplating by using the electric charge to attach a metal, and the resin is dissolved in a solvent to remove unnecessary substances, the plating process is simplified, There is an effect that unnecessary substances can be removed and reliability is improved.
【0104】請求項10の発明によれば、絶縁材に溶剤
に可溶で吸収係数が絶縁材と同程度もしくは高い樹脂を
塗布して、紫外レーザを照射し、樹脂と絶縁材に凹状パ
ターンまたは穴を除去加工するように構成したので、紫
外レーザは樹脂を除去してから絶縁材を除去し分解物が
樹脂と絶縁材の界面に入り込むことを防止できる効果が
ある。According to the tenth aspect of the present invention, a resin that is soluble in a solvent and has an absorption coefficient similar to or higher than that of the insulating material is applied to the insulating material, and an ultraviolet laser is irradiated to the resin and the insulating material to form a concave pattern or Since the holes are removed and processed, the ultraviolet laser has an effect that the resin is removed and then the insulating material is removed to prevent the decomposed material from entering the interface between the resin and the insulating material.
【0105】請求項11の発明によれば、帯電させたガ
スを送り込みながら紫外レーザを照射して凹状パターン
または穴を除去加工すると同時に凹部に電荷を蓄積さ
せ、この電荷を利用して金属を付着させ、無電解めっき
またはさらに電解めっきの併用により導体を析出させる
ように構成したので、めっき工程を簡略化するとともに
めっき速度を向上させるという効果がある。According to the eleventh aspect of the present invention, while the charged gas is fed, the ultraviolet laser is irradiated to remove and process the concave pattern or the hole, and at the same time, the electric charge is accumulated in the concave portion, and the metal is attached by utilizing the electric charge. Since the conductor is deposited by electroless plating or combined use of electrolytic plating, the plating process can be simplified and the plating rate can be improved.
【0106】請求項12の発明によれば、樹脂を塗布し
た絶縁材に紫外レーザにより凹状パターンまたは穴を形
成し、この回路基板に直流電圧を印加し電極間を放電さ
せることにより樹脂と絶縁材の表面を帯電させて金属を
付着させ、無電解めっきまたはさらに電解めっきの併用
により導体を析出させるように構成したので、めっき工
程を簡略化するとともにめっき速度を向上させるという
効果がある。According to the twelfth aspect of the present invention, a concave pattern or a hole is formed in the insulating material coated with the resin by an ultraviolet laser, and a direct current voltage is applied to this circuit board to discharge between the electrodes, thereby insulating the resin and the insulating material. Since the surface is charged to deposit a metal, and the conductor is deposited by electroless plating or combined use of electrolytic plating, the plating process can be simplified and the plating rate can be improved.
【0107】請求項13の発明によれば、絶縁材に形成
された凹部を導体で埋め込むめっき工程において、絶縁
材上部にバーを設置させ、バーを振動あるいは移動させ
ることによって、発生する気泡を除去するように構成し
たので、気泡が成長して凹部を覆いつくすことを防止で
き、めっき液を凹部に回り込ませることができるため、
微細な部分でも安定してめっきを行うことができる効果
がある。According to the thirteenth aspect of the present invention, in the plating step of filling the recess formed in the insulating material with a conductor, a bar is installed above the insulating material and the bar is vibrated or moved to remove bubbles generated. Since it is configured so that it is possible to prevent the growth of bubbles to cover the recessed portion, it is possible to circulate the plating solution into the recessed portion,
There is an effect that plating can be stably performed even in a fine portion.
【0108】請求項14の発明によれば、絶縁材に形成
された凹部を導体で埋め込むめっき工程において、絶縁
材上部にバーを設置し気泡を除去するためにバーを振動
あるいは移動させ、バーを陽極とし凹部を陰極とするよ
うに構成したので、陰極となる凹部に成長した導体は、
陽極であるバーにぶつかると、めっき液を介さず電流が
流れるためめっきはそれ以上成長しなくなるため、絶縁
材表面から突出した過度のめっき成長を防止でき、また
深さの異なる凹部でもともに絶縁材表面までめっき成長
ができる効果がある。According to the fourteenth aspect of the present invention, in the plating step of filling the recess formed in the insulating material with the conductor, the bar is installed on the upper portion of the insulating material, and the bar is vibrated or moved to remove bubbles. Since it was configured to use the anode and the concave portion as the cathode, the conductor grown in the concave portion that becomes the cathode is
If it hits the bar that is the anode, the current will flow without passing through the plating solution and the plating will not grow any more, preventing excessive plating growth protruding from the surface of the insulating material, and even in the case of recesses with different depths The effect is that plating can be grown up to the surface.
【図1】この発明の実施例1による回路基板の製造方法
を工程順に示す断面図である。FIG. 1 is a cross-sectional view showing a method of manufacturing a circuit board according to a first embodiment of the present invention in the order of steps.
【図2】この発明の実施例2による回路基板の製造方法
を工程順に示す断面図である。FIG. 2 is a cross-sectional view showing a method of manufacturing a circuit board according to a second embodiment of the present invention in the order of steps.
【図3】この発明の実施例3による回路基板の製造方法
を工程順に示す断面図である。FIG. 3 is a cross-sectional view showing a method of manufacturing a circuit board according to a third embodiment of the present invention in the order of steps.
【図4】この発明の実施例4による回路基板の製造方法
を工程順に示す断面図である。FIG. 4 is a cross-sectional view showing a method of manufacturing a circuit board according to a fourth embodiment of the present invention in the order of steps.
【図5】この発明の実施例5による回路基板の製造方法
を工程順に示す断面図である。FIG. 5 is a cross-sectional view showing a method of manufacturing a circuit board according to a fifth embodiment of the present invention in the order of steps.
【図6】この発明の実施例6による回路基板の製造方法
を工程順に示す断面図である。FIG. 6 is a sectional view showing a method of manufacturing a circuit board according to a sixth embodiment of the present invention in the order of steps.
【図7】この発明の実施例7による回路基板の製造方法
を工程順に示す断面図である。FIG. 7 is a cross-sectional view showing a method of manufacturing a circuit board according to a seventh embodiment of the present invention in the order of steps.
【図8】この発明の実施例8による回路基板の製造方法
を工程順に示す断面図である。FIG. 8 is a cross-sectional view showing a method of manufacturing a circuit board according to an eighth embodiment of the present invention in the order of steps.
【図9】この発明の実施例9による回路基板の製造方法
を工程順に示す断面図である。FIG. 9 is a cross-sectional view showing a method of manufacturing a circuit board according to a ninth embodiment of the present invention in the order of steps.
【図10】この発明の実施例9の作用を説明するための
グラフ図である。FIG. 10 is a graph chart for explaining the operation of Embodiment 9 of the present invention.
【図11】この発明の実施例10による回路基板の製造
方法を工程順に示す断面図である。FIG. 11 is a cross-sectional view showing a method of manufacturing a circuit board according to a tenth embodiment of the present invention in the order of steps.
【図12】この発明の実施例11による回路基板の製造
方法を工程順に示す断面図である。FIG. 12 is a sectional view showing a method of manufacturing a circuit board according to an eleventh embodiment of the present invention in the order of steps.
【図13】この発明の実施例12によるめっき方法を工
程順に示す断面図である。FIG. 13 is a sectional view showing a plating method according to the twelfth embodiment of the present invention in the order of steps.
【図14】この発明の実施例13によるめっき方法を工
程順に示す断面図である。FIG. 14 is a cross-sectional view showing a plating method according to a thirteenth embodiment of the present invention in the order of steps.
【図15】従来の回路基板の製造方法を工程順に示す断
面図である。FIG. 15 is a cross-sectional view showing a method of manufacturing a conventional circuit board in the order of steps.
【図16】従来の無電解めっき方法を示すフローチャー
トである。FIG. 16 is a flowchart showing a conventional electroless plating method.
【図17】従来の気泡に影響される凹部のめっき工程を
示す断面図である。FIG. 17 is a cross-sectional view showing a conventional plating process for recesses affected by bubbles.
【図18】従来の異なる深さの凹部のめっき工程を示す
断面図である。FIG. 18 is a cross-sectional view showing a conventional plating process for recesses having different depths.
【図19】従来の他の回路基板の製造方法を工程順に示
す断面図である。FIG. 19 is a cross-sectional view showing another conventional method of manufacturing a circuit board in the order of steps.
1 凹状パターン 2 導通穴 3 導体 4 めっき核(金属) 5 紫外レーザにより蓄積された電荷 6 絶縁材 7 紫外レーザ 10 第一のマスク 11 第二のマスク 12 樹脂 13 分解物(不要物) 17 帯電させたガス 18 帯電させたガスにより蓄積された電荷 19 負電極(電極) 20 正電極(電極) 23 バー 25 陽極であるバー 32 金属を含有する有機ガス(金属を含有するガス) 34 金属粒子を含有する絶縁材 35 所望のサイズのパターン幅又は穴径を有するマス
ク 102a 浅い凹部(凹部) 102b 深い凹部(凹部)1 concave pattern 2 conduction hole 3 conductor 4 plating nucleus (metal) 5 electric charge accumulated by ultraviolet laser 6 insulating material 7 ultraviolet laser 10 first mask 11 second mask 12 resin 13 decomposed material (unwanted material) 17 charged Gas 18 Charge accumulated by charged gas 19 Negative electrode (electrode) 20 Positive electrode (electrode) 23 Bar 25 Bar that is an anode 32 Organic gas containing metal (gas containing metal) 34 Containing metal particles Insulating material 35 Mask having desired pattern width or hole diameter 102a Shallow recess (recess) 102b Deep recess (recess)
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H05K 3/46 E 6921−4E X 6921−4E (72)発明者 森安 雅治 尼崎市塚口本町8丁目1番1号 三菱電機 株式会社生産技術研究所内 (72)発明者 田中 正明 尼崎市塚口本町8丁目1番1号 三菱電機 株式会社生産技術研究所内 (72)発明者 出雲 正雄 尼崎市塚口本町8丁目1番1号 三菱電機 株式会社伊丹製作所内─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 6 Identification number Internal reference number FI Technical indication location H05K 3/46 E 6921-4E X 6921-4E (72) Inventor Masaharu Moriyasu 8 Tsukaguchihonmachi, Amagasaki 1-1 Mitsubishi Electric Co., Ltd. Production Technology Research Laboratory (72) Inventor Masaaki Tanaka 8-1-1 Tsukaguchi Honcho, Amagasaki City Mitsubishi Electric Co., Ltd. Production Technology Research Laboratory (72) Inventor Masao Izumo 8 Tsukaguchi Honcho, Amagasaki City No. 1 No. 1 Itami Works of Mitsubishi Electric Corporation
Claims (14)
れ、前記凹状パターンまたは穴の凹部が導体で埋めこま
れていることを特徴とする回路基板。1. A circuit board, characterized in that a concave pattern or hole is formed in an insulating material, and a concave portion of the concave pattern or hole is filled with a conductor.
の上に形成され、これらの絶縁材に前記凹状パターンま
たは穴が形成されていることを特徴する請求項1記載の
回路基板。2. The circuit board according to claim 1, wherein the insulating material is formed on an insulating material containing metal particles, and the concave patterns or holes are formed in the insulating material.
状パターンまたは穴を除去加工し、前記凹状パターンま
たは穴の凹部に金属を付着させ、無電解めっきもしくは
さらに電解めっきを併用して前記凹部に導体を埋め込む
ことを特徴とするの回路基板の製造方法。3. A method of removing a concave pattern or a hole in an insulating material by using plasma etching, depositing a metal on the concave portion of the concave pattern or the hole, and using electroless plating or further electroplating together to form a conductor in the concave portion. A method for manufacturing a circuit board, comprising:
ンまたは穴を除去加工し、前記凹状パターンまたは穴の
凹部に蓄積された電荷を利用して前記凹部に金属を付着
させ、無電解めっきもしくはさらに電解めっきを併用し
て前記凹部に導体を埋め込むことを特徴とする回路基板
の製造方法。4. An ultraviolet laser is used to remove a concave pattern or a hole in an insulating material, and a metal accumulated on the concave pattern or the hole using the electric charge accumulated in the concave of the concave pattern or the electroless plating or A method of manufacturing a circuit board, further comprising the step of embedding a conductor in the recess using electroplating together.
前記紫外レーザを照射して前記絶縁材を除去加工した後
に、前記第一のパターンと異なる第二のパターンの第二
のマスクを用いてさらに前記絶縁材を除去加工すること
により深さが異なる凹状パターンまたは穴を形成するこ
とを特徴する請求項4記載の回路基板の製造方法。5. A second mask having a second pattern different from the first pattern is formed by irradiating the ultraviolet laser with the first mask having the first pattern to remove the insulating material. The method for manufacturing a circuit board according to claim 4, wherein concave patterns or holes having different depths are formed by further removing the insulating material by using the insulating material.
有するマスクを通して、所望の深さが得られるエネルギ
ー密度で、前記絶縁材に前記紫外レーザを照射すること
により、1度の照射で深さが異なる凹状パターンまたは
穴を形成することを特徴する請求項4記載の回路基板の
製造方法。6. The depth of one-time irradiation is obtained by irradiating the insulating material with the ultraviolet laser at an energy density capable of obtaining a desired depth through a mask having a pattern size or a hole diameter of a desired size. 5. The method of manufacturing a circuit board according to claim 4, wherein different concave patterns or holes are formed.
記紫外レーザにより前記凹状パターンまたは穴を除去加
工して、前記凹部に前記ガスの金属を付着させることを
特徴する請求項4、5または6記載の回路基板の製造方
法。7. The method of removing the concave pattern or hole by the ultraviolet laser in a state where a gas containing a metal is introduced, and depositing the metal of the gas on the concave. 6. The method for manufacturing a circuit board according to item 6.
の上に形成し、前記金属粒子を含有する絶縁材に、前記
紫外レーザで前記凹状パターンまたは穴を除去加工する
ことにより、前記凹部に前記金属粒子を露出させること
を特徴する請求項4、5または6記載の回路基板の製造
方法。8. The concave portion is formed by forming the insulating material on an insulating material containing metal particles, and processing the insulating pattern containing the metal particles with the ultraviolet laser to remove the concave pattern or holes. 7. The method for manufacturing a circuit board according to claim 4, 5 or 6, wherein the metal particles are exposed.
し、前記紫外レーザを照射して前記樹脂と前記絶縁材を
除去加工して前記凹状パターンまたは穴を形成し、無電
解めっきもしくはさらに電解めっきを併用して前記凹部
に導体を埋め込んだ後前記樹脂を溶剤に溶かして前記樹
脂表面に付着した不要物を除去することを特徴とする請
求項4、5、6、7または8記載の回路基板の製造方
法。9. A resin soluble in a solvent is applied on the insulating material, and the ultraviolet laser is irradiated to remove the resin and the insulating material to form the concave pattern or holes, and electroless plating is performed. Alternatively, the conductor is embedded in the recess by additionally using electroplating, and then the resin is dissolved in a solvent to remove unnecessary substances adhering to the surface of the resin. A method for manufacturing the circuit board described.
縁材と同程度もしくは高いことを特徴とする請求項9記
載の回路基板の製造方法。10. The method of manufacturing a circuit board according to claim 9, wherein the resin has an absorption coefficient of ultraviolet light equal to or higher than that of the insulating material.
記紫外レーザにより前記凹状パターンまたは穴を除去加
工し、前記凹部に電荷を蓄積させることを特徴とする請
求項4、5、6、8、9または10記載の回路基板の製
造方法。11. The method of removing the concave pattern or holes by the ultraviolet laser while feeding a charged gas to accumulate electric charges in the concave portions. Or the method for manufacturing a circuit board as described in 10 above.
外レーザを照射して前記樹脂と前記絶縁材を除去加工し
て前記凹状パターンまたは穴を形成し、この回路基板に
直流電圧を印加し電極間を放電させることにより、前記
樹脂と前記絶縁材の表面を帯電させることを特徴とする
請求項9または10記載の回路基板の製造方法。12. A resin is applied on the insulating material, and the ultraviolet laser is irradiated to remove the resin and the insulating material to form the concave pattern or holes, and a DC voltage is applied to the circuit board. The method for manufacturing a circuit board according to claim 9 or 10, wherein the surfaces of the resin and the insulating material are charged by discharging between the electrodes.
こむめっき工程において、前記絶縁材上部に設置された
バーを移動あるいは振動させて発生する気泡を除去しな
がら、前記導体を析出させることを特徴とする回路基板
の製造方法。13. In a plating step of filling a recess formed in an insulating material with a conductor, the conductor is deposited while removing bubbles generated by moving or vibrating a bar installed on the insulating material. And a method for manufacturing a circuit board.
であることを特徴とする請求項13記載の回路基板の製
造方法。14. The method of manufacturing a circuit board according to claim 13, wherein the bar is an anode and the recess is a cathode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5513194A JPH07240568A (en) | 1994-02-28 | 1994-02-28 | Circuit board and its manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5513194A JPH07240568A (en) | 1994-02-28 | 1994-02-28 | Circuit board and its manufacture |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07240568A true JPH07240568A (en) | 1995-09-12 |
Family
ID=12990231
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5513194A Pending JPH07240568A (en) | 1994-02-28 | 1994-02-28 | Circuit board and its manufacture |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07240568A (en) |
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US20220201853A1 (en) * | 2020-12-18 | 2022-06-23 | Rohm And Haas Electronic Materials Llc | Method for manufactunring a multilayer circuit structure having embedded trace layers |
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