JPH07212195A - Waveform duty automatic control circuit - Google Patents

Abstract

PURPOSE:To form a duty automatic control circuit which is capable of automatically keeping the duty of an output signal constant even if the frequency of an input signal is changed by automatically controlling the time constant of a monostable multivibrator. CONSTITUTION:In the pulse output circuit by a monostable multivibrator, a variable capacitance diode D1 is used for the element for time constant determining a pulse width, an amplification is performed after the part of the output of a monostable multivibrator IC 2 is smoothened, and the voltage of the variable capacitance diode D 1 is controlled by this amplification output.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for controlling the duty of a rectangular wave signal.

[0002]

2. Description of the Related Art Conventionally, as a technique in such a field,
For example, there were the following. FIG. 6 is a circuit diagram of such a conventional frequency doubling circuit. FIG. 7 and FIG. 8 are diagrams showing signal waveforms of respective parts of this frequency doubling circuit.

In FIG. 6, IN is an input terminal, R1 and R
2 is a resistor, C1 and C4 are capacitors, IC1 is an exclusive OR gate (hereinafter abbreviated as EXOR), and IC2 is a monostable multivibrator (hereinafter abbreviated as MM). In FIG. 6, input terminals IN and EXOR (IC1)
One input of the resistor R1 and one side of the resistor R1 are connected, and the resistor R1
The other side is the one side of the capacitor C1 and the EXOR (IC
It is connected to the other input of 1) and the other side of the capacitor C1 is grounded.

The output of EXOR (IC1) is MM
It is connected to the input terminal B of (IC2), and the input terminal -A of MM (IC2) is grounded. C of MM (IC2)
The X terminal is connected to one side of the capacitor C4,
It is grounded. The other side of the capacitor C4 is M
The RX / CX terminal of M (IC2) and one side of the resistor R2 are connected, and the other side of the resistor R2 is connected to the + V power source. The -CLR terminal of the MM (IC2) is connected to the + V power source.

Further, the output terminal Q of the MM (IC2) is connected to the output terminal OUT of this circuit. Next, the operation of this frequency doubling circuit will be described. First, when the signal a of FIG. 7 is input to the input terminal IN, the signal waveform at the point b of FIG. 6 becomes a signal shown by b of FIG. 7 in which charging and discharging by the resistor R1 and the capacitor C1 are repeated. This allows
The signal at the point c, which is the output of the EXOR (IC1), has a waveform shown by c in FIG. This pulse width is t1.

When a signal is input to the MM (IC2),
A pulse determined by the resistor R2 and the capacitor C4 is created, and the signal at point d in FIG. 6 has a waveform shown in d in FIG. This pulse width is t2. By setting the resistance R2 and the capacitor C4 to appropriate values, the high level time and the low level time can be made the same (duty 50%), as shown by d in FIG.

In this way, an output signal having a frequency twice the input signal frequency is obtained.

[0008]

FIG. 8 shows an example in which a signal having a frequency lower than the input signal frequency in FIG. 7 is input. Even if the input signal frequency changes, the resistance R2
Since the value of the capacitor C4 is not changed, the pulse width t2 of d in FIG. 8 is not changed. Therefore, the high level time is different from the low level time, and a signal with a duty of 50% is not obtained.

As described above, in the conventional frequency doubling circuit, if the input signal frequency changes even a little, the duty becomes 50%.
However, there is a drawback that the value of the resistor R2 or the capacitor C4 must be changed in order to obtain the signal of 50% duty. The present invention eliminates the above problems and automatically controls the time constant of the monostable multivibrator, so that the duty of the output signal can be automatically kept constant even if the input signal frequency changes. An object is to provide an automatic waveform duty control circuit.

[0010]

In order to achieve the above object, the present invention uses a varicap diode as a time constant element for determining a pulse width in a pulse output circuit using a monostable multivibrator, and A part of the output of the table multivibrator is smoothed and then amplified, and the voltage of the varicap diode is controlled by this amplified output.

[0011]

According to the present invention, as described above, the varicap diode is used in place of the capacitor for determining the time constant of the MM (IC2) used in the frequency doubling circuit, the frequency treble circuit or the like. Further, a smoothing circuit and an amplifier circuit for the output of the MM (IC2) are provided, and the voltage of the varicap diode is controlled by the amplifier circuit.

Therefore, even if the input signal frequency changes, the duty of the output signal can be automatically kept constant, and it becomes unnecessary to adjust the duty every time the input frequency changes, unlike the conventional case. .

[0013]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a frequency doubling circuit diagram showing a first embodiment of the present invention. 2 and 3 are diagrams showing signal waveforms of respective parts of the frequency doubling circuit. The same parts as those in FIG. 6 of the conventional example in FIG. 1 are designated by the same reference numerals.

In FIG. 1, input terminals IN and EXOR
One input of (IC1) and one side of the resistor R1 are connected, and the other side of the resistor R1 is connected to one side of the capacitor C1 and EX.
It is connected to the other input of the OR (IC1), and the opposite side of the capacitor C1 is grounded. Also, EXOR
The output of (IC1) is connected to the input terminal B of MM (IC2), and the input terminal -A of MM (IC2) is grounded. The CX terminal of the MM (IC2) is grounded.

Furthermore, the output of the output terminal Q of the MM (IC2) is connected to the resistor R3 and the output terminal OUT, and the resistor R3
Is connected to the capacitor C2 and the resistor R4, the opposite side of the resistor R4 is connected to the inverting input terminal and the resistor R5 of the OP amplifier (IC3), and the opposite side of the resistor R5 is the output terminal of the OP amplifier (IC3) and Varicap diode D
Connected to the anode side of 1 and the varicap diode D
The cathode side of 1 is connected to the RX / CX terminal of the MM (IC2) and the resistor R2, and the opposite side of the resistor R2 is connected to the + V power source.

Further, a volume V is provided between the + V power source and the ground.
R1 is connected, and the variable terminal of this volume VR1 is OP
It is connected to the non-inverting input terminal of the amplifier (IC3).
In FIG. 1, the capacitor for determining the time constant of MM (IC2) serves as a varicap diode D1, the resistors R3 and C2 form a smoothing circuit, and the resistors R4 and R5 and the OP amplifier (IC3) form an amplifier circuit. . Also,
The volume VR1 is used for setting the output level of the smoothing circuit.

The operation of the circuit of FIG. 1 is the same as the conventional circuit up to the input of the MM (IC2). First, OP amplifier (I
The volume VR1 is set so that the voltage at the point g of the non-inverting input terminal of C3) becomes half the voltage of the + V power supply voltage. Further, the value of the resistor R5 is set to be sufficiently larger than the value of the resistor R4, and the gain of the amplifier circuit is set sufficiently high.

The signal at the output terminal Q of the MM (IC2) is the signal shown by d in FIG.
In the case of an IC, the high level value is almost the same as the + V power supply voltage, and the low level value is almost the ground potential. The signal at point e in FIG. 1 is smoothed by the resistor R3 and the capacitor C2, and becomes a flat DC voltage, as indicated by the alternate long and short dash line in FIG.

This voltage value is the pulse width t2 at point d in FIG.
Becomes narrower, and becomes smaller, and becomes wider, as the pulse width t2 becomes wider. The voltage value at point e in FIG. 1 is the same as the voltage at point g. This is because when the voltage at the point e is higher than the voltage at the point g, the voltage at the point e is transmitted to the point f through the resistor R4, and the voltage at the point f becomes higher than the voltage at the point g.
The voltage is inverted and amplified by the amplifier (IC3) to become a negative output voltage, which is applied to the anode side of the varicap diode D1.

As a result, the varicap diode D1
Has a small value, the time constant of the resistor R2 and the varicap diode D1 becomes short, and the output pulse width of the output terminal Q of the MM (IC2) becomes narrow. Therefore, when the voltage at point e falls and becomes equal to the voltage at point g, a stable state is reached. From this, it can be seen that if the voltage at point g in FIG. 1 is set to half the + V power supply voltage, an output signal with a duty of 50% can be obtained at the output terminal OUT.

FIG. 3 shows an example in which a signal having a lower frequency than that in the case of FIG. 2 is input to the circuit of FIG. 1, so that the voltage at point g and the voltage at point e in FIG. 1 become equal. Since the circuit operates, the output pulse width of the MM (IC2) is t in FIG.
As shown by 3, the output pulse width becomes wider than the output pulse width t2 in FIG. 2, and a signal with a duty of 50% is obtained at the output terminal OUT.

FIG. 4 is a frequency triple circuit diagram showing a second embodiment of the present invention. FIG. 5 is a diagram showing a signal waveform of each part of the frequency tripler circuit. In FIG. 4, the same parts as those of FIG. 6 of the conventional example are designated by the same reference numerals,
The description is omitted. In FIG. 4, d in FIG.
Connect the point to terminal-A of MM (IC4) and
The + V power supply is connected to the terminal B of 4). The output terminal -Q has an AND gate (IC6) and a NOR gate (I
One input terminal of C7) is connected to each other, and the other input terminals of the AND gate (IC6) and the NOR gate (IC7) are connected to signal input terminals IN, respectively.

The output signal at the s point of the AND gate (IC6) and the output signal at the u point of the NOR gate (IC7) are input to the OR gate (IC8), and the output signal at the V point is output from the output terminal OUT. Sent out. In addition, MM (IC
The output of the output terminal Q of 4) is connected to the resistor R7, the opposite side of the resistor R7 is connected to the capacitor C3 and the resistor R8, and the opposite side of the resistor R8 is O, as in the first embodiment.
The inverting input terminal of the P amplifier (IC5) and the resistor R9 are connected, the opposite side of the resistor R9 is connected to the output terminal of the OP amplifier (IC5) and the anode side of the varicap diode D2, and the cathode side of the varicap diode D2 is connected. ,
It is connected to the RX / CX terminal of the MM (IC4) and the resistor R6, and the opposite side of the resistor R6 is connected to the + V power source.

That is, the resistor R7 and the capacitor C3 form a smoothing circuit, and the resistors R8 and R9 and the OP amplifier (IC5) form an amplifier circuit. Also, the volume V
R2 is used for setting the output level of the smoothing circuit. Therefore, a part of the output of the MM (IC4) is smoothed by a smoothing circuit and then amplified, and the voltage of the varicap diode D2 is controlled by this amplified output.

Therefore, in the circuit of FIG. 4, point g and p
The voltage at the point is set to + V power supply voltage 1/3. Then, as shown in FIG. 5, the waveforms at the point d and the point j are waveforms in which the high level is 1 and the low level is 2. Further, the waveform at the k point is the reverse of the waveform at the j point, and the waveform at the output V point is the logical sum of the output signal at the s point and the output signal at the u point. Similarly, even if the input signal frequency changes, the duty of the output signal can be maintained at 50%.

The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the present invention, and these modifications are not excluded from the scope of the present invention.

[0027]

As described above in detail, according to the present invention, when the frequency doubler or tripler circuit is used, the duty of the output signal is automatically made constant even if the input signal frequency changes. It is possible to realize an excellent frequency doubler and tripler circuit that can be maintained and does not require adjustment of the duty every time the input frequency changes, and can be used in various measuring instruments.

[Brief description of drawings]

FIG. 1 is a frequency doubling circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a signal waveform of each part when the first input frequency is input to the frequency doubling circuit according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a signal waveform of each part when a second input frequency is input to the frequency doubling circuit according to the first embodiment of the present invention.

FIG. 4 is a frequency triple circuit diagram showing a second embodiment of the present invention.

FIG. 5 is a diagram showing signal waveforms of respective parts of the frequency tripler circuit according to the second embodiment of the present invention.

FIG. 6 is a conventional frequency doubling circuit diagram.

FIG. 7 is a diagram showing signal waveforms of respective parts when a first input frequency is input to a conventional frequency doubling circuit.

FIG. 8 is a diagram showing signal waveforms of respective parts when a second input frequency is input to a conventional frequency doubling circuit.

[Explanation of symbols]

IN input terminal IC1 Exclusive OR gate (EXOR) IC2, IC4 Monostable multivibrator (MM) R1, R2, R3, R4, R5, R6, R7, R8, R
9 resistance OUT output terminal C1, C2, C3 capacitor IC3, IC5 amplifier (OP amplifier) D1, D2 varicap diode VR1, VR2 volume

Claims (1)

[Claims] 1. In a pulse output circuit using a monostable multivibrator, a varicap diode is used as an element for a time constant that determines a pulse width, a part of the output of the monostable multivibrator is smoothed, and then amplified. An automatic waveform duty control circuit characterized in that the voltage of the varicap diode is controlled by the output.