JPH07211575A - Ceramic capacitor - Google Patents
Ceramic capacitorInfo
- Publication number
- JPH07211575A JPH07211575A JP2381894A JP2381894A JPH07211575A JP H07211575 A JPH07211575 A JP H07211575A JP 2381894 A JP2381894 A JP 2381894A JP 2381894 A JP2381894 A JP 2381894A JP H07211575 A JPH07211575 A JP H07211575A
- Authority
- JP
- Japan
- Prior art keywords
- external electrode
- electrode layer
- ceramic capacitor
- solder
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Ceramic Capacitors (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、セラミックコンデンサ
に関係し、特に、表面実装等に用いられる積層型チップ
コンデンサ等の外部電極の構造に関係する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic capacitor, and more particularly to the structure of external electrodes such as a multilayer chip capacitor used for surface mounting.
【0002】[0002]
【従来の技術】セラミックコンデンサは、最近、小型大
容量の積層型のチップコンデンサとして多用されてい
る。特に、表面実装方式の用途において多く使われ、回
路基板にコンデンサの外部電極を半田により直接接続し
て使用される。この実装方式は、基板上に半田ペースト
を印刷し、その上に、コンデンサを仮固定し、熱を加え
て半田付けを行うリフロー方式と、溶融した半田を仮固
定したコンデンサの全体に浴びせて、基板の導体パター
ンとコンデンサの外部電極とを半田付けするフロー方式
とに大別される。これらの表面実装方式では、コンデン
サの外部電極材料が、半田の濡れ性がよい電極材料の場
合、コンデンサの外部電極部全体に半田付けされ、コン
デンサの高さ方向に外部電極部全体が半田により基板に
固定された状態となる。これは、その後の基板の組付け
や取扱時に加えられる機械的応力や、温度サイクルの熱
等による熱的応力により、コンデンサの外部電極部とセ
ラミックチップ部との境界付近で応力集中が起こり、外
部電極の剥離やセラミック部にクラックが発生し、特性
の変化や短絡や遮断等の故障が頻発すると言う問題があ
る。この問題は、比較的大きい積層型のチップコンデン
サをフロー方式で実装する場合に、発生しやすくなると
いう傾向がある。2. Description of the Related Art Recently, ceramic capacitors have been widely used as small-sized and large-capacity laminated chip capacitors. In particular, it is often used in surface mount applications, and external electrodes of capacitors are directly connected to a circuit board by soldering. This mounting method is to print solder paste on the substrate, temporarily fix the capacitor on it, reflow method to apply heat to solder, and to pour the melted solder to the entire temporarily fixed capacitor, It is roughly classified into a flow method of soldering the conductor pattern of the substrate and the external electrode of the capacitor. In these surface mounting methods, when the external electrode material of the capacitor is an electrode material with good solder wettability, it is soldered to the entire external electrode part of the capacitor, and the entire external electrode part is soldered to the substrate in the height direction of the capacitor. It will be fixed to. This is because stress concentration occurs near the boundary between the external electrode section of the capacitor and the ceramic chip section due to the mechanical stress applied during the subsequent board assembly and handling, and the thermal stress due to the heat of the temperature cycle. There is a problem that peeling of the electrodes and cracks in the ceramic part frequently occur, resulting in changes in characteristics and failures such as short circuits and interruptions. This problem tends to occur when a relatively large multilayer chip capacitor is mounted by the flow method.
【0003】[0003]
【発明が解決しようとする課題】本発明は、上記の問題
を解消し、どんな半田付けの方法でも、コンデンサのセ
ラミックチップ部に、不必要な応力を与えない所定の部
分だけで半田接続できる破損しにくい構造のセラミック
コンデンサを提供する。DISCLOSURE OF THE INVENTION The present invention solves the above problems, and by any soldering method, the ceramic chip portion of a capacitor can be soldered only at a predetermined portion that does not give unnecessary stress. Provide a ceramic capacitor having a structure that is difficult to do.
【0004】[0004]
【課題を解決するための手段】本発明は、上記課題を解
決する為に、セラミックコンデンサの外部電極の構造を
改良して、半田付けに寄与する外部電極の部分を制限す
る構造とした。一般に、従来のセラミックコンデンサの
外部電極は、多層構造で作成されている。その内側の層
はセラミックチップ部の内部電極の端部と確実に接続で
き、かつ、セラミックと反応しにくく、しかも強固に固
着する材料が用いられ、その外側に、大気中で腐食され
にくく、半田が濡れ易い材料を用いた外部電極層が形成
されている。この外部電極の外側の外部電極層は、半田
付けに寄与して欲しい部分のみ半田が濡れ易ければよ
く、他の部分は半田付けに寄与せず、耐食性のみが良け
ればよいわけである。本発明は、以上の目的を達成する
ために、外部電極部の外側を構成する第一の外部電極層
を耐食性は優れているが、半田の濡れ性が比較的低い材
料であるガラス入り銀電極層等を外部電極部全面に加工
し、その上の半田付けに寄与して欲しい部分に、第二の
外部電極層として、半田との濡れ性がよい電極材料であ
るガラス成分を含まない銀電極層、金電極層または、銀
−白金電極層等を第一の外部電極層の一部分に付着加工
した構造の外部電極を有するセラミックコンデンサを供
する。In order to solve the above-mentioned problems, the present invention has an improved structure of the external electrodes of the ceramic capacitor so as to limit the parts of the external electrodes that contribute to soldering. In general, the external electrodes of conventional ceramic capacitors are made in a multilayer structure. The inner layer is made of a material that can be reliably connected to the end of the internal electrode of the ceramic chip part, is hard to react with the ceramic, and is firmly fixed to the outside. An external electrode layer is formed using a material that easily wets. It suffices that the external electrode layer on the outside of the external electrode only needs to be wetted by the solder in a portion which is desired to contribute to soldering, and does not contribute to soldering in other portions, and only needs to have good corrosion resistance. In order to achieve the above object, the present invention provides a glass-containing silver electrode, which is a material having excellent corrosion resistance for the first external electrode layer forming the outside of the external electrode portion but having relatively low solder wettability. A silver electrode that does not contain a glass component, which is an electrode material with good wettability with solder, is used as a second external electrode layer in the portion on the entire surface of the external electrode that is desired to contribute to soldering. A ceramic capacitor having an external electrode having a structure in which a layer, a gold electrode layer, a silver-platinum electrode layer or the like is attached and processed on a part of the first external electrode layer is provided.
【0005】即ち、本発明は、セラミックコンデンサ
のセラミックチップ部の端部を覆い、内部電極と接続す
る外部電極の外側の電極層において、半田の濡れ性が低
い電極材料からなる第一の外部電極層により外部電極部
全面を覆い、この第一の外部電極層の外側で、第一の外
部電極層が実装される際半田接続される側の一部に、半
田の濡れ性が高い電極材料からなる第二の外部電極層を
設けたことを特徴とするセラミックコンデンサ、及び、
上記記載のセラミックコンデンサにおいて、第一の
外部電極層が、ガラス成分を3%から10%の範囲で含
む銀からなり、第二の外部電極層が、ガラス成分を含ま
ない銀からなり、第一の外部電極層面積の二分の一以下
の面積に加工された構造を特徴とするセラミックコンデ
ンサ。That is, according to the present invention, a first external electrode made of an electrode material having a low solder wettability is provided in an electrode layer outside an external electrode which covers an end of a ceramic chip portion of a ceramic capacitor and is connected to an internal electrode. The entire surface of the external electrode portion is covered with a layer, and an electrode material having a high solder wettability is formed on a part of the outside of the first external electrode layer that is solder-connected when the first external electrode layer is mounted. And a second external electrode layer provided on the ceramic capacitor, and
In the ceramic capacitor described above, the first external electrode layer is made of silver containing a glass component in a range of 3% to 10%, and the second external electrode layer is made of silver not containing a glass component. A ceramic capacitor having a structure processed into an area less than one half of the external electrode layer area.
【0006】[0006]
【作用】本発明のセラミックコンデンサは、第一の外部
電極層が半田と反応しにくく、半田の濡れの悪い材料、
例えば、ガラス成分を3%から10%の範囲で含む銀電
極材料を用いて外部電極を構成すると、電極を焼付けた
時、ガラス成分の一部が、図2に示す第一の外部電極層
のように、表面にガラス層が析出し、半田の濡れ性を小
さくしている。他方、第二の外部電極層はガラス成分を
含まない銀電極材料で、第一の外部電極層の一部分のみ
に加工されているので、この第二の外部電極層は半田と
の馴染みが良く、かつ、何れの半田付け方法をとっても
第二の外部電極と基板の導体との間で半田付けが容易に
できる。従って、本発明のセラミックコンデンサは外部
電極全体に半田が覆いかぶさることがないので、不必要
な応力が外部電極に掛からず、外部電極の導電性を損な
うことなく、セラミックコンデンサの破損を防止でき
る。また、第二の外部電極層を、第一の外部電極層の面
積の2分1以下の面積で、実装される側の表面に設けら
れた時、上記効果は最も顕著に得られる。さらに、第一
の外部電極材料に用いるガラス成分入り銀について、ガ
ラス成分が3%以上と限定したのは、これ以下では半田
の濡れ性がよくなり過ぎることと、外部電極のセラミッ
クチップ部への固着力が低下し、電極はがれ等を起こし
易くなるためであり、また、ガラス成分を10%以下に
限定したのは、外部電極としての導電性を低下させ電気
的接続不良を発生しやすくし、電極形成時に割れ不良を
発生しやすくするからである。In the ceramic capacitor of the present invention, the first external electrode layer is hard to react with the solder and the solder is poorly wetted.
For example, when the external electrode is formed by using a silver electrode material containing a glass component in the range of 3% to 10%, when the electrode is baked, a part of the glass component is included in the first external electrode layer shown in FIG. As described above, the glass layer is deposited on the surface to reduce the wettability of the solder. On the other hand, the second external electrode layer is a silver electrode material containing no glass component, and since it is processed only in a part of the first external electrode layer, this second external electrode layer is well compatible with solder, In addition, whichever soldering method is used, soldering can be easily performed between the second external electrode and the conductor of the substrate. Therefore, in the ceramic capacitor of the present invention, since the entire external electrode is not covered with the solder, unnecessary stress is not applied to the external electrode, and the damage of the ceramic capacitor can be prevented without impairing the conductivity of the external electrode. Further, when the second external electrode layer is provided on the surface of the mounting side with an area that is ½ or less of the area of the first external electrode layer, the above effect is most remarkably obtained. Further, regarding the glass-containing silver used for the first external electrode material, the glass component was limited to 3% or more because the wettability of the solder was too good and the ceramic chip portion of the external electrode was less than 3%. This is because the adhesive strength is reduced, and electrode peeling and the like are likely to occur. Further, the reason why the glass component is limited to 10% or less is that conductivity as an external electrode is reduced and electrical connection failure is likely to occur, This is because cracking defects are likely to occur during electrode formation.
【0007】[0007]
【実施例】以下、本発明の実施例について、図面を参照
して説明する。図1は、本発明の一実施例の積層型セラ
ミックコンデンサの外観斜視図、図2は、図1に示す積
層型セラミックコンデンサの外部電極構造を説明する断
面図、図3は、本発明によるセラミックコンデンサを基
板に半田付けした状態を示す断面図で、図3(a)は適
正な半田量で半田付けされた状態を示し、図3(b)は
過剰な半田量で半田付けされた状態を示す。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view showing the appearance of a multilayer ceramic capacitor according to an embodiment of the present invention, FIG. 2 is a sectional view illustrating an external electrode structure of the multilayer ceramic capacitor shown in FIG. 1, and FIG. 3A and 3B are cross-sectional views showing a state in which the capacitor is soldered to the substrate. FIG. 3A shows a state in which the capacitor is soldered with an appropriate amount of solder, and FIG. 3B shows a state in which the capacitor is soldered with an excessive amount of solder. Show.
【0008】図1に示すように、本発明の実施例で用い
る表面実装等に使われる積層型セラミックコンデンサ
は、誘電体セラミック層と内部電極層が交互に積層され
たセラミックチップ部1の両端にそれぞれの内部電極を
まとめて引き出す外部電極5(本実施例では、第一の外
部電極層2)が加工されている。この第一の外部電極層
2は、通常電気的にも機械的にも強固にセラミックチッ
プ部1に付着するように加工される必要があり、ガラス
質を所定の量含んだ銀等が用いられる。この第一の外部
電極層は、焼付け加工された時、外側にガラス質の析出
層を作る。従って、図2に示すように、この第一の外部
電極層2により形成される外部電極5はガラス析出部4
が表面を覆っているため、半田との馴染みが悪く、後工
程の実装時の半田作業での不具合いが多い。そのため、
この外部電極5の外側に、半田が濡れやすい材料の第二
の外部電極層3で覆う必要がある。従来は、この第二の
外部電極層を第一の外部電極層2の上全体に加工してい
たため、前記したように、実装後に破損を起こし易いと
いう問題がある。本発明では、この第二の外部電極層3
の構造を改善した。図1及び図2に示すように、この第
二の外部電極層3は、ガラス質を含まない銀電極材料等
の半田が濡れ易い材料を用いて、第一の外部電極層2の
上のコンデンサが基板に実装される側の一部に加工され
ている。As shown in FIG. 1, a monolithic ceramic capacitor used for surface mounting or the like used in the embodiment of the present invention has a ceramic chip portion 1 on which dielectric ceramic layers and internal electrode layers are alternately laminated. The external electrode 5 (in this embodiment, the first external electrode layer 2) is processed so as to collectively pull out the internal electrodes. This first external electrode layer 2 usually needs to be processed so as to adhere firmly to the ceramic chip portion 1 both electrically and mechanically, and silver or the like containing a predetermined amount of glass is used. . This first outer electrode layer, when baked, creates a glassy deposit on the outside. Therefore, as shown in FIG. 2, the external electrode 5 formed by the first external electrode layer 2 has the glass deposition portion 4
Since it covers the surface, it is not compatible with solder and there are many problems in soldering work at the time of mounting in the subsequent process. for that reason,
It is necessary to cover the outside of the external electrode 5 with the second external electrode layer 3 made of a material with which solder is easily wetted. Conventionally, since the second external electrode layer is processed on the entire first external electrode layer 2, as described above, there is a problem that damage is likely to occur after mounting. In the present invention, this second external electrode layer 3
Improved the structure of. As shown in FIGS. 1 and 2, the second external electrode layer 3 is made of a material such as a silver electrode material that does not contain glass and is easily wetted by solder. Is processed on a part of the side mounted on the board.
【0009】本発明の実施例として、第一の外部電極層
2として、ガラス成分入り銀(Ag)電極材料とガラス
成分入り金(Au)電極材料を用い、第二の外部電極層
として、ガラス成分を含まない銀(Ag)、金(Au)
及び銀(Ag)−白金(Pt)系の電極材料を用いた表
1に示す試料を、実施例の試料及び比較例の試料として
作成した。これらの試料について、各試料をフロー方式
により基板上に半田付けし、−55℃から125℃の温
度サイクルテストを施し、電極に起因する不良の発生率
を求め、その結果を表1に示す。In an embodiment of the present invention, a glass component-containing silver (Ag) electrode material and a glass component-containing gold (Au) electrode material are used as the first external electrode layer 2, and a glass is used as the second external electrode layer. Silver (Ag) and gold (Au) without ingredients
Samples shown in Table 1 using a silver (Ag) -platinum (Pt) -based electrode material were prepared as a sample of the example and a sample of the comparative example. With respect to these samples, each sample was soldered on a substrate by a flow method, a temperature cycle test of -55 ° C. to 125 ° C. was performed, the occurrence rate of defects due to electrodes was obtained, and the results are shown in Table 1.
【0010】[0010]
【表1】 [Table 1]
【0011】表1から分かるように、本発明の実施例の
試料No.1,2,3,8及び9において、不良の発生
率が改善されている。ガラス成分が3%以下、及びガラ
ス成分が10%を越える銀の電極材料の第一の外部電極
層を持つセラミックコンデンサ(比較例の試料No.4
及び5)の不良率は高いことが分かる。試料No.2,
6,7を比較してみると、第二の外部電極層を第一の外
部電極層の全面に加工した試料No.7に比較して、部
分的に第二の外部電極層が加工された試料No.2,6
は不良発生率が改善されており、第一の外部電極層の面
積の一部に第二の外部電極層が加工されることにより、
不良発生が改善されていることが分かる。また、このよ
うにして得られたセラミックコンデンサを、図3に示す
ように、基板に実装するため半田付けを行った場合、半
田の量が適正な図3(a)の場合でも、また、半田の量
が過剰な状態の図3(b)の場合でも、半田が外部電極
5全体に付着することはなく、第二の外部電極層3のみ
に半田が付着し半田付けされるので、不用な応力がセラ
ミックコンデンサに掛かること防止している。As can be seen from Table 1, in sample Nos. 1, 2, 3, 8 and 9 of the examples of the present invention, the incidence of defects is improved. A ceramic capacitor having a first external electrode layer of a silver electrode material having a glass content of 3% or less and a glass content of more than 10% (Sample No. 4 of Comparative Example).
It can be seen that the defect rates of 5 and 5) are high. Sample No. 2,
Comparing Nos. 6 and 7, the second external electrode layer was partially processed as compared with Sample No. 7 in which the second external electrode layer was processed on the entire surface of the first external electrode layer. Sample No.2,6
The defect occurrence rate is improved, and by processing the second external electrode layer in a part of the area of the first external electrode layer,
It can be seen that the occurrence of defects has been improved. Further, when the ceramic capacitor thus obtained is soldered for mounting on a substrate as shown in FIG. 3, even when the amount of solder is appropriate in FIG. Even in the case of FIG. 3B in the state where the amount is excessive, the solder does not adhere to the entire external electrode 5, and the solder adheres to only the second external electrode layer 3 to be soldered, which is unnecessary. Prevents stress from being applied to the ceramic capacitor.
【0012】[0012]
【発明の効果】以上説明したように、本発明によれば、
基板等に半田付けした場合のセラミックコンデンサの破
損が減少し、信頼性が向上したセラミックコンデンサが
提供出来る。As described above, according to the present invention,
It is possible to provide a ceramic capacitor with improved reliability by reducing damage to the ceramic capacitor when soldered to a substrate or the like.
【図1】本発明の一実施例の積層型セラミックコンデン
サの外観斜視図。FIG. 1 is an external perspective view of a monolithic ceramic capacitor according to an embodiment of the present invention.
【図2】図1に示す積層型セラミックコンデンサの外部
電極構造を説明する断面図。FIG. 2 is a sectional view illustrating an external electrode structure of the multilayer ceramic capacitor shown in FIG.
【図3】本発明によるセラミックコンデンサを基板に半
田付けした状態を示す断面図で、図3(a)は適正な半
田量で半田付けされた状態を示す図、図3(b)は過剰
な半田量で半田付けされた状態を示す図。FIG. 3 is a cross-sectional view showing a state in which a ceramic capacitor according to the present invention is soldered to a substrate, FIG. 3 (a) is a diagram showing a state of being soldered with an appropriate amount of solder, and FIG. 3 (b) is an excess. The figure which shows the state soldered by the amount of solder.
1 セラミックチップ部 2 第一の外部電極層 3 第二の外部電極層 4 ガラス析出部 5 外部電極 6 半田 7 基板 1 Ceramic Chip Part 2 First External Electrode Layer 3 Second External Electrode Layer 4 Glass Precipitating Part 5 External Electrode 6 Solder 7 Substrate
Claims (2)
プ部の端部を覆い、内部電極と接続する外部電極の外側
の電極層において、半田の濡れ性が低い電極材料からな
る第一の外部電極層により外部電極部全面を覆い、この
第一の外部電極層の外側で、第一の外部電極層が実装さ
れる際半田接続される側の一部に、半田の濡れ性が高い
電極材料からなる第二の外部電極層を設けたことを特徴
とするセラミックコンデンサ。1. A first external electrode layer made of an electrode material having low wettability of solder in an electrode layer outside an external electrode which covers an end of a ceramic chip portion of a ceramic capacitor and is connected to an internal electrode. The entire outer surface of the first external electrode layer and a part of the side to which solder connection is made when the first external electrode layer is mounted outside the first external electrode layer. A ceramic capacitor having an external electrode layer.
おいて、第一の外部電極層が、ガラス成分を3%から1
0%の範囲で含む銀からなり、第二の外部電極層が、ガ
ラス成分を含まない銀からなり、第一の外部電極層面積
の二分の一以下の面積に加工された構造を特徴とするセ
ラミックコンデンサ。2. The ceramic capacitor according to claim 1, wherein the first external electrode layer contains 3% to 1% of a glass component.
The second external electrode layer is made of silver contained in an amount of 0%, and the second external electrode layer is made of silver not containing a glass component, and is characterized by being processed into an area that is ½ or less of the area of the first external electrode layer. Ceramic capacitor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2381894A JPH07211575A (en) | 1994-01-25 | 1994-01-25 | Ceramic capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2381894A JPH07211575A (en) | 1994-01-25 | 1994-01-25 | Ceramic capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07211575A true JPH07211575A (en) | 1995-08-11 |
Family
ID=12120941
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2381894A Pending JPH07211575A (en) | 1994-01-25 | 1994-01-25 | Ceramic capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07211575A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013153231A (en) * | 2010-12-21 | 2013-08-08 | Samsung Electro-Mechanics Co Ltd | Circuit board mounting structure of multi-layered ceramic capacitor, method thereof, land pattern of circuit board, packing unit for multi-layered ceramic capacitor and aligning method |
JP2013232606A (en) * | 2012-05-02 | 2013-11-14 | Murata Mfg Co Ltd | Electronic component |
JP2014027248A (en) * | 2012-07-26 | 2014-02-06 | Samsung Electro-Mechanics Co Ltd | Multilayer ceramic electronic component and method of manufacturing the same |
JP2016018985A (en) * | 2014-07-07 | 2016-02-01 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Laminated ceramic capacitor, manufacturing method of laminated ceramic capacitor, and mounting substrate for laminated ceramic capacitor |
-
1994
- 1994-01-25 JP JP2381894A patent/JPH07211575A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013153231A (en) * | 2010-12-21 | 2013-08-08 | Samsung Electro-Mechanics Co Ltd | Circuit board mounting structure of multi-layered ceramic capacitor, method thereof, land pattern of circuit board, packing unit for multi-layered ceramic capacitor and aligning method |
JP2013232606A (en) * | 2012-05-02 | 2013-11-14 | Murata Mfg Co Ltd | Electronic component |
JP2014027248A (en) * | 2012-07-26 | 2014-02-06 | Samsung Electro-Mechanics Co Ltd | Multilayer ceramic electronic component and method of manufacturing the same |
JP2016018985A (en) * | 2014-07-07 | 2016-02-01 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Laminated ceramic capacitor, manufacturing method of laminated ceramic capacitor, and mounting substrate for laminated ceramic capacitor |
US9704648B2 (en) | 2014-07-07 | 2017-07-11 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic capacitor, manufacturing method thereof, and board having the same |
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