JPH07201866A - Semiconductor device having bumps and method of manufacturing the same - Google Patents

Abstract

PURPOSE:To completely resolve disadvantage due to a probe trace, even though the probe trace is left in the surface of a pad at the time of pressing a probe onto the surface of a pad of a semiconductor device (IC chip) for testing. CONSTITUTION:A pad 2 is composed of a bump formation region 2a and a contact region 2b for test use. Even though a probe trace 8 is generated in the surface of a pad 2 in a contact region 2a for test use, a backing metal layer 6 can be formed with uniform thickness on the pad 2 in the bump formation region 2a, and therefore the disadvantage due to the probe trace 8 can be completely resolved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having bumps and a method of manufacturing the same.

[0002]

2. Description of the Related Art In a semiconductor device (IC chip) mounting technique called the TAB method, for example, the semiconductor device is mounted on a TAB tape. In this case, the bumps provided on the semiconductor device are connected to the finger leads (inner leads) of the TAB tape by bonding such as a gold-tin eutectic method or a gold-gold thermocompression bonding method.

FIGS. 2A and 2B show a part of such a conventional semiconductor device. This semiconductor device includes a silicon wafer (semiconductor device body) 1. On the upper surface of the silicon wafer 1, wirings including a substantially square pad 2 and a lead wire 3 drawn from the pad 2 are formed of Al. A passivation film 4 made of silicon nitride or the like is formed on the entire upper surface of the silicon wafer 1 including the wiring. in this case,
A substantially square opening 5 is formed in the passivation film 4 in a portion corresponding to almost the entire area of the pad 2 by etching, and a part of the pad 2 is exposed through this opening 5. Bumps 7 made of Au are formed on the upper surface of the pad 2 in the exposed portion and the upper surface of the passivation film 4 around the pad 2 with the underlying metal layer 6 interposed therebetween. The base metal layer 6 is composed of an adhesive layer 6a, a barrier layer 6b and a surface layer 6c. Of these, the barrier layer 6b is A
It is for preventing the intermetallic compound from being formed by the direct contact between the pad 2 made of 1 and the bump 7 made of Au, and is made of Pd, Cu or the like. The adhesive layer 6a is
Ti, Cr, and Ti, which are materials having good adhesion to the pad 2 made of Al and the barrier layer 6b made of Pd, Cu or the like.
It is made of W, Ni, etc. The surface layer 6c is for further improving the adhesiveness of the bump 7 made of Au, and is made of the same Au as the bump 7.

By the way, in such a semiconductor device, the probe is used in a state where the wiring including the pad 2 and the lead wire 3 is formed on the upper surface of the silicon wafer 1 and the passivation film 4 having the opening 5 is formed. The operation test may have been performed. In this case, although not shown,
A probe composed of a leaf spring needle is pressed against the surface of the pad 2. However, since tungsten having a high wear resistance is generally used as the material of the probe, for example, as shown in FIG. 3, a pad 2 made of relatively soft Al has a width of 20 to 30 μm and a length of 40 to 40 μm. 60
A probe mark 8 of about μm remains. This probe mark 8
For example, as shown in FIG. 4, it may rise and reach a maximum of about 1 μm.

When the underlying metal layer 6 is formed on the surface of the pad 2 having the probe mark 8 by a thin film forming technique such as sputtering or vacuum deposition, the underlying metal layer 6 is formed even in the case of sputtering with good step coverage. It cannot be formed uniformly, and the original effect of the underlying metal layer 6 is diminished. That is, as shown in FIG.
The base metal layer 6 is not formed around the bumps, and the bumps 7 made of Au formed on the base metal come into direct contact with the pads 2 made of Al, causing mutual diffusion of Au into Al and Al into Au. Especially, Al forming the pad 2 is eaten by Au, and an intermetallic compound of Al and Au is formed around the probe mark 8. Since this intermetallic compound is hard and brittle, the initial strength of the bump 7 is lowered, and there is almost no barrier effect (Au, Al diffusion preventing effect), so that the heat resistance is particularly weakened. Therefore, conventionally, in order to solve the inconvenience caused by the probe mark 8 as described above, the thickness of the base metal layer 6 is increased.

[0006]

However, in such a conventional semiconductor device, since the thickness of the base metal layer 6 is only increased, the disadvantage caused by the probe mark 8 can be completely solved. In addition to the above problems, there is a problem that it takes time to form the base metal layer 6 and productivity is lowered, and the internal stress of the base metal layer 6 increases. An object of the present invention is to provide a semiconductor device provided with a bump that can completely solve the inconvenience caused by a probe mark without increasing the thickness of the underlying metal layer, and a method for manufacturing the same.

[0007]

According to the present invention, a pad is constituted by a bump forming region and a test contact region.

[0008]

According to the present invention, even if a probe mark is generated on the surface of the pad in the test contact area, the underlying metal layer can be formed on the pad in the bump formation area with a uniform thickness.
Therefore, it is possible to completely solve the inconvenience caused by the trace of the probe without increasing the thickness of the underlying metal layer.

[0009]

1 (A) and 1 (B) show the essential parts of a semiconductor device according to an embodiment of the present invention. In these figures, parts having the same names as those in FIGS. 2A and 2B are designated by the same reference numerals, and description thereof will be omitted as appropriate. In this semiconductor device, a wiring including a rectangular pad 2 and a lead wire 3 drawn from the pad 2 is formed of Al on the upper surface of a silicon wafer 1. A predetermined half of the rectangular pad 2 is a bump forming area 2a, and the other half is a test contact area 2b.
A passivation film 4 made of silicon nitride or the like is formed on the entire upper surface of the silicon wafer 1 including wiring.
In this case, a rectangular opening 5 is formed in the passivation film 4 in a portion corresponding to almost the entire area of the pad 2 by etching, and a part of the pad 2 is exposed through this opening 5. Further, after the test described below is performed, an insulating film 9 made of a heat-resistant organic film such as polyimide is formed on the entire upper surfaces of the exposed pad 2 and the passivation film 4 by a spin coating method to a thickness of about 1 to 3 μm. ing. In this case, a substantially square opening 10 is formed in the insulating film 9 in a portion corresponding to almost the entire bump forming region 2a of the pad 2 by etching.
The bump forming region 2a of the pad 2 is formed through the opening 10.
Part of is exposed. On the upper surface of the bump forming region 2a of the pad 2 in this exposed portion and the upper surface of the insulating film 9 around it, the bump 7 made of Au is provided with the underlying metal layer 6 made of the adhesive layer 6a, the barrier layer 6b and the surface layer 6c interposed therebetween. Are formed.

When conducting a test using a probe in this semiconductor device, the wiring including the pad 2 and the lead wire 3 is formed on the upper surface of the silicon wafer 1 and the opening 5 is formed as in the conventional case. In the state where the passivation film 4 is formed, a probe (not shown) made of a leaf spring needle is attached to the test contact area 2b of the pad 2.
Will be pressed against the surface of. As a result, the probe mark 8 having a width of about 20 to 30 μm and a length of about 40 to 60 μm remains on the surface of the test contact region 2b of the pad 2. As shown in FIG. 1 (B), this probe mark 8 rises and may reach up to about 1 μm.

In this semiconductor device, however, the pad 2
Of the bump formation region 2a and the insulating film 9 around it
Since the bump 7 is formed on the upper surface of the pad 2 via the base metal layer 6, even if the probe mark 8 is formed on the surface of the test contact region 2b of the pad 2, the base metal layer is formed on the bump formation region 2a of the pad 2. 6 can be formed with a uniform thickness, and therefore the disadvantages caused by the probe mark 8 can be completely solved without increasing the thickness of the underlying metal layer 6. The thickness of the base metal layer 6 is, for example, Ti, Cr,
The thickness of the adhesive layer 6a made of TiW, Ni or the like is set to 200 to 2
The barrier layer 6b made of Pd, Cu or the like has a thickness of about 2000 to 4000 Å and the surface layer 6 made of Au.
The thickness of c can be about 500 to 1000Å. In addition, an insulating film 9 made of a heat-resistant organic film such as polyimide is formed on the surface of this semiconductor device to a thickness of 1 by spin coating.
Since it is formed to have a thickness of about 3 μm, the surface can be flattened, and as a result, the step coverage of the underlying metal layer 6 can be improved and the height accuracy of the bumps 7 can be improved.

[0012]

As described above, according to the present invention, even if a probe mark is formed on the surface of the pad in the test contact area, the base metal layer is formed with a uniform thickness on the pad in the bump formation area. Therefore, it is possible to completely solve the inconvenience caused by the trace of the probe without increasing the thickness of the underlying metal layer.

[Brief description of drawings]

FIG. 1A is a plan view of a main part of a semiconductor device according to an embodiment of the present invention, and FIG. 1B is a sectional view taken along line BB thereof.

FIG. 2A is a plan view of a part of a conventional semiconductor device,
(B) is sectional drawing which follows the BB line.

FIG. 3 is a plan view of this conventional semiconductor device after a probe test is performed.

FIG. 4 is a cross-sectional view shown for explaining an inconvenience caused by a probe mark in this conventional semiconductor device.

[Explanation of symbols]

 1 Silicon Wafer (Semiconductor Device Main Body) 2 Pad 2a Bump Forming Area 2b Test Contact Area 6 Base Metal Layer 7 Bump 8 Probe Trace 9 Insulating Film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 21/822

Claims (2)

[Claims] 1. A semiconductor device comprising a bump having a bump forming region and a test contact region, wherein the bump is formed on the bump forming region via a base metal layer. 2. A pad having a bump formation region and a test contact region is formed on a semiconductor device body, and an insulating film is formed on the entire upper surface except at least a part of the bump formation region. A method of manufacturing a semiconductor device having bumps, wherein bumps are formed on the base metal layer via a base metal layer.