JPH07191348A - Manufacture of liquid crystal display device - Google Patents
Manufacture of liquid crystal display deviceInfo
- Publication number
- JPH07191348A JPH07191348A JP33309793A JP33309793A JPH07191348A JP H07191348 A JPH07191348 A JP H07191348A JP 33309793 A JP33309793 A JP 33309793A JP 33309793 A JP33309793 A JP 33309793A JP H07191348 A JPH07191348 A JP H07191348A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- insulating film
- liquid crystal
- capacitor
- auxiliary capacitance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は液晶表示装置の製法に関
する。さらに詳しくは、スイッチング素子として薄膜ト
ランジスタ素子などを用いたアクティブマトリックス形
であって、画素数を増やした高精細化の液晶表示装置に
対しても開口率を低下させないで、高品位の液晶表示装
置がえられる液晶表示装置の製法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display device. More specifically, it is an active matrix type using a thin film transistor element or the like as a switching element, and a high-definition liquid crystal display device can be provided without lowering the aperture ratio even for a high-definition liquid crystal display device with an increased number of pixels. The present invention relates to a method of manufacturing a liquid crystal display device.
【0002】[0002]
【従来の技術】従来、薄膜トランジスタ(以下、TFT
という)素子などを用いたアクティブマトリックス形の
液晶表示装置(以下、LCDという)は、図2に示され
るごとく、液晶層51の各画素に電圧を加えるために、T
FT素子52によって画素電極をスイッチするものであ
り、各行、または列ごとにパルス的に短時間電圧が印加
されるのを繰り返すため、印加電圧がOFFとなったあ
とも液晶層51に電圧を加えておく必要がある。そのた
め、電荷を保持するための補助容量53が設けられてい
る。液晶層51そのものを補助容量として用いるばあい、
容量が小さく保持動作が不充分であったり、寄生容量が
発生するなど表示される映像にわるい影響を与える。そ
のため液晶層51とは別に補助容量53が備えられている。
なお、図中54は横方向に並んだ各画素のTFTのゲート
電極を連結したゲート線であり、55は縦方向に並んだ各
画素のTFTのソース電極を連結したソース線であり、
56はコモン電極である。補助容量53には、図4の(a)
に示すように、画素電極の中央部に独自に設けられる蓄
積容量と、図3の(a)に示すように、ゲート線の一部
を共用した付加容量の2種類がある。2. Description of the Related Art Conventionally, a thin film transistor (hereinafter referred to as a TFT
2), an active matrix type liquid crystal display device (hereinafter, referred to as LCD) using an element or the like is provided in order to apply a voltage to each pixel of the liquid crystal layer 51 as shown in FIG.
The pixel electrode is switched by the FT element 52, and the short-time voltage application is repeated in each row or column for a short time. Therefore, a voltage is applied to the liquid crystal layer 51 even after the applied voltage is turned off. Need to be kept. Therefore, the auxiliary capacitance 53 for holding the electric charge is provided. When the liquid crystal layer 51 itself is used as an auxiliary capacitor,
The capacitance is small and the holding operation is insufficient, and parasitic capacitance is generated, which adversely affects the displayed image. Therefore, an auxiliary capacitor 53 is provided separately from the liquid crystal layer 51.
In the figure, 54 is a gate line connecting the gate electrodes of the TFTs of the pixels arranged in the horizontal direction, 55 is a source line connecting the source electrodes of the TFTs of the pixels arranged in the vertical direction,
56 is a common electrode. In the auxiliary capacitor 53, (a) of FIG.
As shown in FIG. 3, there are two types, that is, a storage capacitor that is uniquely provided in the central portion of the pixel electrode, and an additional capacitor that shares a part of the gate line as shown in FIG.
【0003】図3(a)、(b)に示されるように、ゲ
ート線54aと連結した電極膜58aを一方の電極とする付
加容量53aは画素の端部に配置されるため、画素の開口
率を大きくできるが、一方ではゲート線に容量が付加さ
れるため、配線遅延が大きくなり、応答性が低下すると
いう欠点がある。As shown in FIGS. 3 (a) and 3 (b), the additional capacitance 53a having one electrode of the electrode film 58a connected to the gate line 54a is arranged at the end of the pixel, so that the opening of the pixel is opened. Although the rate can be increased, on the other hand, since capacitance is added to the gate line, there is a drawback that wiring delay increases and responsiveness decreases.
【0004】一方、図4(a)、(b)に示されるよう
に、ゲート線54とは別に専用の接続線59に電極膜58bが
設けられる蓄積容量53bは、開口率は劣るが、ゲート線
54に影響を与えないため、表示の均一性を確保しやすく
なる。On the other hand, as shown in FIGS. 4A and 4B, a storage capacitor 53b in which an electrode film 58b is provided on a dedicated connection line 59 in addition to the gate line 54 has a poor aperture ratio, line
Since it does not affect 54, it becomes easier to ensure display uniformity.
【0005】たとえば、図4(a)、(b)に示される
LCDのTFTおよび補助容量部分は、つぎのようにし
て作られる。For example, the TFT and the auxiliary capacitance portion of the LCD shown in FIGS. 4 (a) and 4 (b) are manufactured as follows.
【0006】まずガラスなどの透明絶縁基板67aにA
l、Crなどの金属からなるゲート電極60、蓄積容量53
b用の電極58bを形成したのち、SiNx 、SiOx な
どからなるゲート絶縁膜65を成膜する。つぎに、前記ゲ
ート電極60の上部で、ゲート絶縁膜65上に、アモルファ
スシリコンやポリシリコンなどからなる半導体膜62を設
ける。ついで、ゲート絶縁膜65表面に表示用画素電極57
を設け、さらに、半導体層62上に高不純物がドープされ
たアモルファスシリコンなどからなるソース領域61a、
ドレイン領域63aを介して、ゲート電極60と同様の材料
からなるソース電極61、ドレイン電極63を設け、その表
面にパッシベーション膜66を設ける。なお、68は対向透
明基板67bの電極である。First, a transparent insulating substrate 67a made of glass or the like is provided with A
1, a gate electrode 60 made of a metal such as Cr, a storage capacitor 53
After forming the electrode 58b for b, the gate insulating film 65 made of SiN x , SiO x or the like is formed. Next, a semiconductor film 62 made of amorphous silicon or polysilicon is provided on the gate insulating film 65 above the gate electrode 60. Then, the display pixel electrode 57 is formed on the surface of the gate insulating film 65.
And a source region 61a made of amorphous silicon doped with a high impurity on the semiconductor layer 62,
A source electrode 61 and a drain electrode 63 made of the same material as the gate electrode 60 are provided through the drain region 63a, and a passivation film 66 is provided on the surface thereof. In addition, 68 is an electrode of the opposing transparent substrate 67b.
【0007】[0007]
【発明が解決しようとする課題】前記従来のLCDの製
法では、ドットマトリックスの高精細化、高微細化に伴
ない画素を小さくする必要があり、補助容量は一定値が
必要となるため、補助容量53の種類にかかわらず、画素
電極57の面積に対して補助容量53の面積の割合が高くな
る。その結果、相対的に開口率が低下し、表示される映
像の輝度およびコントラストが低下するという問題があ
る。In the above-described conventional LCD manufacturing method, it is necessary to reduce the pixel size in accordance with the finer and finer dot matrix, and the auxiliary capacitance requires a constant value. The ratio of the area of the auxiliary capacitor 53 to the area of the pixel electrode 57 is high regardless of the type of the capacitor 53. As a result, there is a problem that the aperture ratio relatively decreases, and the brightness and contrast of the displayed image decrease.
【0008】本発明はかかる問題を解消するためになさ
れたものであり、所望の静電容量を確保し、同時に各画
素の光学的開口率が上昇し、映像の輝度およびコントラ
ストが向上したLCDの製法を提供することを目的とす
る。The present invention has been made in order to solve such a problem, and an LCD in which a desired capacitance is ensured and at the same time the optical aperture ratio of each pixel is increased and the brightness and contrast of an image are improved is provided. The purpose is to provide a manufacturing method.
【0009】[0009]
【課題を解決するための手段】本発明のLCDの製法
は、液晶層が2枚の透明基板で挟持され、一方の透明基
板の前記液晶層側に薄膜トランジスタおよび補助容量が
設けられてなる液晶表示装置の製法であって、前記薄膜
トランジスタおよび補助容量の形成を、(a)前記透明
基板上にゲート電極および前記補助容量用の電極を形成
し、(b)該ゲート電極および補助容量用電極が形成さ
れた透明基板上に層間絶縁膜を成膜し、(c)前記補助
容量用電極の上に積層された層間絶縁膜の部分をエッチ
ングすることにより薄くし、(d)前記ゲート電極の上
に前記層間絶縁膜を介して半導体層を設け、(e)前記
層間絶縁膜表面に画素電極を設け、さらに前記半導体層
上にドレイン電極およびソース電極を設けることにより
形成することを特徴とする。The LCD manufacturing method of the present invention is a liquid crystal display in which a liquid crystal layer is sandwiched between two transparent substrates, and a thin film transistor and an auxiliary capacitor are provided on the liquid crystal layer side of one transparent substrate. A method of manufacturing a device, comprising: (a) forming a gate electrode and an electrode for the auxiliary capacitance on the transparent substrate; and (b) forming the gate electrode and the electrode for the auxiliary capacitance. An interlayer insulating film is formed on the formed transparent substrate, and (c) a portion of the interlayer insulating film laminated on the auxiliary capacitance electrode is thinned by etching, and (d) on the gate electrode. A semiconductor layer is provided through the interlayer insulating film, (e) a pixel electrode is provided on the surface of the interlayer insulating film, and a drain electrode and a source electrode are provided on the semiconductor layer. To.
【0010】[0010]
【作用】本発明のLCDの製法によれば、補助容量の絶
縁膜の膜厚を薄くするために、従来の同一容量の補助容
量を形成し、かつ、補助容量面積は従来より減少させる
ことができる。すなわち、補助容量面積を小さくできる
ため、開口率を向上することができ、結果としてLCD
の高精細化、高微細化に対応することができる。According to the LCD manufacturing method of the present invention, in order to reduce the film thickness of the insulating film of the auxiliary capacitance, it is possible to form the auxiliary capacitance of the same conventional capacitance and reduce the auxiliary capacitance area from the conventional one. it can. That is, since the auxiliary capacitance area can be reduced, the aperture ratio can be improved, and as a result, the LCD can be improved.
It is possible to cope with higher definition and higher definition.
【0011】[0011]
【実施例】つぎに図面を参照しながら本発明のLCDの
製法を説明する。図1は、本発明の液晶表示装置の製法
の透明基板上にTFTと補助容量を形成する工程を示し
た図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing an LCD of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a process of forming a TFT and an auxiliary capacitor on a transparent substrate in a method of manufacturing a liquid crystal display device of the present invention.
【0012】まず図1(a)に示されるように、ガラス
やポリエステルフィルムからなる透明基板1上にスパッ
タリング法などによりCr、Alなどの金属膜を設け、
パターニングによりゲート電極2および補助容量用電極
3を形成する。First, as shown in FIG. 1A, a metal film such as Cr or Al is provided on the transparent substrate 1 made of glass or polyester film by a sputtering method or the like.
The gate electrode 2 and the auxiliary capacitance electrode 3 are formed by patterning.
【0013】つぎに、ゲート電極2と補助容量用電極3
が形成された透明基板1上に、チッ化ケイ素や酸化ケイ
素などからなる層間絶縁膜4をたとえばCVD法などに
より0.4〜 0.6μmの厚さ成膜する。Next, the gate electrode 2 and the auxiliary capacitance electrode 3
An interlayer insulating film 4 made of silicon nitride, silicon oxide, or the like is formed on the transparent substrate 1 on which the film has been formed to a thickness of 0.4 to 0.6 μm by, for example, the CVD method.
【0014】ついで、図1(b)に示されるように、前
記層間絶縁膜4の上にフォトレジスト膜5を設け、補助
容量用電極3の上部を開口する。そののち、図1(c)
に示されるように、パターニングされたフォトレジスト
膜5をマスクとして補助容量用電極3上の層間絶縁膜4
をエッチングし、 0.3〜 0.5μmの厚さになるように薄
くする。このエッチングはフッ酸液などを使用するウェ
ットエッチングまたはリアクティブイオンエッチング
(RIE)法などのドライエッチングでもよい。Next, as shown in FIG. 1B, a photoresist film 5 is provided on the interlayer insulating film 4, and an upper portion of the auxiliary capacitance electrode 3 is opened. After that, Figure 1 (c)
As shown in FIG. 2, the patterned photoresist film 5 is used as a mask to form the interlayer insulating film 4 on the auxiliary capacitance electrode 3.
Is etched and thinned to a thickness of 0.3 to 0.5 μm. This etching may be wet etching using a hydrofluoric acid solution or dry etching such as reactive ion etching (RIE).
【0015】一般に、補助容量の容量Cは、誘電体膜両
側の電極の面積Sおよび誘電体膜の誘電率εに比例し、
電極間の距離dに反比例する(C=εS/d)ので、た
とえば層間絶縁膜4の厚さdを1/2にすれば、キャパ
シタの電極面積を1/2にしても目的の容量をうること
ができる。したがって、層間絶縁膜4の厚さは薄いほど
電極面積を小さくすることができるが、あまり薄いと両
電極間の耐圧が低下するので、 0.3〜 0.5μm程度にす
るのが好ましい。そののちフォトレジスト膜5を酸素プ
ラズマなどにより除去する。Generally, the capacitance C of the auxiliary capacitance is proportional to the area S of the electrodes on both sides of the dielectric film and the dielectric constant ε of the dielectric film,
Since it is inversely proportional to the distance d between the electrodes (C = εS / d), if the thickness d of the interlayer insulating film 4 is halved, the target capacitance can be obtained even if the electrode area of the capacitor is halved. be able to. Therefore, the thinner the interlayer insulating film 4 is, the smaller the electrode area can be made. However, if it is too thin, the withstand voltage between both electrodes is lowered, so that the thickness is preferably about 0.3 to 0.5 μm. After that, the photoresist film 5 is removed by oxygen plasma or the like.
【0016】ついでゲート絶縁膜4a上にアモルファス
シリコンなどからなる半導体層7を形成し、その両側に
それぞれたとえばn+ 形の導電形の不純物を含むアモル
ファスシリコンなどからなるソース領域8およびドレイ
ン領域9を形成する。そして、ドレイン領域9に接続さ
れ、かつ前記補助容量用電極3とで補助容量のキャパシ
タ用絶縁膜4bを挟むように、層間絶縁膜4上にIT
O、SnO2 、In2 O3 などからなり、各画素の駆動
電極となる画素電極(ITO膜で代表する)6を形成す
る。これにより層間絶縁膜4を誘電体とする補助容量12
が形成される。ついで、ソース領域8とソース線(図示
されていない)のあいだおよびドレイン領域9と画素電
極6とのあいだをそれぞれスパッタ法などにより形成し
たアルミニウムなどからなるソース電極10およびドレイ
ン電極11によって電気的に接続する。(図1(d)参
照)。この表面にさらにチッ化ケイ素や酸化ケイ素など
からなるパッシベーション膜、ポリイミドなどからなる
配向膜(図示せず)などが設けられる。Next, a semiconductor layer 7 made of amorphous silicon or the like is formed on the gate insulating film 4a, and a source region 8 and a drain region 9 made of amorphous silicon containing impurities of, for example, n + type conductivity are formed on both sides of the semiconductor layer 7. Form. Then, the IT is formed on the interlayer insulating film 4 so as to be connected to the drain region 9 and sandwich the capacitor insulating film 4b of the auxiliary capacitor with the auxiliary capacitor electrode 3.
A pixel electrode (represented by an ITO film) 6 made of O, SnO 2 , In 2 O 3 or the like and serving as a drive electrode of each pixel is formed. As a result, the auxiliary capacitance 12 having the interlayer insulating film 4 as a dielectric is formed.
Is formed. Then, electrically between the source region 8 and the source line (not shown) and between the drain region 9 and the pixel electrode 6 by a source electrode 10 and a drain electrode 11 made of aluminum or the like formed by a sputtering method or the like, electrically. Connecting. (See FIG. 1 (d)). On this surface, a passivation film made of silicon nitride or silicon oxide, an alignment film (not shown) made of polyimide or the like is further provided.
【0017】このようにしてTFTと補助容量や画素電
極がマトリックス状に一度に形成されると共に、表示パ
ネルの複数個分が大きな透明基板に一度に形成され、一
方の透明基板が形成される。他方の透明基板にも電極膜
や配向膜などが形成され、両透明基板の配向膜側が対向
するようにスペーサを介してシール剤層により貼り合わ
され、各表示パネル毎に切断する。そののち両透明基板
間に液晶材料を充填し、さらに透明基板の両外側に偏光
板を設けることにより液晶表示パネルが形成され、バッ
クライトなどの光源や駆動回路などが接続されてLCD
になる。In this way, TFTs, auxiliary capacitors and pixel electrodes are formed at once in a matrix, and a plurality of display panels are formed on a large transparent substrate at one time to form one transparent substrate. An electrode film, an alignment film and the like are formed on the other transparent substrate, and the transparent film and the transparent film are attached to each other by a sealant layer so that the alignment film sides of the two transparent substrates face each other, and cut for each display panel. After that, a liquid crystal material is filled between both transparent substrates, and a polarizing plate is provided on both outer sides of the transparent substrate to form a liquid crystal display panel. A light source such as a backlight and a drive circuit are connected to the LCD.
become.
【0018】本発明のLCDの製法では、前述のよう
に、各画素用のTFT13のゲート絶縁膜4aと補助容量
12用のキャパシタ用絶縁膜4bを同一工程で形成したの
ち、キャパシタ用絶縁膜4bのみをエッチングにより薄
くして小さい面積で大きな容量がえられる補助容量12を
形成することに特徴がある。すなわち、ゲート絶縁膜4
aは絶縁破壊防止の理由から 0.4μm以上の膜厚を必要
とするのに対し、補助容量12のキャパシタ絶縁膜4bは
面積が広いため 0.3μm程度でもよいが、エッチングす
ると欠陥が生じ易く、層間絶縁膜をエッチングすること
は考えられていない。しかし、液晶表示装置の高精細
化、高品位化に伴ない、非表示領域であるTFTや補助
容量部の面積を縮小化することにより画素を小さくして
走査線を増やすと共に、各画素の表示面積の割合を落さ
ないで、開口率を高く維持することが要求されている。
TFTについては面積の縮小化は限界にあり、補助容量
の面積を縮小することにより、開口率を向上させるもの
である。このばあい、補助容量のキャパシタ用絶縁膜に
誘電率の大きい材料を使用することも、補助容量の面積
を縮小するのに効果があるが、大きな基板への誘電率の
大きい材料を成膜することの困難性から本発明者らは補
助容量上の絶縁膜を薄くすることにより開口率の向上を
図った。In the LCD manufacturing method of the present invention, as described above, the gate insulating film 4a of the TFT 13 for each pixel and the auxiliary capacitance are formed.
It is characterized in that after forming the capacitor insulating film 4b for 12 in the same process, only the capacitor insulating film 4b is thinned by etching to form the auxiliary capacitor 12 capable of obtaining a large capacitance in a small area. That is, the gate insulating film 4
a requires a film thickness of 0.4 μm or more for the purpose of preventing dielectric breakdown, whereas the capacitor insulating film 4b of the auxiliary capacitance 12 has a large area, it may be about 0.3 μm. Etching the insulating film is not considered. However, with the high definition and high quality of the liquid crystal display device, the area of the non-display area TFT or the auxiliary capacitance portion is reduced to make the pixel smaller and increase the scanning lines, and display each pixel. It is required to maintain a high aperture ratio without decreasing the area ratio.
Regarding the TFT, there is a limit to the reduction of the area, and the aperture ratio is improved by reducing the area of the auxiliary capacitance. In this case, using a material having a large dielectric constant for the capacitor insulating film of the auxiliary capacitor is also effective in reducing the area of the auxiliary capacitor, but deposits a material having a large dielectric constant on a large substrate. Due to this difficulty, the present inventors sought to improve the aperture ratio by thinning the insulating film on the storage capacitor.
【0019】本発明によりキャパシタ用絶縁膜の厚さを
0.4μmから 0.3μmにして補助容量の面積を25%減少
して製造した結果、開口率は12%向上できた。According to the present invention, the thickness of the insulating film for capacitors can be reduced.
As a result of reducing the area of the auxiliary capacitance by 25% from 0.4 μm to 0.3 μm, the aperture ratio could be improved by 12%.
【0020】[0020]
【発明の効果】本発明のLCDの製法によれば、画素の
開口率および補助容量の容量の確保を同時に達成するこ
とができるため、低消費電力で、高精細化、高品位化の
液晶表示画像がえられる。したがって近年開発され、実
用化されている高品位のハイビジョンテレビなどにも適
用できると共に、通常の液晶表示装置でも開口率が向上
し、輝度やコントラストが向上する。According to the LCD manufacturing method of the present invention, it is possible to simultaneously secure the aperture ratio of the pixel and the capacity of the auxiliary capacitor, so that the liquid crystal display of low power consumption, high definition and high quality can be obtained. You can get an image. Therefore, it can be applied to a high-definition high-definition television which has been developed and put into practical use in recent years, and the aperture ratio is improved and the brightness and the contrast are improved even in a normal liquid crystal display device.
【図1】本発明のLCDの製造工程の一実施例を示す断
面説明図である。FIG. 1 is a sectional explanatory view showing an embodiment of a manufacturing process of an LCD of the present invention.
【図2】TFTを有するLCDの一例を示す等価回路図
である。FIG. 2 is an equivalent circuit diagram showing an example of an LCD having a TFT.
【図3】従来のLCDの一例を示す図で、(a)は平面
説明図、(b)はその断面説明図である。3A and 3B are diagrams showing an example of a conventional LCD, in which FIG. 3A is an explanatory plan view and FIG. 3B is an explanatory sectional view thereof.
【図4】従来のLCDの他の例を示す図で、(a)は平
面説明図、(b)はその断面説明図である。FIG. 4 is a diagram showing another example of a conventional LCD, in which (a) is a plan view and (b) is a cross-sectional view thereof.
1 透明基板 2 ゲート電極 3 補助容量用電極 4 層間絶縁膜 5 フォトレジスト膜 6 画素電極 7 半導体層 10 ソース電極 11 ドレイン電極 12 補助容量 13 TFT 1 transparent substrate 2 gate electrode 3 auxiliary capacitance electrode 4 interlayer insulating film 5 photoresist film 6 pixel electrode 7 semiconductor layer 10 source electrode 11 drain electrode 12 auxiliary capacitance 13 TFT
───────────────────────────────────────────────────── フロントページの続き (72)発明者 高村 誠 京都市右京区西院溝崎町21番地 ローム株 式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Makoto Takamura, 21 Mizozaki-cho, Saiin, Ukyo-ku, Kyoto ROHM Co., Ltd.
Claims (1)
方の透明基板の前記液晶層側に薄膜トランジスタおよび
補助容量が設けられてなる液晶表示装置の製法であっ
て、前記薄膜トランジスタおよび補助容量の形成を、
(a)前記透明基板上にゲート電極および前記補助容量
用の電極を形成し、(b)該ゲート電極および補助容量
用電極が形成された透明基板上に層間絶縁膜を成膜し、
(c)前記補助容量用電極の上に積層された層間絶縁膜
の部分をエッチングすることにより薄くし、(d)前記
ゲート電極の上に前記層間絶縁膜を介して半導体層を設
け、(e)前記層間絶縁膜表面に画素電極を設け、さら
に前記半導体層上にドレイン電極およびソース電極を設
けることにより形成することを特徴とする液晶表示装置
の製法。1. A method of manufacturing a liquid crystal display device, wherein a liquid crystal layer is sandwiched between two transparent substrates, and a thin film transistor and an auxiliary capacitance are provided on one of the transparent substrates on the liquid crystal layer side. Formation of
(A) forming a gate electrode and an electrode for the auxiliary capacitance on the transparent substrate, and (b) forming an interlayer insulating film on the transparent substrate on which the gate electrode and the electrode for the auxiliary capacitance are formed,
(C) A portion of the interlayer insulating film laminated on the auxiliary capacitance electrode is thinned by etching, (d) a semiconductor layer is provided on the gate electrode via the interlayer insulating film, (e) ) A method for manufacturing a liquid crystal display device, comprising forming a pixel electrode on the surface of the interlayer insulating film and further providing a drain electrode and a source electrode on the semiconductor layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33309793A JPH07191348A (en) | 1993-12-27 | 1993-12-27 | Manufacture of liquid crystal display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33309793A JPH07191348A (en) | 1993-12-27 | 1993-12-27 | Manufacture of liquid crystal display device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07191348A true JPH07191348A (en) | 1995-07-28 |
Family
ID=18262249
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP33309793A Pending JPH07191348A (en) | 1993-12-27 | 1993-12-27 | Manufacture of liquid crystal display device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07191348A (en) |
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