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JPH0719973B2 - Multilayer wiring board - Google Patents

Multilayer wiring board

Info

Publication number
JPH0719973B2
JPH0719973B2 JP29602590A JP29602590A JPH0719973B2 JP H0719973 B2 JPH0719973 B2 JP H0719973B2 JP 29602590 A JP29602590 A JP 29602590A JP 29602590 A JP29602590 A JP 29602590A JP H0719973 B2 JPH0719973 B2 JP H0719973B2
Authority
JP
Japan
Prior art keywords
conductor wiring
wiring
insulator
wiring board
interlayer insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP29602590A
Other languages
Japanese (ja)
Other versions
JPH04167596A (en
Inventor
直典 下戸
孝二 松井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP29602590A priority Critical patent/JPH0719973B2/en
Publication of JPH04167596A publication Critical patent/JPH04167596A/en
Publication of JPH0719973B2 publication Critical patent/JPH0719973B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は集積度の高いLSI実装用基板に関して、微細か
つ高多層配線ができ、高密度実装が可能な多層配線基板
に関するものである。
Description: TECHNICAL FIELD The present invention relates to an LSI mounting substrate having a high degree of integration, and to a multilayer wiring substrate capable of fine and highly multilayer wiring and capable of high-density mounting.

(従来の技術) 従来、この種の多層配線基板は、配線抵抗の低いCuを主
成分とする導体配線と、ポリイミド樹脂からなる導体配
線の層間絶縁体から構成されている。
(Prior Art) Conventionally, a multilayer wiring board of this type is composed of a conductor wiring mainly composed of Cu having a low wiring resistance and an interlayer insulator of the conductor wiring made of a polyimide resin.

第3図に従来技術による多層配線基板の構成図を示す。
基板31の表面に導体層32が設けられる。この導体層32は
Cr/Pd/Cu、あるいはCr/Cu/Cr膜などの複数層構成を有し
ている。そして全表面に感光製を有したポリイミド樹脂
層間絶縁膜33をコーティングし、光によりビアホール34
が形成される。この上にさらに導体配線層35が形成され
る。
FIG. 3 shows a configuration diagram of a multilayer wiring board according to the prior art.
The conductor layer 32 is provided on the surface of the substrate 31. This conductor layer 32
It has a multi-layer structure such as Cr / Pd / Cu or Cr / Cu / Cr film. Then, the entire surface is coated with a photo-sensitive polyimide resin interlayer insulating film 33, and a via hole 34 is formed by light.
Is formed. A conductor wiring layer 35 is further formed on this.

(発明が解決しようとする課題) 上述した従来の多層配線基板は、層間絶縁体に用いてい
るポリイミド樹脂の硬化温度が高く、また硬化中におい
て脱水反応があり、さらには硬化膜の吸水性が大きいの
で、配線抵抗の低いCuを主成分とする導体配線を用いた
場合、Cu配線の酸化、腐食などを引き起こす欠点があ
る。
(Problems to be Solved by the Invention) In the conventional multilayer wiring board described above, the curing temperature of the polyimide resin used for the interlayer insulator is high, there is a dehydration reaction during curing, and further, the water absorption of the cured film is high. Since it is large, the use of a conductor wiring containing Cu as a main component, which has a low wiring resistance, has a drawback of causing oxidation and corrosion of the Cu wiring.

さらには層間絶縁体にポリイミドを用いているため、Cu
イオンがポリイミド樹脂絶縁体中に拡散してしまい。こ
のためイオンのマイグレーションを引き起こし、絶縁性
が著しく低下するという欠点もある。
Furthermore, since polyimide is used for the interlayer insulator, Cu
Ions diffuse into the polyimide resin insulation. For this reason, there is a drawback that the migration of ions is caused and the insulating property is significantly lowered.

このため層間絶縁体にポリイミド樹脂を用いた従来の多
層配線基板では、Cuを主成分とする導体配線を用いるに
あたり、長期信頼性に欠くという問題点がある。
Therefore, the conventional multilayer wiring board using the polyimide resin as the interlayer insulator has a problem that long-term reliability is insufficient when using the conductor wiring containing Cu as a main component.

一方エレクトロニクス機器の高性能、高機能化の要求に
対し、高速伝送に対応した材料が必要となる。高速伝送
では特性インピーダンスを整合させ、かつ信号の伝播遅
延時間の短縮が要求されている。信号伝播遅延時間Tは
次式で示される。
On the other hand, in response to the demand for higher performance and higher functionality of electronic equipment, materials compatible with high-speed transmission are required. In high-speed transmission, it is required to match the characteristic impedance and shorten the signal propagation delay time. The signal propagation delay time T is expressed by the following equation.

(ただし、C:光速、ε:層間絶縁体の誘電率、K:定数) すなわち層間絶縁体の誘電率が低いほど信号伝播遅延時
間は短縮され、高速化が実現される。
(However, C: speed of light, ε: permittivity of interlayer insulator, K: constant) That is, the lower the permittivity of the interlayer insulator, the shorter the signal propagation delay time and the higher speed.

上述した従来の多層配線基板は、層間絶縁体に用いてい
るポリイミド樹脂の誘電率が3.5程度となっており、信
号伝播遅延時間が長くなるという欠点がある。
The above-mentioned conventional multilayer wiring board has a drawback that the polyimide resin used for the interlayer insulator has a dielectric constant of about 3.5, and the signal propagation delay time becomes long.

なお誘電率は、ASTMD150の測定法において、106Hzの周
波数での値を用いる。
Note dielectric constant, in the measurement method ASTMD150, using a value of a frequency of 10 6 Hz.

(課題を解決するための手段) 前述したように、配線抵抗の低いCuを主成分とした導体
配線を用いるにあたり、ポリイミド樹脂を層間絶縁膜と
して用いた場合、諸問題が発生している。これらの問題
を解決するため鋭意工夫を行なった。
(Means for Solving the Problems) As described above, various problems have occurred when using a polyimide resin as an interlayer insulating film when using a conductor wiring mainly composed of Cu having a low wiring resistance. Intensive efforts were made to solve these problems.

その結果、本発明の多層配線基板は、配線抵抗の低いCu
を主成分とする導体配線とベンゾシクロブテン樹脂から
なる層間絶縁体を有する構成、あるいは導体配線と導体
配線の層間絶縁体との層間にベンゾシクロブテン樹脂を
介した構成となっている。
As a result, the multilayer wiring board of the present invention has a low wiring resistance of Cu.
Or a benzocyclobutene resin is interposed between the conductor wiring and the interlayer insulator of the conductor wiring.

(作用) このベンゾシクロブテン樹脂は200℃、もしくはそれ以
下で硬化させることができ、また硬化膜は耐湿性にも優
れている。このためCu導体配線層上に、直接ベンゾシク
ロブテン樹脂を形成し、ベンゾシクロブテン樹脂層間絶
縁体を構成することにより、Cu配線の酸化、腐食を防ぐ
ことができる。
(Function) This benzocyclobutene resin can be cured at 200 ° C. or lower, and the cured film has excellent moisture resistance. Therefore, by forming the benzocyclobutene resin directly on the Cu conductor wiring layer to form the benzocyclobutene resin interlayer insulator, oxidation and corrosion of the Cu wiring can be prevented.

またはまず低温で膜が形成可能なベンゾシクロブテン樹
脂で導体配線を介して、そのあとにポリイミド樹脂絶縁
体などを形成することにより導体配線の酸化を防ぐこと
ができる。またポリイミド樹脂絶縁体中へのCuイオン拡
散を防ぎ、イオンのマイグレーションによる絶縁性の低
下も防ぐことができる。
Alternatively, oxidation of the conductor wiring can be prevented by first forming a film of benzocyclobutene resin capable of forming a film at a low temperature through the conductor wiring and then forming a polyimide resin insulator or the like. Further, it is possible to prevent Cu ion diffusion into the polyimide resin insulator and prevent deterioration of insulating property due to migration of ions.

さらには硬化したベンゾシクロブテン樹脂は耐湿性にも
優れていることから、長期的な導体配線の酸化、腐食を
防ぐことができる。
Furthermore, since the cured benzocyclobutene resin also has excellent moisture resistance, it is possible to prevent long-term oxidation and corrosion of the conductor wiring.

一方、ベンゾシクロブテン樹脂の誘電率は2.6と従来の
ポリイミドよりも低く、これを層間絶縁体として用いる
ことにより、信号伝播遅延時間を短縮することができ
る。
On the other hand, the dielectric constant of benzocyclobutene resin is 2.6, which is lower than that of conventional polyimide, and by using this as an interlayer insulator, the signal propagation delay time can be shortened.

(実施例) 次に本発明について図面を参照して説明する。第1図は
層間絶縁体にベンゾシクロブテン樹脂を有する本発明の
一実施例の構成図である。
(Example) Next, this invention is demonstrated with reference to drawings. FIG. 1 is a constitutional view of an embodiment of the present invention having a benzocyclobutene resin as an interlayer insulator.

シリコン、サファイア、あるいはアルミナなどを主成分
とするセラミックなどからなる基板11の表面に、Cuを主
成分とする導体配線層12が設けられる。
A conductor wiring layer 12 containing Cu as a main component is provided on the surface of a substrate 11 made of ceramics containing silicon, sapphire, or alumina as a main component.

そして全表面にベンゾシクロブテン樹脂絶縁体13をコー
ティングしたのち、この表面にフォトレジストでパター
ン形成させ、ベンゾシクロブテンをエッチングすること
により、ビアホール14を得ることができ、エッチングに
はプラズマエッチャーを用いることができ、ガスはCF4
とO2、あるいはSF6とO2混合ガスが適当である。
Then, after coating the benzocyclobutene resin insulator 13 on the entire surface, patterning this surface with a photoresist and etching the benzocyclobutene, a via hole 14 can be obtained, and a plasma etcher is used for etching. Can be CF 4 gas
And O 2 or SF 6 and O 2 mixed gas are suitable.

ビアホール形成後、導体配線層15は、全表面にCuスパッ
タ膜を形成しエッチングして得るか、あるいは全表面に
Crスパッタ膜を形成したのち、Cuスパッタ膜あるいはめ
っきCu箔を形成することにより得ることができる。
After forming the via hole, the conductor wiring layer 15 can be obtained by forming a Cu sputtered film on the entire surface and etching it, or by forming it on the entire surface.
It can be obtained by forming a Cu sputtered film or a plated Cu foil after forming a Cr sputtered film.

第2図は導体配線と導体配線の層間絶縁体との層間にベ
ンゾシクロブテン樹脂を介した構成を含む、本発明の一
実施例の構成図である。
FIG. 2 is a configuration diagram of an embodiment of the present invention including a configuration in which a benzocyclobutene resin is interposed between the conductor wiring and the interlayer insulator of the conductor wiring.

シリコン、サファイア、あるいはアルミナなどを主成分
とするセラミックなどからなる基板21の表面に、導体配
線層22が設けられる。この導体配線層22は複数個からな
り、最下層にはCrあるいはTiスパッタ膜を用いることが
でき、上層にはCu,Au,Alなとを用いることができる。
A conductor wiring layer (22) is provided on the surface of a substrate (21) made of ceramic or the like containing silicon, sapphire, or alumina as a main component. The conductor wiring layer 22 is composed of a plurality of layers. A Cr or Ti sputtered film can be used for the lowermost layer, and Cu, Au, Al, etc. can be used for the uppermost layer.

そして全表面にベンゾシクロブテン樹脂絶縁体23をコー
ティングしたのち硬化させ、その上にさらにポリイミド
樹脂絶縁体24をコーティングする。
Then, the entire surface is coated with a benzocyclobutene resin insulator 23 and then cured, and a polyimide resin insulator 24 is further coated thereon.

この絶縁体24のポリイミドは感光性を有し、光でパター
ン形成ができる。パターン形成したポリイミド樹脂絶縁
体24自体をそのままマスクとして用いて、ベンゾシクロ
ブテン樹脂絶縁体24をエッチングすることができ、これ
によりビアホール25を容易に形成することができる。エ
ッチングにはプラズマエッチャーを用いることができ、
ガスはCF4とO2、あるいはSF6とO2混合ガスが適当であ
る。
The polyimide of the insulator 24 has photosensitivity and can be patterned by light. Using the patterned polyimide resin insulator 24 itself as a mask, the benzocyclobutene resin insulator 24 can be etched, whereby the via hole 25 can be easily formed. A plasma etcher can be used for etching,
A suitable gas is CF 4 and O 2 , or SF 6 and O 2 mixed gas.

導体配線層26は複数個から構成され、ビアホール形成
後、全表面にCr、あるいはTiスパッタ膜を形成したの
ち、Cu,Au,Al膜などを形成することにより得ることがで
きる。
The conductor wiring layer 26 is composed of a plurality of layers, and can be obtained by forming a via hole, forming a Cr or Ti sputtered film on the entire surface, and then forming a Cu, Au, Al film or the like.

(発明の効果) 以上説明したように、本発明の多層配線基板は、導体配
線の層間絶縁体にベンゾシクロブテン樹脂を有するか、
あるいは導体配線と導体配線の層間絶縁体との層間にベ
ンゾシクロブテン樹脂を介した構成を有することによ
り、Cu導体配線の酸化、腐食を防ぎ、またCuイオンのマ
イグレーションによる絶縁性の低下を防ぐことができる
効果がある。
(Effect of the Invention) As described above, the multilayer wiring board of the present invention has a benzocyclobutene resin as the interlayer insulator of the conductor wiring,
Alternatively, by having a structure in which a benzocyclobutene resin is interposed between the conductor wiring and the interlayer insulator of the conductor wiring, oxidation and corrosion of the Cu conductor wiring can be prevented, and deterioration of insulation due to migration of Cu ions can be prevented. There is an effect that can be.

これにより配線抵抗の低いCuを主成分とする導体配線を
有した微細かつ高多層配線を形成することができ、高密
度実装が可能な多層配線基板を提供することができる。
As a result, it is possible to form a fine and highly multilayered wiring having a conductor wiring mainly composed of Cu having a low wiring resistance, and it is possible to provide a multilayered wiring board capable of high-density mounting.

またベンゾシクロブテン樹脂は誘電率が2.6と低く、こ
れを層間絶縁体として用いることにより、信号伝播遅延
時間が短縮されるという効果もある。
In addition, benzocyclobutene resin has a low dielectric constant of 2.6, and using this as an interlayer insulator also has the effect of reducing the signal propagation delay time.

【図面の簡単な説明】[Brief description of drawings]

第1図は層間絶縁体にベンゾシクロブテン樹脂を用いる
本発明の一実施例の構成図である。 第2図は導体配線と導体配線の層間絶縁体との層間に、
ベンゾシクロブテン樹脂を介した構成を有する本発明の
一実施例の構成図である。 第3図は従来技術による多層配線基板の構成図である。 図において、11,21,31……基板、12,15,22,26,32,35…
…導体配線層、13,23……ベンゾシクロブテン樹脂絶縁
体、14,25,34……ビアホール、24,33……ポリイミド樹
脂絶縁体である。
FIG. 1 is a configuration diagram of an embodiment of the present invention in which a benzocyclobutene resin is used as an interlayer insulator. Fig. 2 shows that between the conductor wiring and the interlayer insulator of the conductor wiring,
It is a block diagram of one Example of this invention which has the structure which interposed the benzocyclobutene resin. FIG. 3 is a block diagram of a multilayer wiring board according to the prior art. In the figure, 11,21,31 ... substrate, 12,15,22,26,32,35 ...
… Conductor wiring layer, 13,23 …… Benzocyclobutene resin insulator, 14, 25, 34 …… Via hole, 24, 33 …… Polyimide resin insulator.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】Cuを主成分とする導体配線を有し、ベンゾ
シクロブテン樹脂を導体配線の層間絶縁体に用いること
を特徴とする多層配線基板。
1. A multilayer wiring board having conductor wiring containing Cu as a main component and using benzocyclobutene resin as an interlayer insulator of the conductor wiring.
【請求項2】導体配線と導体配線の層間絶縁体との層間
に、ベンゾシクロブテン樹脂を介した構造を含むことを
特徴とする多層配線基板。
2. A multilayer wiring board comprising a structure in which a benzocyclobutene resin is interposed between the conductor wiring and an interlayer insulator of the conductor wiring.
JP29602590A 1990-10-31 1990-10-31 Multilayer wiring board Expired - Fee Related JPH0719973B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29602590A JPH0719973B2 (en) 1990-10-31 1990-10-31 Multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29602590A JPH0719973B2 (en) 1990-10-31 1990-10-31 Multilayer wiring board

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP8112558A Division JP2917909B2 (en) 1996-05-07 1996-05-07 Method for manufacturing multilayer wiring board

Publications (2)

Publication Number Publication Date
JPH04167596A JPH04167596A (en) 1992-06-15
JPH0719973B2 true JPH0719973B2 (en) 1995-03-06

Family

ID=17828143

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29602590A Expired - Fee Related JPH0719973B2 (en) 1990-10-31 1990-10-31 Multilayer wiring board

Country Status (1)

Country Link
JP (1) JPH0719973B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000003037A (en) * 1999-01-11 2000-01-07 Nec Corp Wiring structure and its production

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2531464B2 (en) * 1993-12-10 1996-09-04 日本電気株式会社 Semiconductor package
US6372534B1 (en) * 1995-06-06 2002-04-16 Lg. Philips Lcd Co., Ltd Method of making a TFT array with photo-imageable insulating layer over address lines
JPH09270325A (en) 1996-03-29 1997-10-14 Tokin Corp Electronic part
JP3390329B2 (en) * 1997-06-27 2003-03-24 日本電気株式会社 Semiconductor device and manufacturing method thereof
JP5370674B2 (en) * 2009-12-15 2013-12-18 Tdk株式会社 Electronic components

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000003037A (en) * 1999-01-11 2000-01-07 Nec Corp Wiring structure and its production

Also Published As

Publication number Publication date
JPH04167596A (en) 1992-06-15

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