JPH07135660A - Movement vector coder - Google Patents

Abstract

PURPOSE:To attain variable length coding with an excellent coding efficiency by storing a difference code in a difference code memory and transferring the difference code to a variable length coder in a preset order by the use of a memory data controller. CONSTITUTION:A movement vector is stored in a delay device 101. A difference period counter 102 counts the number of blocks to reset the delay device 101 every difference period. A difference coder 103 codes a difference between a current movement vector value and a stored value in the delay device 101 and stores the difference to a difference code memory 105. A memory data controller 106 transfers the difference code stored in the difference code memory 105 in the preset order to the variable length coder 104 synchronously with the difference period counter 102. In this case, the coding efficiency is improved by using a rearrangement pattern in which the number of difference codes of consecutive 0s is increased for example.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motion vector coding apparatus for performing high-efficiency coding of motion vectors in order to reduce the data amount of video signals when recording and transmitting video.

[0002]

2. Description of the Related Art In recent years, development of a device which digitally encodes a video signal has become popular due to advances in digital signal processing technology of video and semiconductor integration technology. One of the video signal encoding apparatuses is one that reduces redundancy in the time direction. MPEG is a representative example of this, and standardization work is currently underway. In MPEG, DCT (discrete cosine transform) is used for compression in the space direction, and motion compensation is used for compression in the time direction.

The motion compensation is to divide an input video signal into blocks of a certain size (for example, 16 horizontal pixels and 16 vertical pixels), and predict a frame which is a reproduced video signal of a previous frame.
It is an inter-frame prediction in which the prediction is performed by shifting the motion vector from the frame. Here, the motion vector is expressed as a vector in two directions, horizontal and vertical. The conventional technique will be described below based on a motion compensation coding system represented by MPEG.

FIG. 7 is a block diagram of a conventional motion compensation coding apparatus. In FIG. 7, 701 is a buffer memory, and 70
2 is a blocker, 703 is a frame memory, 704 is a motion vector detector, 705 is a prediction block signal generator, 706 is a subtractor, 707 is an orthogonal transformer, 708 is a quantizer, and 709 is an orthogonal transform encoder. , 710 is a motion vector encoder, 711 is an inverse quantizer, 712 is an inverse orthogonal transformer, 713 is an adder, and 714 and 715 are switches.

First, the video signal of the first frame is stored in the buffer memory 701. The stored video signal is divided into blocks of horizontal 16 pixels and vertical 16 pixels by the blocker 702. Since the predicted video signal does not exist in the video signal of the first frame, it is directly input to the orthogonal transformer 707 using the switch 714 and subjected to orthogonal transformation, and its transform coefficient is quantized by the quantizer 708, and the orthogonal transformation encoder 7
It is coded according to 09.

The quantized output is encoded, the inverse quantizer 711 performs the reverse operation of the quantizer 708, and the inverse orthogonal transformer 712 converts it into a video signal again. At this time, the switch 715 causes the adder 713 to be in a through state. The returned video signal is stored in the frame memory 703 and used for prediction of the next frame.

The buffer memory 7 stores the video signal of the next frame.
Stored in 01. Block the stored video signal 7
It divides into blocks of 16 horizontal pixels and 16 vertical pixels by 02. The video signal of each block uses the corresponding position on the decoded signal one frame before as the reference position, and the position with the smallest inter-frame prediction error within the predetermined search range as the motion vector.
The video signal of the block detected by 04 and displaced by the motion vector detected from the reference position of the signal one frame before is used as the prediction block signal.
5, the subtracter 706 calculates the difference from the block to be encoded.

The obtained difference signal is orthogonally transformed by an orthogonal transformer 707 to remove spatial redundancy, and its transform coefficient is quantized by a quantizer 708 and encoded by an orthogonal transform encoder 709. . On the other hand, the motion vector detected by the motion vector detector 704 is encoded using the motion vector encoder 710.

The quantized output is encoded, the inverse quantizer 711 performs the reverse operation of the quantizer 708, the inverse orthogonal transformer 712 transforms the difference signal again, and the adder 713 predicts the prediction block. The signal is added back to the video signal. The returned video signal is stored in the frame memory 703 and used for prediction of the next frame.

In the case where the input signal itself of the block to be encoded other than the first frame has a smaller code amount than the case where the differential signal is converted / encoded, the input signal is converted. Need to be encoded as is. Therefore, the switch 714 is used to switch the input to the orthogonal transformer 707. At this time, the orthogonal transformer 707
Since the output from is the video signal itself, switch 7
The prediction block signal is not added by 15.

The encoding of the motion vector, which is the main object of the present invention, will be described in detail below. As a motion vector coding method, in MPEG, a method of variable length coding a difference value from the motion vector of the immediately preceding block is used. This is because the difference values are concentrated in the vicinity of 0 in an image that often appears in a stationary state or during panning / zooming. Therefore, it is possible to reduce the code amount by variable-length encoding the difference values. Is. In MPEG, one-dimensional Huffman coding is used as a variable length coding method.

FIG. 8 shows a one-dimensional Huffman coding table used in MPEG. Here, the existence range of the motion vector is −15 to +15 both in the horizontal and vertical directions. Therefore, the existence range of the difference value of the motion vector is −30 to +30 in both the horizontal and vertical directions. MPEG
Uses fold-back coding as the differential coding method, and the existence range of the differential code value is halved from -16 to +15. As variable length codes for these difference codes, variable length codes having shorter code lengths are assigned in ascending order of the absolute values of the difference code values.

The differential encoding is performed in block units in which an error is propagated when an error occurs when decoding the differential data. This is the number of blocks from the coding of the true value of the motion vector to the coding of the true value of the next motion vector, and is defined as the difference cycle here.

FIG. 9 shows the motion vector encoder 710 of FIG.
3 is a detailed block diagram of FIG. In FIG. 9, the motion vector value to be encoded is the current motion vector value. In addition, the immediately previous motion vector value is set as the previous motion vector value. A delay unit 901 stores the motion vector value. A difference cycle counter 902 resets the delay device 901 for each difference cycle. A differential encoder 903 encodes the difference value between the current motion vector value and the stored value of the delay device 901. 904
Is a variable length encoder, which performs variable length encoding on the differential code encoded by the differential encoder 903.

FIG. 10 is a flow chart for explaining the operation of the detailed block shown in FIG. The processing procedure for the video signals of the first and second frames after the second frame will be described below.

(1001) The number of pixels is 800 horizontal pixels and 800 vertical pixels, and the block size is 16 horizontal pixels.
There are 16 vertical pixels, the total number of horizontal blocks is 50, and the total number of vertical blocks is 50. Further, the difference cycle is 10 blocks. As the initial value, the horizontal block of the target block is set to 0 block, the vertical block is set to 0 block, and the difference period block is set to 0 block. Go to (1002).

(1002) The horizontal and vertical motion vector values of the delay device 901 are initialized to 0, respectively.
Go to (1003).

(1003) The differential encoder 903 is used to encode the differential value between the current motion vector value and the value stored in the delay unit 901. Go to (1004).

(1004) The current motion vector value is delayed by the delay unit 9
Stored in 01. Go to (1005).

(1005) The variable length encoder 904 variable length encodes the differential code obtained by the differential encoder 903. Go to (1006).

(1006) The differential cycle counter 902 adds 1 to the differential cycle block. Go to (1007).

(1007) It is checked whether the difference period block is equal to 10 blocks of the difference period. If they are equal (10
Go to 08). If not, go to (1009).

(1008) The horizontal and vertical motion vector values of the delay device 901 are reset to 0, respectively.
Also, the difference period block is reset to 0. (100
Go to 9).

(1009) Add 1 to the horizontal block of the target block. Go to (1010).

(1010) It is checked whether the horizontal block of the target block is equal to 50, which is the total number of horizontal blocks.
If they are equal, go to (1011). If not,
Go to (1003).

(1011) The horizontal block of the target block is reset to 0. 1 for vertical block of target block
Is added. Go to (1012).

(1012) It is checked whether the vertical block of the target block is equal to 50 which is the total number of vertical blocks.
If they are equal, the process ends. Otherwise, (10
Go to 03).

Variable-length coding methods include one-dimensional Huffman coding used for motion vector coding in MPEG, and run-length coding used for coding quantized coefficients. In the run-length coding, the differential code values of the horizontal and vertical motion vectors of one or a plurality of consecutive blocks are collectively coded into one codeword for the blocks in the differential cycle. Also in the motion vector coding, it is effective to use the run length coding because the difference code value is often zero.

FIG. 11 shows an example of a code length table when run length coding is used for variable length coding of motion vectors. Here, the difference cycle is 10 blocks.
At this time, the number of motion vectors is 20 in the horizontal and vertical directions. In addition, folding coding is used as the differential coding method, and the existence range of the differential code value is from -16 to +.
Set to 15.

Run and value are defined as follows. run: Number of consecutive 0-valued difference codes (run = 0, ...,
19) value: Difference code value immediately after the difference code of consecutive 0 values
(value = -16, ..., + 15) (run, value): run, total run + 1
Individual information Here, if all are 0, the variable length codeword is (19,0). Since the code length of FIG. 11 does not include a sign bit representing positive or negative, the code length increases by 1 bit when value is not 0. Further, a portion where the code length is blank in FIG. 11 is converted into a combination of two codewords and encoded as shown below. (run, value)-> (run-1,0) + (0, value) Next, FIGS. 12 and 13 show variable length coding when run length coding is used for variable length coding of motion vectors. Show table. Here, the code word s is 0 when the input value is a positive number and 1 when the input value is a negative number.

When such a variable length encoder is used,
Since the number of consecutive differential codes having a value of 0 differs depending on the order of the differential codes transferred to the variable length encoder, variable length codes having different code lengths are generated. Therefore, in order to generate an efficient variable length code, it is necessary to transfer the differential codes from the differential encoder to the variable length encoder in an efficient order.

[0032]

However, in the conventional motion vector coding apparatus, since the differential codes are transferred to the variable length coder in the order in which the differential coding is performed, as described in the above-mentioned specific example, When a variable length coding method that depends on the order of input data such as run length coding is used, it is not always possible to transfer the differential codes to the variable length encoder in an efficient data order. Had challenges.

In view of the above point, the present invention has an object to provide a motion vector coding apparatus having high coding efficiency by transferring differential codes to a variable length coder in a preset order. is there.

[0034]

In order to achieve the above object, the present invention encodes the true value of a motion vector and then the true value of the motion vector when differentially encoding the motion vector value. When the number of blocks up to is the difference cycle, the motion vector value to be encoded is the current motion vector value, and the previous motion vector value is the previous motion vector value, the delay unit that stores the motion vector value and the block number A difference cycle counter that counts and resets the delay unit for each difference cycle, a difference encoder that encodes the difference value between the current motion vector value and the stored value of the delay unit, and a difference length variable-length code A variable length encoder, a difference code memory for storing the difference code encoded by the difference encoder, and a difference code stored in the difference code memory in synchronization with the difference cycle counter are preset. Turn transferred to the variable-length coder Memoride - those having the motor controller.

[0035]

According to the motion vector coding apparatus of the present invention having the above-mentioned configuration, the differential coding is performed using the differential coding unit to perform the differential coding between the current motion vector value and the previous motion vector value and store the differential code in the differential code memory. The differential code stored in the differential code memory is transferred to the differential encoder in a preset order for each differential cycle in synchronization with the differential cycle counter using the memory data controller.

[0036]

【Example】

(Embodiment 1) A motion vector coding apparatus according to a first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a motion vector coding apparatus according to a first embodiment of the present invention. Here, the motion vector encoder 710 of the motion vector encoder in the conventional example of FIG. 7 is used.
Only the difference is shown, and the configuration is described.

In FIG. 1, the motion vector value to be encoded is the current motion vector value, and the immediately preceding motion vector value is the previous motion vector value. 101 is a delay device which stores a motion vector value. A differential cycle counter 102 counts the number of blocks and resets the delay device 101 for each differential cycle. A difference encoder 103 encodes a difference value between the current motion vector value and the stored value of the delay device 101. 10
Reference numeral 4 is a variable length encoder, which performs variable length encoding of the differential code.
A differential code memory 105 stores the differential code encoded by the differential encoder 103. A memory data controller 106 transfers the differential codes stored in the differential code memory 105 in synchronization with the differential cycle counter 102 to the variable length encoder 104 in a preset order.

FIG. 2 is a flow chart for explaining the operation of FIG. The processing procedure for the video signals of the first and second frames after the second frame will be described below.

(201) The number of pixels is 800 horizontal pixels and 800 vertical pixels, the block size is 16 horizontal pixels and 16 vertical pixels, and the total number of horizontal blocks is 50 and the total number of vertical blocks is 50. Further, the difference cycle is 10 blocks. As the initial value, the horizontal block of the target block is set to 0 block, the vertical block is set to 0 block, and the difference period block is set to 0 block. Go to (202).

(202) The horizontal and vertical motion vector values of the delay device 101 are initialized to 0, respectively. (2
Go to 03).

(203) Using the differential encoder 103,
The difference value between the current motion vector value and the value stored in the delay device 101 is encoded. Go to (204).

(204) The current motion vector value is added to the delay unit 10
Store in 1. Go to (205). (205) The differential code encoded by the differential encoder 103 is stored in the differential code memory 105. Go to (206).

(206) The differential cycle counter 102 adds 1 to the differential cycle block. Go to (207).

(207) Check whether the difference period block is equal to 10 blocks of the difference period. If they are equal (20
Go to 8). If not, go to (211).

(208) Using the memory data controller 106, the differential code memory 105 to the variable length encoder 104
Data output control is performed in the order set in advance. Go to (209).

(209) The differential code of the block within the differential cycle is variable length coded. Go to (210).

(210) The horizontal and vertical motion vector values of the delay device 101 are reset to 0, respectively. Also, the difference period block is reset to 0. (211)
Go to

(211) Add 1 to the horizontal block of the target block. Go to (212). (212) It is checked whether the horizontal block of the target block is equal to 50, which is the total number of horizontal blocks. If they are equal, go to (213). If not, go to (203).

(213) The horizontal block of the target block is reset to 0. Add 1 to the vertical block of the target block. Go to (214).

(214) It is checked whether the vertical block of the target block is equal to 50 which is the total number of vertical blocks. If they are equal, the process ends. Otherwise, (20
Go to 3).

Here, as the differential encoder 103, M
The differential encoding of the motion vector is performed using the folding encoding adopted in PEG.

Also, as the variable length encoder 104, the variable length encoding of the differential code is performed by using the run length encoding. In the run-length encoding, the differential code values of the horizontal or vertical motion vector of one or a plurality of blocks in a difference period are collectively encoded into one codeword. When such a variable length encoder is used, the variable length code is different depending on the order of the differential codes transferred to the variable length encoder.

FIG. 3 shows a rearrangement pattern of transfer data to the variable length encoder. Here, the horizontal and vertical motion vector values are represented by hi and vi (i = 0 to 0).
9) and the difference code values are Δhi and Δvi (i = 0 to 0).
9). Δh0 and Δv0 are true value difference sign values. Here, the motion vectors are h0, v0 to h9, v9
3 is input to the differential encoder 103 in the order from left to right in FIG.

First, when the differential code is transferred to the variable-length encoder in the order of input, the variable-length code words (0,1), (0,-
1), (8,1), (5,1), (2,0) are generated. 12 and 1
When the variable length coding table of No. 3 is used, the code length of the motion vector in the difference cycle is 35 bits.

The rearrangement pattern 1 is a case where the data is transferred to the variable length coding in the reverse order of the differential coding. At this time, as variable-length codewords, (3,1), (5,1), (8, -1),
(0,1) is generated. When the variable length coding table of FIGS. 12 and 13 is used, the code length of the motion vector in the difference cycle is 27 bits.

This is because the number of consecutive 0-valued difference codes is increased by finally transferring the differential codes Δh0 and Δv0 of the true value of the motion vector to the variable length encoder. It is considered that the efficiency has improved.

The rearrangement pattern 2 is a case where the differential code in the vertical direction is transferred after the differential code in the horizontal direction. At this time, as variable-length codewords, (0,1), (4,1), (2,1), (1,
-1) and (8,0) are generated. When the variable length coding table of FIGS. 12 and 13 is used, the code length of the motion vector in the difference cycle is 34 bits.

This is because the motion vector values in the horizontal direction and the vertical direction are considered to be originally independent. When there is motion other than panning only in the horizontal direction and there is no motion other than panning in the vertical direction, the difference value in the vertical direction is 0, and the number of consecutive difference codes of 0 is large.
It is considered that the coding efficiency has improved.

The rearrangement pattern 3 is the rearrangement pattern 2, and the difference codes of the true value of the motion vector are Δh0 and Δv.
This is the case when 0 is transferred last. At this time, (4,1), (2,1), (10,1), and (0, -1) are generated as variable-length codewords. When the variable length coding table of FIGS. 12 and 13 is used, the code length of the motion vector in the difference cycle is 25 bits.

The rearrangement pattern 4 is a case where the rearrangement pattern 2 is reversed and then the last two are set to Δv0 and Δh0. At this time, (10,1), (2,1), (4, -1), and (0,1) are generated as variable-length code words. Figure 1
2. When the variable length coding table of FIG. 13 is used, the code length of the motion vector in the difference cycle is 25 bits.

In the rearrangement pattern 3 and the rearrangement pattern 4, the difference code of the true value of the motion vector is finally transferred to the variable length encoder, and the difference code in the horizontal direction is added to the difference code of the difference value of the motion vector. Either the code is transferred and then the vertical difference code is transferred, or the vertical difference code is transferred and then the horizontal difference code is transferred, and two effects of rearrangement pattern 1 and rearrangement pattern 2 are obtained. It is considered that, by this, the number of consecutive difference codes having a value of 0 is further increased, and the coding efficiency is further improved as compared with the rearrangement pattern 1 and the rearrangement pattern 2.

As described above, by using the motion vector coding apparatus of the first embodiment, the order of the transfer data to the variable length coder is rearranged by using the differential code memory, so that continuous 0s can be obtained. It becomes possible to perform variable length coding in the order of the difference codes in which the number of difference codes of the value of
The motion vector coding efficiency can be improved.

(Embodiment 2) In the first embodiment, in order to rearrange the order of transferring the differential codes to the variable length encoder 104, the differential code memory 105 for storing the differential codes existing in the differential cycle and the memory A data controller 106 is required. However, there is a case where the increase of these scales is an obstacle to realization.

Therefore, the second embodiment can be configured by reducing the capacity of the differential code memory to the capacity required for the differential code of the true-valued motion vector and providing a switch instead of the memory data controller 106. The motion vector coding apparatus will be described.

The motion vector coding apparatus according to the second embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 is a block diagram of a motion vector coding apparatus according to the second embodiment of the present invention. Here, only the motion vector encoder 710 of the motion vector encoder in the conventional example of FIG. 7 is different, and therefore the configuration is described.

In FIG. 4, the motion vector value to be encoded is the current motion vector value, and the immediately preceding motion vector value is the previous motion vector value. A delay unit 401 stores a motion vector value. A difference cycle counter 402 counts the number of blocks and resets the delay unit 401 for each difference cycle. A differential encoder 403 encodes the differential value between the current motion vector value and the value of the delay device 401. A variable length encoder 404 performs variable length encoding on the differential code using run length encoding.

Reference numeral 405 denotes a differential code memory, which transfers the differential code stored immediately before in synchronization with the differential cycle counter 402 to the variable length encoder 404 and newly adds it to the differential encoder 4
The difference code encoded in 03 is stored. A switch 406 transfers the true value difference code of the motion vector to the difference code memory 405 and the motion vector difference value difference code to the variable length encoder 406 in synchronization with the difference cycle counter 402.

FIG. 5 is a flow chart for explaining the operation of FIG. The processing procedure for the video signals of the first and second frames after the second frame will be described below.

(501) It is assumed that the number of pixels is 800 horizontal pixels and 800 vertical pixels, the block size is 16 horizontal pixels and 16 vertical pixels, and the total number of horizontal blocks is 50 and the total number of vertical blocks is 50. Further, the difference cycle is 10 blocks. As the initial value, the horizontal block of the target block is set to 0 block, the vertical block is set to 0 block, and the difference period block is set to 0 block. Go to (502).

(502) Initialize the horizontal and vertical motion vector values of the delay unit 401 to 0, respectively. (5
Go to 03).

(503) Using the differential encoder 403,
The difference value between the current motion vector value and the value stored in the delay unit 401 is encoded. Go to (504).

(504) The current motion vector is delayed by the delay unit 401.
To store. Go to (505). (505) The difference cycle counter 402 increments the difference cycle block by one.
Go to (506).

(506) It is checked whether the difference periodic block is equal to one block. If they are equal, go to (507). If not, go to (508).

(507) The differential code stored in the differential code memory 405 is transferred to the variable length encoder 404, and the currently targeted differential code is newly stored in the differential code memory 405. Go to (508).

(508) The differential code is variable length coded.
Go to (509). (509) It is checked whether the difference cycle block is equal to 10 blocks of the difference cycle. If they are equal, go to (510). If not, go to (511).

(510) The horizontal and vertical motion vector values of the delay unit 401 are reset to 0 respectively. Also, the difference period block is reset to 0. (511)
Go to

(511) Add 1 to the horizontal block of the target block. Go to (512). (512) It is checked whether the horizontal block of the target block is equal to 50, which is the total number of horizontal blocks. If they are equal, go to (513). If not, go to (503).

(513) The horizontal block of the target block is reset to 0. Add 1 to the vertical block of the target block. Go to (514).

(514) It is checked whether the vertical block of the target block is equal to 50 which is the total number of vertical blocks. If they are equal, the process ends. Otherwise, (50
Go to 3).

Here, as the differential encoder 403, M
The differential encoding of the motion vector is performed using the folding encoding adopted in PEG.

Also, as the variable length encoder 404, the variable length encoding of the differential code is performed by using the run length encoding.

By using the configuration of this embodiment, the difference code of the true value of the motion vector is stored in the difference code memory 405, and the difference codes of the motion vectors of the subsequent blocks are sequentially transferred to the variable length encoder 404. Finally, in order to transfer the true value difference code of the motion vector stored in the difference code memory 405 to the variable length encoder 404, a variable length code having a large number of consecutive 0 value difference codes is used. It is possible to create.

FIG. 6 shows a rearrangement pattern of transfer data to the variable length encoder. Here, the horizontal and vertical motion vector values are represented by hi and vi (i = 0 to 0).
9) and the difference code values are Δhi and Δvi (i = 0 to 0).
9). Δh0 and Δv0 are true value difference sign values. Here, the motion vectors are h0, v0 to h9, v9
6 is input to the differential encoder 403 from left to right in FIG.

First, when the differential code is transferred to the variable-length encoder in the order of input, the variable-length code words (0,1), (0,-
1), (8,1), (5,1), (2,0) are generated. 12 and 1
When the variable length coding table of No. 3 is used, the code length of the motion vector in the difference cycle is 35 bits.

In the rearrangement pattern, the difference codes Δh0 and Δv0 of the true value of the motion vector are finally transferred to the variable length coding. At this time, as a variable-length codeword, (8,
1), (5,1), (3,1) and (0, -1) are generated. 12 and 1
When the variable length coding table of No. 3 is used, the code length of the motion vector in the difference cycle is 27 bits.

This is because the number of consecutive 0-value difference codes is increased by finally transferring the differential codes Δh0 and Δv0 of the true value of the motion vector to the variable length encoder. It is considered that the efficiency has improved.

As described above, by using the motion vector coding apparatus of the second embodiment, the difference cycle counter 4
By controlling the order of transferring the differential codes to the variable length encoder 404 by using the differential code memory 405 and the switch 406 corresponding to the true value differential code of the motion vector in synchronization with 02, consecutive 0 values are obtained. It is possible to generate a variable-length code having a large number of differential codes, and it is possible to improve the motion vector coding efficiency with a simpler configuration than the first embodiment.

[0089]

According to the motion vector coding apparatus of the present invention, the differential code is stored in the differential code memory, and the differential code is stored in the differential code memory in the order preset by the memory data controller for each differential cycle. By transferring the data, the data can be transferred in an order suitable for the variable length coder, and variable length coding with high coding efficiency can be performed.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a motion vector encoder according to a first embodiment of the present invention.

FIG. 2 is a flowchart of the motion vector coding apparatus according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a rearrangement pattern of differential codes in the first embodiment of the present invention.

FIG. 4 is a configuration diagram of a motion vector encoder according to a second embodiment of the present invention.

FIG. 5 is a flowchart of a motion vector coding device according to a second embodiment of the present invention.

FIG. 6 is a diagram showing a rearrangement pattern of differential codes in the second embodiment of the present invention.

FIG. 7 is a configuration diagram of a conventional motion vector encoding device.

FIG. 8 is a diagram showing a motion vector coding table of a conventional motion vector coding device.

FIG. 9 is a block diagram of a motion vector encoder of a conventional motion vector encoder.

FIG. 10 is a flowchart of a conventional motion vector encoding device.

FIG. 11 is a diagram showing a code length table of a variable length encoder using run length encoding.

FIG. 12 is a diagram showing an encoding table of a variable length encoder using run length encoding.

FIG. 13 is a diagram showing an encoding table of a variable length encoder using run length encoding.

[Explanation of symbols]

 101 delay device 102 differential cycle counter 103 differential encoder 104 variable length encoder 105 differential code memory 106 memory data controller

Claims (5)

[Claims] 1. When a motion vector value is differentially coded, the number of blocks from the coding of the true value of the motion vector to the coding of the true value of the motion vector is set as a difference cycle, and the motion to be coded is set. When the vector value is the current motion vector value and the previous motion vector value is the previous motion vector value, the delay unit that stores the motion vector value and the block number are counted, and the delay unit is reset at each difference cycle. A difference cycle counter, a difference encoder for encoding a difference value between the current motion vector value and the stored value of the delay device, a variable length encoder for variable length encoding a difference code, and the difference encoding Differential code memory for storing the differential code encoded by the differential unit, and the differential code stored in the differential code memory in synchronization with the differential cycle counter in the variable length encoding in a preset order. Transferred to Memoride - motion vector coding apparatus comprising the motor controller. 2. The memory data controller transfers the differential code of the true value of the motion vector to the variable length encoder after the differential code of the differential value of the motion vector. Motion vector coding device. 3. The motion vector coding apparatus according to claim 1, wherein the variable-length coding unit performs run-length coding. 4. The memory data controller transfers a horizontal difference code and then a vertical difference code among the difference codes of the motion vector difference values, or transfers a vertical direction difference code. 2. The motion vector coding apparatus according to claim 1, wherein either one of the control of transferring the differential code in the horizontal direction is performed after that. 5. A motion to be coded is defined as the difference period, which is the number of blocks from the coding of the true value of the motion vector to the coding of the true value of the motion vector when the motion vector value is differentially coded. When the vector value is the current motion vector value and the previous motion vector value is the previous motion vector value, the delay unit that stores the motion vector value and the block number are counted, and the delay unit is reset at each difference cycle. A differential cycle counter, a differential encoder that encodes the difference value between the current motion vector value and the value of the delay device, and a variable length encoder that performs variable length encoding of the differential code using run length encoding. And a differential code memory that transfers the differential code stored immediately before in synchronization with the differential cycle counter to the variable length encoder and stores the differential code newly encoded by the differential encoder. A switch for transferring the difference code of the true value of the motion vector to the difference code memory and the difference code of the difference value of the motion vector to the variable length encoder in synchronization with the difference cycle counter. Motion vector coding device.