JPH07106767A - Multilayered wiring board and its manufacture - Google Patents
Multilayered wiring board and its manufactureInfo
- Publication number
- JPH07106767A JPH07106767A JP24656593A JP24656593A JPH07106767A JP H07106767 A JPH07106767 A JP H07106767A JP 24656593 A JP24656593 A JP 24656593A JP 24656593 A JP24656593 A JP 24656593A JP H07106767 A JPH07106767 A JP H07106767A
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- wiring board
- double
- printed wiring
- sided printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、大型計算機やワークス
テーション等のコンピュータ、交換機等に使われる高密
度な多層配線基板及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-density multilayer wiring board used for computers such as large-scale computers and workstations, exchanges, and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来の多層プリント配線板及びその製造
方法に替わる新しい高密度な多層プリント配線基板及び
その製造方法として、例えば、特開平４−１４８５９０
号公報に示されるようなビルドアップ法が挙げられる。
これは、基本的には、表層導体がパターニングされたプ
リント配線板の表層に感光性絶縁材料を成膜した後、露
光・現像によりビアホールを形成し、次いで、全面に導
体を形成した後、導体をパターニングし、さらに、これ
を繰り返して多層化した後、最後に、貫通めっきスルー
ホールを形成する方法である。この方法ではプリント配
線板表層導体とビルドアップの導体層及びビルドアップ
の導体層同士の接続がドリリングによる貫通めっきスル
ーホールによる接続でなく、コンフォーマルビアによる
接続であるために、従来の貫通めっきスルーホールのみ
で層間接続をとるプリント配線板に比べると高密度な多
層プリント配線基板が得られる。しかしながら、プリン
ト配線板の内層導体との接続あるいはプリント配線板両
面の接続は最終段階で形成する貫通めっきスルーホール
による接続であるために、この分、配線密度が低下する
欠点がある。また、ドリリングにより形成し、穴埋めさ
れていない貫通めっきスルーホールを有するプリント配
線板上では、感光性絶縁材料を成膜できないために、ビ
ルドアップ法による薄膜多層配線層を形成できない。2. Description of the Related Art As a new high-density multilayer printed wiring board and a method for manufacturing the same, which replaces the conventional multilayer printed wiring board and a method for manufacturing the same, for example, Japanese Patent Laid-Open No. 4-148590.
There is a build-up method as disclosed in the publication.
This is basically because after forming a photosensitive insulating material on the surface layer of a printed wiring board in which the surface layer conductor is patterned, a via hole is formed by exposure and development, then a conductor is formed on the entire surface, and then the conductor is formed. Is patterned, and this is repeated to form a multilayer, and finally, a through-plated through hole is formed. In this method, the connection between the surface layer conductor of the printed wiring board and the built-up conductor layer and the built-up conductor layers is not the connection by the through plating through hole by drilling, but the connection by the conformal via. A high-density multilayer printed wiring board can be obtained as compared with a printed wiring board in which interlayer connection is made only by holes. However, since the connection with the inner layer conductor of the printed wiring board or the connection of both surfaces of the printed wiring board is the connection with the through-plated through holes formed at the final stage, there is a drawback that the wiring density is reduced accordingly. Further, since a photosensitive insulating material cannot be formed on a printed wiring board which is formed by drilling and has through-plated through holes which are not filled, a thin film multilayer wiring layer cannot be formed by a build-up method.
【０００３】層間接続のためにドリリングで形成しため
っきスルーホールの穴を樹脂充填し、上部にめっきスル
ーホールと接続する導体パッドを形成してめっきスルー
ホールの面積を有効利用する多層プリント配線板の製造
方法としては、例えば、特開平４−１６８７９４号公報
に示される方法がある。この方法は多層プリント配線板
の隣接する２層の導体層の接続には有効であるが、プリ
ント配線板の両面あるいは、１層以上の導体層を隔てた
２層の導体層の接続には、やはり、最終段階で形成する
貫通めっきスルーホールに頼らざるを得えず、出来上が
った多層プリント配線板には穴埋めされていない貫通め
っきスルーホールが残る。A multilayer printed wiring board in which a hole of a plated through hole formed by drilling for interlayer connection is filled with resin and a conductor pad for connecting with the plated through hole is formed on the upper part to effectively utilize the area of the plated through hole. As a manufacturing method, for example, there is a method disclosed in Japanese Patent Laid-Open No. 4-168794. This method is effective for connecting two adjacent conductor layers of a multilayer printed wiring board, but for connecting two surfaces of the printed wiring board or two conductor layers separated by one or more conductor layers, After all, there is no choice but to rely on the through-plated through holes formed at the final stage, and the through-plated through holes that are not filled remain in the finished multilayer printed wiring board.
【０００４】[0004]
【発明が解決しようとする課題】このように、ビルドア
ップ法はベースのプリント配線板に貫通めっきスルーホ
ールがあっては適用できない。また、貫通めっきスルー
ホールのないベースのプリント配線板上にビルドアップ
法で薄膜多層配線層を形成したとしても、ビルドアップ
で形成した導体層とべースのプリント配線板の内層導体
間の接続あるいはべースのプリント配線板の両面の接続
をとるために、最終段階で貫通めっきスルーホールを形
成するならば、本来、高密度配線が形成できるビルドア
ップ法の配線密度を最大限に引き出すことはできない。As described above, the build-up method cannot be applied when the base printed wiring board has through-plated through holes. In addition, even if a thin film multilayer wiring layer is formed by the build-up method on the base printed wiring board without through-plated through holes, the connection between the conductor layer formed by the build-up and the inner layer conductor of the base printed wiring board or If a through-plated through-hole is formed at the final stage in order to connect both sides of the base printed wiring board, it is essentially impossible to maximize the wiring density of the build-up method that can form high-density wiring. Can not.
【０００５】本発明の目的は、貫通めっきスルーホール
の穴の影響をなくし、ビルドアップ法が形成できる本来
の高密度配線能を最大限に引き出す多層配線基板および
その製造方法を提供することにある。It is an object of the present invention to provide a multilayer wiring board which eliminates the influence of through-plated through holes and maximizes the original high-density wiring capability that can be formed by the build-up method, and a manufacturing method thereof. .
【０００６】[0006]
【課題を解決するための手段】本発明者らは、上記課題
を解決するために、まず、多層配線基板の構造を、穴埋
めされた層間接続スルーホールの導体と接続する導体パ
ッドが設けられた両面プリント配線板上に、１層以上の
導体パターン層と層間絶縁膜層とが交互に形成され、該
導体パッドと導体パターン層および導体パターン層同士
が電気的に接続されて成る構造とした。上記両面プリン
ト配線板は内層導体層を含んでいても良い。In order to solve the above-mentioned problems, the present inventors firstly provided a conductor pad for connecting the structure of the multilayer wiring board to the conductor of the inter-layer connection through hole filled with a hole. One or more conductor pattern layers and interlayer insulating film layers are alternately formed on the double-sided printed wiring board, and the conductor pads, the conductor pattern layers, and the conductor pattern layers are electrically connected to each other. The double-sided printed wiring board may include an inner conductor layer.
【０００７】本発明の多層配線基板の内、まず、ベース
基板となる穴埋めされた層間接続スルーホールの導体と
接続する導体パッドが設けられた両面プリント配線板は
以下の方法で製造する。In the multilayer wiring board of the present invention, first, a double-sided printed wiring board provided with a conductor pad for connecting with a conductor of a buried interlayer connection through hole which becomes a base substrate is manufactured by the following method.
【０００８】（１）貫通めっきスルーホール導体の所望
の位置に接続する導体パッドが設けられた両面プリント
配線板を形成する工程 （２）該両面プリント配線板の貫通めっきスルーホール
および導体間隙を有機系高分子の絶縁膜で充填する工程 を含む方法である。(1) Step of forming a double-sided printed wiring board provided with a conductor pad for connecting to a desired position of a through-plated through-hole conductor (2) The through-plated through hole and the conductor gap of the double-sided printed wiring board are made organic. It is a method including a step of filling with an insulating film of a polymer based polymer.
【０００９】この内、貫通めっきスルーホール導体の所
望の位置に接続する導体パッドが設けられた両面プリン
ト配線板を形成する工程をさらに詳しく説明すると以下
のようになる。すなわち、 （１）貫通めっきスルーホールを有する両面銅張り積層
板の表層導体をエッチングによりパターニングする工程 （２）該両面プリント配線板導体上の所望の位置にレジ
ストの抜きパターンを形成する工程 （３）該レジストの抜きパターン内に導体を形成する工
程 （４）該レジストを剥離する工程を含む方法である。Of these, the process of forming a double-sided printed wiring board having conductor pads connected to desired positions of the through-plated through-hole conductors will be described in more detail below. That is, (1) a step of patterning a surface layer conductor of a double-sided copper-clad laminate having through-plated through holes by etching (2) a step of forming a resist removal pattern at a desired position on the double-sided printed wiring board conductor (3) ) A step of forming a conductor in the resist removal pattern (4) A method including a step of peeling the resist.
【００１０】また、次ぎの方法によっても作製できる。It can also be manufactured by the following method.
【００１１】（１）貫通めっきスルーホールを有する両
面銅張り積層板表層導体上の所望の位置にレジストの抜
きパターンを形成する工程 （２）該レジストの抜きパターン内に導体を形成する工
程 （３）該レジストを剥離する工程 （４）該両面銅張り積層板表層導体をエッチングにより
パターニングする工程さらに、貫通めっきスルーホール
導体の所望の位置に接続する導体パッドが設けられた両
面プリント配線板の貫通めっきスルーホールおよび導体
間隙を有機系高分子の絶縁膜で充填する工程をさらに詳
しく説明すると、 （１）該両面プリント配線板上に表面の平坦な金型を設
置し、該両面プリント配線板と該金型との間に溶剤を含
まない流動性有機系高分子前駆体を挾む工程 （２）該金型と該両面プリント配線板との間を排気する
工程 （３）該金型を該両面プリント配線板方向へ移動させて
該溶剤を含まない流動性有機系高分子前駆体を貫通めっ
きスルーホールおよび導体間隙に充填する工程 （４）該溶剤を含まない流動性有機系高分子前駆体に静
水圧をかける工程 （５）該溶剤を含まない流動性有機系高分子前駆体を硬
化する工程 （６）該有機系高分子で覆われた導体上面を露出させる
工程を含む方法となる。(1) A step of forming a resist removal pattern at a desired position on a double-sided copper-clad laminate surface conductor having through-plated through holes (2) A step of forming a conductor in the resist removal pattern (3) ) Step of peeling off the resist (4) Step of patterning the surface conductor of the double-sided copper-clad laminate by etching Further, penetration of a double-sided printed wiring board provided with a conductor pad for connecting to a desired position of the through-plated through-hole conductor The step of filling the plated through holes and the conductor gaps with an organic polymer insulating film will be described in more detail. (1) A mold having a flat surface is placed on the double-sided printed wiring board to form the double-sided printed wiring board. A step of sandwiching a fluid organic polymer precursor containing no solvent between the mold and the mold (2) Evacuating between the mold and the double-sided printed wiring board (3) Step of moving the mold toward the double-sided printed wiring board to fill the solvent-free fluid organic polymer precursor into the through-plated through holes and conductor gaps (4) Including the solvent Step of applying hydrostatic pressure to the non-fluid organic polymer precursor (5) Step of curing the solvent-free fluid organic polymer precursor (6) The conductor upper surface covered with the organic polymer The method includes a step of exposing.
【００１２】以上の方法により、穴埋めされた層間接続
スルーホールの導体と接続する導体パッドが設けられた
プリント配線板を製造することができる。このベース基
板の表面に薄膜多層配線層を形成する方法として、以下
の方法をとった。すなわち、 （１）感光性絶縁樹脂を成膜する工程 （２）露光、現像により該感光性絶縁樹脂にビアホール
を形成する工程 （３）露光された該感光性絶縁樹脂表面を粗化する工程 （４）導体を形成する工程 （５）熱硬化により該感光性絶縁樹脂を完全硬化する工
程 （６）該導体のエッチングによりパターンを形成する工
程 を経るビルドアップ法である。この方法は従来問題とな
っている導体と層間絶縁膜の接着強度を向上させる方法
でもある。By the method described above, it is possible to manufacture a printed wiring board provided with a conductor pad that is connected to the conductor of the buried interlayer connection through hole. The following method was used as a method of forming a thin film multilayer wiring layer on the surface of this base substrate. That is, (1) a step of forming a film of a photosensitive insulating resin (2) a step of forming via holes in the photosensitive insulating resin by exposure and development (3) a step of roughening the exposed surface of the photosensitive insulating resin ( 4) A step of forming a conductor (5) A step of completely curing the photosensitive insulating resin by heat curing (6) A step of forming a pattern by etching the conductor, which is a build-up method. This method is also a method of improving the adhesive strength between the conductor and the interlayer insulating film, which has been a problem in the past.
【００１３】ここで、本発明に用いる材料をさらに詳し
く説明すると、溶剤を含まない流動性有機系高分子前駆
体とは、多官能エポキシ樹脂組成物、分子内に２個以上
のマレイミド骨格を有する化合物の組成物、分子内に２
個以上のシアン酸エステル骨格を有する化合物の組成
物、分子内に２個以上のベンゾシクロブテン骨格を有す
る化合物の組成物の内の少なくとも１つ以上を含む組成
物である。また、感光性絶縁樹脂とは、少なくとも、室
温で固形の多官能不飽和化合物、エポキシ樹脂、アクリ
レートモノマー、光重合開始剤、アミン系の熱硬化剤か
ら成る組成物、あるいは、少なくとも、不飽和基を付加
反応させた２官能以上の多官能固形エポキシ樹脂、アク
リレートモノマー、光重合開始剤、アミン系の熱硬化剤
から成る組成物の内の１つで、アミン系熱硬化剤は、ジ
シアンジアミドあるいはジアミノトリアジン化合物が望
ましい。The material used in the present invention will now be described in more detail. The solvent-free fluid organic polymer precursor is a polyfunctional epoxy resin composition having two or more maleimide skeletons in its molecule. Compound composition, 2 in the molecule
It is a composition of a compound having one or more cyanate ester skeletons, or a composition containing at least one or more of the compositions of compounds having two or more benzocyclobutene skeletons in the molecule. The photosensitive insulating resin means at least a composition comprising a polyfunctional unsaturated compound which is solid at room temperature, an epoxy resin, an acrylate monomer, a photopolymerization initiator, an amine-based thermosetting agent, or at least an unsaturated group. It is one of the compositions consisting of a polyfunctional solid epoxy resin having at least two functional groups obtained by addition reaction with acrylate, an acrylate monomer, a photopolymerization initiator, and an amine-based thermosetting agent. The amine-based thermosetting agent is dicyandiamide or diamino. Triazine compounds are desirable.
【００１４】[0014]
【作用】多層配線基板の構造を、穴埋めされた層間接続
スルーホールの導体と接続する導体パッドが設けられた
両面プリント配線板上に、１層以上の導体パターン層と
層間絶縁膜層とが交互に形成され、該導体パッドと導体
パターン層および導体パターン層同士が電気的に接続さ
れて成る構造としたことで、まず、ベースの両面プリン
ト配線板の貫通めっきスルーホールの穴の影響がなくな
り、この上に薄膜多層配線層を形成できるようなった。
また、最終段階で形成する貫通めっきスルーホールがな
いので、ベース基板上の薄膜多層配線層の配線密度を最
大限に引き出せるようになった。さらに、べース基板上
の薄膜多層配線層とベース基板の内層導体層との接続あ
るいはベース基板の両面の接続等、各導体層の接続が最
終段階での貫通めっきスルーホールなくして、できるよ
うになった。In the double-sided printed wiring board provided with the conductor pad for connecting the structure of the multilayer wiring board to the conductor of the inter-layer connection through hole filled up, one or more conductor pattern layers and the interlayer insulating film layer are alternately arranged. The conductor pad, the conductor pattern layer, and the conductor pattern layers are electrically connected to each other, so that the effect of the through-plated through-hole of the double-sided printed wiring board of the base is eliminated. A thin film multilayer wiring layer can be formed on this.
Further, since there is no through-plated through hole formed at the final stage, it is possible to maximize the wiring density of the thin film multilayer wiring layer on the base substrate. Furthermore, the connection of each conductor layer such as the connection between the thin-film multilayer wiring layer on the base substrate and the inner conductor layer of the base substrate or both sides of the base substrate can be done without the through plating through hole at the final stage. Became.
【００１５】本発明の多層配線基板の製造方法に関して
言えば、まず、貫通めっきスルーホール導体の所望の位
置に接続する導体パッドが設けられた両面プリント配線
板上に表面の平坦な金型を設置し、該両面プリント配線
板と該金型との間に溶剤を含まない流動性有機系高分子
前駆体を挾む工程と、該金型と該両面プリント配線板と
の間を排気する工程と、該金型を該両面プリント配線板
方向へ移動させて該溶剤を含まない流動性有機系高分子
前駆体を貫通めっきスルーホールおよび導体間隙に充填
する工程と、該溶剤を含まない流動性有機系高分子前駆
体に静水圧をかける工程と、該溶剤を含まない流動性有
機系高分子前駆体を硬化する工程と、該有機系高分子で
覆われた導体上面を露出させる工程を含むベースの両面
プリント配線板を製造する方法をとったために、貫通ス
ルーホール内あるいは導体間隙にピンホールやクラック
のない均一な物性の絶縁膜を形成することができ、ま
た、次ぎに形成するコンフォーマルビアを接続するため
に必要な該両面プリント配線板の導体パッドの表面を露
出させることができ、かつ、表面が平坦なベース基板を
作ることができた。As for the method for manufacturing a multilayer wiring board of the present invention, first, a mold having a flat surface is placed on a double-sided printed wiring board provided with a conductor pad for connecting to a desired position of a through-plated through-hole conductor. Then, a step of sandwiching a fluid organic polymer precursor containing no solvent between the double-sided printed wiring board and the mold, and a step of evacuating between the mold and the double-sided printed wiring board. A step of moving the die toward the double-sided printed wiring board to fill the solvent-free fluid organic polymer precursor into the through-plated through-holes and conductor gaps, and the solvent-free fluid organic A base including a step of applying hydrostatic pressure to the organic polymer precursor, a step of curing the fluid organic polymer precursor that does not contain the solvent, and a step of exposing a conductor upper surface covered with the organic polymer Double-sided printed wiring board Because of the manufacturing method, it is possible to form an insulating film with uniform physical properties without pinholes or cracks in the through-holes or in the conductor gap, and it is necessary to connect the conformal via to be formed next. It was possible to expose the surface of the conductor pad of the double-sided printed wiring board and to make a base substrate having a flat surface.
【００１６】次ぎに、この上に形成するビルドアップ法
に関して言えば、感光性絶縁樹脂を成膜する工程、露
光、現像により該感光性絶縁樹脂にビアホールを形成す
る工程、露光された該感光性絶縁樹脂表面を粗化する工
程、導体を形成する工程、熱硬化により該感光性絶縁樹
脂を完全硬化する工程、該導体のエッチングによりパタ
ーンを形成する工程を経る方法をとったために、ビルド
アップ法で従来から問題となっていた導体と層間絶縁膜
の接着強度を向上させることができ、信頼性の高い薄膜
多層配線層を形成することができた。Next, regarding the build-up method to be formed thereon, the step of forming a photosensitive insulating resin, the step of forming a via hole in the photosensitive insulating resin by exposure and development, the exposed photosensitive material The build-up method is used because the method includes the steps of roughening the surface of the insulating resin, forming a conductor, completely curing the photosensitive insulating resin by thermosetting, and forming a pattern by etching the conductor. Thus, the adhesive strength between the conductor and the interlayer insulating film, which has been a problem in the past, can be improved, and a highly reliable thin film multilayer wiring layer can be formed.
【００１７】ここで、上記した貫通めっきスルーホール
あるいは導体間隙を埋める方法に適用できる材料は、溶
剤を含まない流動性有機系高分子前駆体であり、多官能
エポキシ樹脂組成物、分子内に２個以上のマレイミド骨
格を有する化合物の組成物、分子内に２個以上のシアン
酸エステル骨格を有する化合物の組成物、分子内に２個
以上のベンゾシクロブテン骨格を有する化合物の組成物
の内の少なくとも１つ以上を含む組成物が、耐熱性、機
械特性、電気特性等に優れた絶縁膜を与えた。また、ビ
ルドアップ用の感光性絶縁樹脂には、上記した導体と層
間絶縁膜との接着強度を向上させるために、光で硬化す
る成分と熱で硬化する成分が必要であり、少なくとも、
室温で固形の多官能不飽和化合物、エポキシ樹脂、アク
リレートモノマー、光重合開始剤、アミン系の熱硬化剤
から成る組成物、あるいは、少なくとも、不飽和基を付
加反応させた２官能以上の多官能固形エポキシ樹脂、ア
クリレートモノマー、光重合開始剤、アミン系の熱硬化
剤から成る組成物が、導体と層間絶縁膜との接着強度に
優れ、かつ、解像性も良好であった。さらに、アミン系
熱硬化剤に、ジシアンジアミドあるいはジアミノトリア
ジン化合物を用いたことで、導体のマイグレーションを
抑えることができた。The material applicable to the method of filling the through-plated through-hole or the conductor gap is a solvent-free fluid organic polymer precursor, which is a polyfunctional epoxy resin composition, having 2 molecules in the molecule. Among the composition of the compound having two or more maleimide skeletons, the composition of the compound having two or more cyanate ester skeletons in the molecule, and the composition of the compound having two or more benzocyclobutene skeletons in the molecule, The composition containing at least one or more provided an insulating film having excellent heat resistance, mechanical properties, electrical properties, and the like. Further, the photosensitive insulating resin for build-up needs a component that is cured by light and a component that is cured by heat in order to improve the adhesive strength between the conductor and the interlayer insulating film, and at least,
A composition comprising a polyfunctional unsaturated compound which is solid at room temperature, an epoxy resin, an acrylate monomer, a photopolymerization initiator, and an amine-based thermosetting agent, or at least a bifunctional or more polyfunctional compound in which an unsaturated group is subjected to an addition reaction. A composition comprising a solid epoxy resin, an acrylate monomer, a photopolymerization initiator, and an amine-based thermosetting agent was excellent in the adhesive strength between the conductor and the interlayer insulating film and had good resolution. Further, by using dicyandiamide or a diaminotriazine compound as the amine thermosetting agent, the migration of the conductor could be suppressed.
【００１８】以上により、耐熱性、機械特性、電気特性
等の特性に優れ、信頼性の高い高密度多層配線基板を安
価に製造することが可能となった。As described above, it has become possible to inexpensively manufacture a high-density multilayer wiring board having excellent characteristics such as heat resistance, mechanical characteristics and electric characteristics and having high reliability.
【００１９】[0019]
【実施例】以下、実施例により本発明をさらに具体的に
説明する。ここでは、両面プリント配線板の両表層導体
を２種類の電源層とし、この両面にＸＹ信号層２層とグ
ランド兼キャップ層を１層形成して成る多層配線基板及
びその製造方法を通して説明するが、上記両面プリント
配線板の内層にＸＹ信号層２層を入れた４層板を用いて
も良し、本発明はこれらの層構成に限定されるものでは
ない。EXAMPLES The present invention will be described in more detail below with reference to examples. Here, a description will be given through a multilayer wiring board in which both surface layer conductors of a double-sided printed wiring board are used as two types of power supply layers, two XY signal layers and one ground / cap layer are formed on both surfaces, and a manufacturing method thereof. A four-layer board having two XY signal layers as the inner layer of the above double-sided printed wiring board may be used, and the present invention is not limited to these layer configurations.
【００２０】〈実施例１〉まず、穴埋めされた層間接続
スルーホールの導体と接続するビア導体が設けられた両
面プリント配線板の製造方法の一例を図１と図２を用い
て説明する。Example 1 First, an example of a method of manufacturing a double-sided printed wiring board provided with a via conductor connected to a conductor of a buried interlayer connection through hole will be described with reference to FIGS. 1 and 2.
【００２１】両面の信号層を接続する貫通めっきスルー
ホール１０１と裏面の電源層との接続をとる２種類の貫
通めっきスルーホール１０２、１０３を有し、両面の銅
がパターニングされた図１ａ）のガラスポリイミド両面
プリント配線板を用意する。プリント配線板としてはＢ
Ｔレジンのプリント配線板（三菱瓦斯化学製）や高耐熱
性エポキシ樹脂を用いたプリント配線板でも良い。The through-plated through-hole 101 for connecting the signal layers on both sides and the through-plated through-holes 102, 103 for connecting to the power supply layer on the back side are provided, and copper on both sides is patterned as shown in FIG. 1a). Prepare a glass polyimide double-sided printed wiring board. B for a printed wiring board
A T-resin printed wiring board (manufactured by Mitsubishi Gas Chemical Co., Inc.) or a printed wiring board using a high heat resistant epoxy resin may be used.
【００２２】次に、上記両面プリント配線板の両面にド
ライフィルムレジストを形成し、露光・現像により表層
導体やスルーホールランド上の所望の位置にレジストの
抜きパターンを形成する。そして無電解銅めっきにて溝
内に導体パッド１０４を形成してレジストを剥離し、図
１ｂ）とした。Next, dry film resists are formed on both sides of the double-sided printed wiring board, and a resist removal pattern is formed at desired positions on the surface conductors and through hole lands by exposure and development. Then, a conductor pad 104 was formed in the groove by electroless copper plating, and the resist was peeled off to obtain FIG. 1b).
【００２３】図１ｂ）の構造は、貫通めっきスルーホー
ルを有し、表層導体がパターニングされていない銅張り
積層板の両面にドライフィルムレジストを形成し、露光
・現像により表層導体の所望の位置にレジストの抜きパ
ターンを形成し、次いで、電気銅めっきにて溝内に導体
パッド１０４を形成してレジストを剥離し、さらに、電
着レジストを形成し、露光・現像によりレジストの所望
の抜きパターンを形成した後、エッチングにより銅パタ
ーンを形成することによっても作製できる。The structure shown in FIG. 1b) has a through film plated through hole, and a dry film resist is formed on both surfaces of a copper clad laminate in which the surface conductor is not patterned, and is exposed and developed to form a desired position on the surface conductor. A resist removal pattern is formed, and then a conductor pad 104 is formed in the groove by electrolytic copper plating to remove the resist, and an electrodeposition resist is further formed, and a desired resist removal pattern is formed by exposure and development. It can also be manufactured by forming a copper pattern by etching after formation.
【００２４】しかる後、この基板の貫通めっきスルーホ
ールと表層導体の間隙を有機系高分子の絶縁膜１０６で
充填して図１ｃ）の基板とするが、その詳細な工程を図
２で説明する。図１ｂ）の基板の両面に溶剤を含まない
流動性有機系高分子前駆体１０５、ここでは、４官能エ
ポキシ樹脂エピクロンＥＸＡ４７００（（株）大日本イ
ンキ製商品名）とフェノール樹脂バーカムＴＤ−２１３
１（（株）大日本インキ製商品名）６５ｐｈｒとからな
るフィルム状組成物を図１ｂ）の基板の両面に置き、こ
れを図２ａ）のテフロンコーティング済の金型２０１の
間に挿入する。次いで、図２ｂ）のように、金型２０１
を７０℃に加熱して上記組成物１０５を溶融させ、さら
に、金型２０１と図１ｂ）の基板間を１０ｔｏｒｒに排
気して約７分間保ち、上記組成物１０５を導体間隙及び
貫通スルーホール内に充填した。そして、金型２０１と
図１ｂ）の基板間を大気圧に戻した後、上下方向の圧縮
圧力５ｋｇｆ／ｃｍ2と横方向からの空気圧５ｋｇｆ／
ｃｍ2をかけ、５分後に金型２０１を７０℃から２００
℃まで昇温（７０℃／分）して３０分間保った。そして
さらに、金型２０１を外して、常圧で２２０℃、６０分
加熱して、図２ｃ）に示すように、平坦でボイドやピン
ホールがなく、物性の均一な絶縁層１０６を形成した。
このようにして作製した図２ｃ）の基板の導体パッドの
上面は導体が露出した所と露出していない所があったの
で、図２ｃ）の基板を１００℃に加熱し、２０分間ＵＶ
／Ｏ3にさらすことで、絶縁膜１０６をエッチバック
し、導体パッドの上面を完全に露出させ、そして、平坦
性をさらに良くするために、露出した導体パッドの上面
を研磨し、完全に平坦な基板図２ｄ）、すなわち、図１
ｃ）の基板を得た。ここで、モールドの条件として、真
空度は２０Ｔｏｒｒ以下が、静水圧は２０ｋｇｆ／ｃｍ
2以下が、さらに、上下方向の圧縮圧力は横方向からの
圧力よりも大きいか等しいことが望ましく、その差は１
０ｋｇｆ／ｃｍ2以下であるとさらに良い。さらに、エ
ッチバックの方法として酸素プラズマアッシングや研磨
等を使うこともできる。Thereafter, the gap between the through-plated through hole of this substrate and the surface layer conductor is filled with the organic polymer insulating film 106 to obtain the substrate of FIG. 1c). The detailed process will be described with reference to FIG. . A solvent-free fluid organic polymer precursor 105 on both sides of the substrate of FIG. 1b), here, a tetrafunctional epoxy resin Epicron EXA4700 (trade name, manufactured by Dainippon Ink and Chemicals, Inc.) and a phenol resin Barkham TD-213.
A film-like composition consisting of 65 phr (trade name of Dainippon Ink and Chemicals, Inc.) was placed on both sides of the substrate of FIG. 1b), and this was inserted between the Teflon-coated mold 201 of FIG. 2a). Then, as shown in FIG.
Is heated to 70 ° C. to melt the composition 105, and the space between the mold 201 and the substrate of FIG. 1b) is evacuated to 10 torr and maintained for about 7 minutes to keep the composition 105 in the conductor gap and the through-hole. Filled. Then, after returning the pressure between the mold 201 and the substrate of FIG. 1b) to the atmospheric pressure, a vertical compression pressure of 5 kgf / cm 2 and a lateral air pressure of 5 kgf /
cm 2 is applied, and the mold 201 is heated from 70 ° C. to 200 after 5 minutes.
The temperature was raised to 70 ° C (70 ° C / min) and kept for 30 minutes. Then, the mold 201 was removed, and heating was carried out at 220 ° C. for 60 minutes under normal pressure to form a flat insulating layer 106 having no voids or pinholes and uniform physical properties, as shown in FIG. 2c).
The upper surface of the conductor pad of the substrate of FIG. 2c) thus manufactured had conductors exposed and not exposed. Therefore, the substrate of FIG. 2c) was heated to 100 ° C., and UV was irradiated for 20 minutes.
Exposure to / O 3 to etch back the insulating film 106 to completely expose the upper surface of the conductor pad, and to further improve flatness, the exposed upper surface of the conductor pad is polished and completely flattened. Fig. 2d), ie, Fig. 1
A substrate of c) was obtained. Here, as the molding conditions, the degree of vacuum is 20 Torr or less, and the hydrostatic pressure is 20 kgf / cm.
2 or less, it is desirable that the compression pressure in the vertical direction is greater than or equal to the pressure from the lateral direction, and the difference is 1
Even more preferably, it is 0 kgf / cm 2 or less. Further, oxygen plasma ashing, polishing or the like can be used as a method of etch back.
【００２５】〈実施例２〉穴埋めされた層間接続スルー
ホールの導体と接続する導体パッドが設けられた両面プ
リント配線板として実施例１の方法で形成した図１ｃ）
の基板を使い、この上にビルドアップ法にて薄膜多層配
線層を形成した基板及びその製造方法の一例を図３と図
４を用いて説明する。<Embodiment 2> A double-sided printed wiring board provided with a conductor pad for connecting with a conductor of a buried interlayer connecting through hole is formed by the method of Embodiment 1 (FIG. 1c).
An example of a substrate on which a thin film multilayer wiring layer is formed by a build-up method and a manufacturing method thereof will be described with reference to FIGS. 3 and 4.
【００２６】下記（イ）〜（ヘ）よりなる樹脂組成物を
調整し、本発明の感光性絶縁樹脂として用いた。A resin composition comprising the following (a) to (f) was prepared and used as the photosensitive insulating resin of the present invention.
【００２７】 （イ）ジアリルフタレート樹脂 １００ｇ （ロ）エピコート８２８ ３０ｇ （ハ）ペンタエリスリトールトリアクリレート ２０ｇ （ニ）ベンゾインイソプロピルエーテル ４ｇ （ホ）ジシアンジアミド ４ｇ （ヘ）2,4-ジアミノ-6-〔2'-メチルイミダゾリル-(1')〕 -エチル-ｓ-トリアジン １ｇ （ト）その他（塗布特性向上のための添加剤） 適量 まず、上記（イ）〜（ハ）と適量の溶剤（エチルセロソ
ルブ）を混合し、８０℃で３０分間加熱撹拌した。次
に、樹脂組成物を常温にした後、他の成分（ニ）〜
（ト）を混合し三本ロールにて混練し、感光性絶縁樹脂
を得た。(A) Diallyl phthalate resin 100 g (b) Epicoat 828 30 g (c) Pentaerythritol triacrylate 20 g (d) Benzoin isopropyl ether 4 g (f) Dicyandiamide 4 g (f) 2,4-diamino-6- [2 ' -Methylimidazolyl- (1 ')]-ethyl-s-triazine 1 g (g) Other (additive for improving coating properties) Appropriate amount First, (i) to (c) above and an appropriate amount of solvent (ethyl cellosolve) are added. The mixture was mixed and heated and stirred at 80 ° C. for 30 minutes. Next, after the resin composition is brought to room temperature, other components (d) to
(G) was mixed and kneaded with a triple roll to obtain a photosensitive insulating resin.
【００２８】上記感光性絶縁樹脂３０１を図１Ｃ）の基
板両面にスプレーコータで厚さ５０μｍ塗布し、８０℃
で３０分間の予備乾燥を施して図３ａ）の基板を得た。
次いで、４００Ｗ高圧水銀ランプを用い２分間ＵＶ光で
パターン露光し、現像してビアホール３０２を形成し、
さらに、全面露光をして図３ｂ）の基板を得た。その
後、樹脂と後工程のめっき皮膜との接着強度を確保する
ために樹脂表面の粗化を行った。用いた粗化液及び粗化
条件は、次の通りである。The photosensitive insulating resin 301 is applied to both sides of the substrate shown in FIG. 1C) with a spray coater to a thickness of 50 μm, and the temperature is set to 80 ° C.
The substrate of FIG. 3a) was obtained by performing pre-drying for 30 minutes.
Next, pattern exposure is performed with UV light for 2 minutes using a 400 W high pressure mercury lamp, and development is performed to form a via hole 302,
Further, the entire surface was exposed to obtain the substrate of FIG. 3b). After that, the resin surface was roughened in order to secure the adhesive strength between the resin and the plating film in the subsequent step. The roughening liquid and roughening conditions used are as follows.
【００２９】 過マンガン酸カリウム ０．１〜０．５
ｍｏｌ／ｌ 水酸化ナトリウム ０．２〜０．４
ｍｏｌ／ｌ 液温 ５０〜９０℃ 上記図３ｂ）の基板を３〜１０分間浸漬し粗化を行い、
５０ｖｏｌ％塩酸に３分浸漬して中和させ、後に水洗・
乾燥して粗化層を形成した。次に、粗化層を活性化する
ため触媒液に浸漬し、下地導電膜を無電解銅めっきで
０．２μｍ形成した後、樹脂層を完全硬化するため１５
０℃で３０分間加熱硬化を行い、最後に、厚付け電気銅
めっき３０３を１５μｍを施して図３ｃ）の基板とし
た。処理液及び処理条件を下記に示す。Potassium permanganate 0.1-0.5
mol / l sodium hydroxide 0.2-0.4
mol / l liquid temperature 50 to 90 ° C. The substrate of FIG. 3b) is immersed for 3 to 10 minutes for roughening,
Soak in 50 vol% hydrochloric acid for 3 minutes to neutralize, and then wash with water.
It dried and formed the roughening layer. Then, the roughened layer is immersed in a catalyst solution to activate it, and a base conductive film is formed to a thickness of 0.2 μm by electroless copper plating.
It was heat-cured at 0 ° C. for 30 minutes, and finally thick copper electroplating 303 was applied to a thickness of 15 μm to obtain the substrate of FIG. 3c). The processing liquid and the processing conditions are shown below.
【００３０】 （触媒処理液）シップレー社製 キャタプリップ４０４ （２７０ｇ／ｌ） ４５℃、３分 キャタプリップ４０４ （２７０ｇ／ｌ） ４５℃、５分 キャタポジット４４ （３０ｍｌ／ｌ） アクセレータ 室温、３分 （導電膜）シップレー社製 カッパーミックス ３２８Ａ （１２５ｍｌ／ｌ） 室温、１分 カッパーミックス ３２８Ｌ （１２５ｍｌ／ｌ） カッパーミックス ３２８Ｃ （２５ｍｌ／ｌ） （銅めっき前処理） ニュートラクリーン （５０ｖｏｌ％） 室温、３分 硫酸洗浄 （１０ｖｏｌ％） 室温、１分 （厚付け電気銅めっき） ＣｕＳＯ4・５Ｈ2Ｏ （７５ｍｌ／ｌ） Ｈ2ＳＯ4 （９８ｍｌ／ｌ） ＨＣｌ （０．１５ｍｌ／ｌ） Ｃｕ−ボードＨＡメーキャップ（１０ｍｌ／ｌ） （株）荏原ユージライト製 液温 室温 電流密度 ２Ａ／ｄｍ2 次ぎに、常法により基板にエッチングレジストを形成
し、露光、現像、エッチング、剥離の工程により銅３０
３をパターニングし、さらに、不要な回路間の触媒を除
去して第１層目の導体パターン層３０４を形成した図３
ｄ）の基板を得た。触媒の除去は、５ｗｔ％ＮａＯＨの
強アルカリ水溶液に１０分間浸漬して行った。(Catalyst Treatment Liquid) Shipley Catplip 404 (270 g / l) 45 ° C., 3 minutes Catplip 404 (270 g / l) 45 ° C., 5 minutes Cataposit 44 (30 ml / l) Accelerator room temperature, 3 minutes (conductive) Membrane) Shipley's Copper Mix 328A (125 ml / l) room temperature, 1 minute Copper Mix 328 L (125 ml / l) Copper mix 328C (25 ml / l) (copper plating pretreatment) Neutraclean (50 vol%) room temperature, 3 minutes Sulfuric acid Washing (10 vol%) Room temperature, 1 minute (thick electrolytic copper plating) CuSO 4 .5H 2 O (75 ml / l) H 2 SO 4 (98 ml / l) HCl (0.15 ml / l) Cu-board HA makeup ( 10ml / l) Ebara-Udylite Co., Ltd. Liquid temperature room temperature Current density 2A / dm 2 Next, an etching resist is formed on the substrate by a conventional method, and copper 30 is formed by the steps of exposure, development, etching and peeling.
3 is formed by patterning No. 3 and further removing a catalyst between unnecessary circuits to form a first conductor pattern layer 304.
A substrate of d) was obtained. The catalyst was removed by immersing it in a strong alkaline aqueous solution of 5 wt% NaOH for 10 minutes.
【００３１】第２層、第３層の導体パターン層の形成に
関しても上記と同様に行ない、最後に、ソルダーレジス
トを表面に形成して図４の基板を得た。図４の基板の層
構成は、４０１と４０８がキャップ兼グランド層、４０
２と４０３、及び４０６と４０７が信号層、４０４と４
０５が２種類の電源層で、ベース基板の表裏の信号層間
及び裏面の電源層との接続は穴埋めされた貫通めっきス
ルーホールと接続する導体パッド４０９で取っている。The formation of the second and third conductor pattern layers was performed in the same manner as above, and finally, a solder resist was formed on the surface to obtain the substrate of FIG. In the layer structure of the substrate of FIG. 4, 401 and 408 are cap and ground layers, and 40.
2 and 403, and 406 and 407 are signal layers, and 404 and 4
Reference numeral 05 denotes two kinds of power supply layers, and the connection between the signal layers on the front and back surfaces of the base substrate and the power supply layers on the back surface is made by the conductor pads 409 connected to the through-plated through holes filled with holes.
【００３２】〈実施例３〉下地導電膜として下記無電解
ニッケルめっきを行ない、実施例２と同様にして図４の
基板を得た。<Embodiment 3> The following electroless nickel plating was carried out as a base conductive film, and a substrate of FIG. 4 was obtained in the same manner as in Embodiment 2.
【００３３】 （無電解ニッケルめっき液） ブルーシューマー（Ｎｉ−Ｐ） 原液使用 カニゼン社製 液温 ８０℃ めっき時間 ５分 下地導電膜は銅よりもニッケルの方が樹脂との接着強度
は大きかった。(Electroless Nickel Plating Solution) Blue-Summer (Ni-P) Using undiluted solution, manufactured by Kanigen Co., Ltd. Liquid temperature: 80 ° C. Plating time: 5 minutes Nickel was stronger in adhesive strength with resin than copper in the underlying conductive film.
【００３４】〈実施例４〉図１ｃ）の基板表面の導体表
面の保護及び下地導電膜に実施例３と同様の無電解ニッ
ケルめっきを用い、かつ、粗化液及び粗化条件として下
記クロム硫酸粗化液及び条件を用い、他は実施例２と同
様にして図４の基板を得た。Example 4 The same electroless nickel plating as in Example 3 was used for the conductor surface protection and the underlying conductive film on the substrate surface of FIG. 1c), and the following chromium sulfate was used as a roughening solution and roughening conditions. A substrate of FIG. 4 was obtained in the same manner as in Example 2 except that the roughening liquid and conditions were used.
【００３５】 無水クロム酸 ２．０ｍｏｌ／
ｌ〜飽和濃度 硫酸 ３．６〜６ｍｏ
ｌ／ｌ 液温 ５０〜８０℃ 時間 ３〜１０分 アルカリ中和処理 ５〜１０分Chromic anhydride 2.0 mol /
1 ~ saturated concentration sulfuric acid 3.6 ~ 6mo
1 / l Liquid temperature 50 to 80 ° C. Time 3 to 10 minutes Alkaline neutralization treatment 5 to 10 minutes
【００３６】[0036]
【発明の効果】貫通スルーホールやインタースティシャ
ルビアホールで層間接続をとる通常のプリント配線板
で、格子ピッチを１．２７ｍｍとし、格子間に２本の配
線を形成できるとして計算した時の配線密度（格子の
数、配線長を考慮）を１とすると、本発明の多層配線基
板のビルドアップ法で形成した薄膜多層配線層は格子ピ
ッチ０．６３５ｍｍに少なくとも２本の配線を形成でき
るので相対配線密度は約２となる。これは面積を同じと
すると通常のプリント配線板の信号層数を１／２に、逆
に、信号層数を同じとすると面積を１／２にすることが
できる計算になり、高密度化とコスト低減の効果が大き
い。これに対して、製造の最終段階で貫通めっきスルー
ホールを形成すると、その面積分の配線をロスすること
になる。[Effects of the Invention] In a normal printed wiring board having interlayer connection with through through holes or interstitial via holes, the wiring density is calculated assuming that the grid pitch is 1.27 mm and two wires can be formed between the grids. If (considering the number of grids and wiring length) is set to 1, the thin film multilayer wiring layer formed by the build-up method of the multilayer wiring board of the present invention can form at least two wirings at a grid pitch of 0.635 mm, so that relative wiring The density is about 2. This means that if the area is the same, the number of signal layers of a normal printed wiring board can be halved, and conversely, if the number of signal layers is the same, the area can be halved. Greatly reduces costs. On the other hand, if a through-plated through hole is formed in the final stage of manufacturing, the wiring for that area will be lost.
【００３７】このように、本発明の信頼性の高い多層配
線基板およびその製造方法により、ビルドアップ法が形
成できる本来の高密度配線能を最大限に引き出すことが
可能となり、多層配線基板の高密度化と低コストを実現
することができた。As described above, according to the highly reliable multilayer wiring board and the method of manufacturing the same of the present invention, it is possible to maximize the original high-density wiring capability capable of forming the build-up method, and it is possible to enhance the high performance of the multilayer wiring board. We were able to achieve higher density and lower cost.
【図１】本発明に係る多層配線基板及びその製造方法の
一例を示す工程図である。FIG. 1 is a process drawing showing an example of a multilayer wiring board and a method for manufacturing the same according to the present invention.
【図２】本発明に係る多層配線基板の製造方法の一例を
示す工程図である。FIG. 2 is a process drawing showing an example of a method for manufacturing a multilayer wiring board according to the present invention.
【図３】本発明に係る多層配線基板の製造方法の一例を
示す工程図である。FIG. 3 is a process drawing showing an example of a method for manufacturing a multilayer wiring board according to the present invention.
【図４】本発明に係る多層配線基板の一例を示す図であ
る。FIG. 4 is a diagram showing an example of a multilayer wiring board according to the present invention.
１０１…両面の信号層を接続する貫通めっきスルーホー
ル、 １０２…裏面の電源層との接続をとる貫通めっきスルー
ホール、 １０３…裏面の電源層との接続をとる貫通めっきスルー
ホール、 １０４…導体パッド、 １０５…有機系高分子の絶縁膜、 １０６…溶剤を含まない流動性有機系高分子前駆体、 ２０１…金型、 ３０１…感光性絶縁樹脂、 ３０２…ビアホール、 ３０３…厚付け電気銅めっき、 ３０４…第１層目の導体パターン層、 ４０１…キャップ兼グランド層、 ４０２…信号層、 ４０３…信号層、 ４０４…電源層、 ４０５…電源層、 ４０６…信号層、 ４０７…信号層、 ４０８…キャップ兼グランド層、 ４０９…導体パッド。101 ... Through-plated through-holes for connecting signal layers on both sides, 102 ... Through-plated through-holes for connecting to power supply layers on the back surface, 103 ... Through-plated through-holes for connecting to power supply layers on the back surface, 104 ... Conductor pads , 105 ... Organic polymer insulating film, 106 ... Solvent-free fluid organic polymer precursor, 201 ... Mold, 301 ... Photosensitive insulating resin, 302 ... Via hole, 303 ... Thick electrolytic copper plating, 304 ... 1st conductor pattern layer, 401 ... Cap and ground layer, 402 ... Signal layer, 403 ... Signal layer, 404 ... Power supply layer, 405 ... Power supply layer, 406 ... Signal layer, 407 ... Signal layer, 408 ... Cap / ground layer, 409 ... Conductor pad.
フロントページの続き (72)発明者 渡部 真貴雄 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所生産技術研究所内 (72)発明者 田中 勇 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所生産技術研究所内 (72)発明者 岡 齊 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所生産技術研究所内 (72)発明者 京井 正之 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所生産技術研究所内 (72)発明者 谷口 幸弘 神奈川県横浜市戸塚区戸塚町216番地株式 会社日立製作所情報通信事業部内Front Page Continuation (72) Inventor Makio Watanabe 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Stock Manufacturing Research Institute, Hitachi, Ltd. (72) Inventor Isamu Tanaka 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. Manufacturing Engineering Research Laboratory (72) Inventor Satoshi Oka, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture, Ltd.Hitachi Manufacturing Engineering Research Laboratory (72) Inventor Masayuki Keii, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa (72) Inventor, Yukihiro Taniguchi, 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Ltd.
Claims (9)
と接続する導体パッドが設けられた両面プリント配線板
上に、１層以上の導体パターン層と層間絶縁膜層とが交
互に形成され、該導体パッドと導体パターン層および導
体パターン層同士が電気的に接続されて成ることを特徴
とする多層配線基板。1. One or more conductor pattern layers and interlayer insulating film layers are alternately formed on a double-sided printed wiring board having conductor pads connected to the conductors of buried interlayer connection through holes. A multilayer wiring board comprising a conductor pad, a conductor pattern layer, and conductor pattern layers electrically connected to each other.
の位置に接続する導体パッドが設けられた両面プリント
配線板を形成する工程 （２）該両面プリント配線板の貫通めっきスルーホール
および導体間隙を有機系高分子の絶縁膜で充填する工程 を含む請求項１記載の穴埋めされた層間接続スルーホー
ルの導体と接続する導体パッドが設けられたことを特徴
とする両面プリント配線板の製造方法。2. A step of forming a double-sided printed wiring board having conductor pads connected to desired positions of through-plated through-hole conductors. (2) Through-plated through holes and conductor gaps of said double-sided printed wiring board. 2. A method for manufacturing a double-sided printed wiring board, comprising: a step of filling the insulating film of an organic polymer with a conductor pad to be connected to the conductor of the inter-layer connection through-hole filled with holes.
体の所望の位置に接続する導体パッドが設けられた両面
プリント配線板を形成する工程が、 （１）貫通めっきスルーホールを有する両面銅張り積層
板の表層導体をエッチングによりパターニングする工程 （２）該両面プリント配線板導体上の所望の位置にレジ
ストの抜きパターンを形成する工程 （３）該レジストの抜きパターン内に導体を形成する工
程 （４）該レジストを剥離する工程 を含むことを特徴とする請求項２記載の穴埋めされた層
間接続スルーホールの導体と接続する導体パッドが設け
られたことを特徴とする両面プリント配線板の製造方
法。3. The step of forming a double-sided printed wiring board having conductor pads connected to desired positions of the through-plated through-hole conductor according to claim 2, comprising: (1) double-sided copper plating having through-plated through holes. Step of patterning the surface conductor of the laminate by etching (2) Step of forming a resist removal pattern at a desired position on the double-sided printed wiring board conductor (3) Step of forming a conductor in the resist removal pattern ( 4. A method for manufacturing a double-sided printed wiring board, comprising: a step of stripping the resist; and a conductor pad connected to the conductor of the interlayer-connecting through hole according to claim 2 provided. .
体の所望の位置に接続する導体パッドが設けられた両面
プリント配線板を形成する工程が、 （１）貫通めっきスルーホールを有する両面銅張り積層
板表層導体上の所望の位置にレジストの抜きパターンを
形成する工程 （２）該レジストの抜きパターン内に導体を形成する工
程 （３）該レジストを剥離する工程 （４）該両面銅張り積層板表層導体をエッチングにより
パターニングする工程 を含むことを特徴とする請求項２記載の穴埋めされた層
間接続スルーホールの導体と接続する導体パッドが設け
られたことを特徴とする両面プリント配線板の製造方
法。4. The step of forming a double-sided printed wiring board having conductor pads connected to desired positions of the through-plated through-hole conductor according to claim 2, comprising: (1) double-sided copper plating having through-plated through holes. Step of forming a resist removal pattern at a desired position on the surface conductor of the laminated plate (2) Step of forming a conductor in the resist removal pattern (3) Step of removing the resist (4) The double-sided copper-clad laminate The method for manufacturing a double-sided printed wiring board according to claim 2, further comprising: a step of patterning the board surface layer conductor by etching to provide a conductor pad connected to the conductor of the inter-layer connection through hole filled with holes. Method.
体の所望の位置に接続する導体パッドが設けられた両面
プリント配線板の貫通めっきスルーホールおよび導体間
隙を有機系高分子の絶縁膜で充填する工程が、 （１）該両面プリント配線板上に表面の平坦な金型を設
置し、該両面プリント配線板と該金型との間に溶剤を含
まない流動性有機系高分子前駆体を挾む工程 （２）該金型と該両面プリント配線板との間を排気する
工程 （３）該金型を該両面プリント配線板方向へ移動させて
該溶剤を含まない流動性有機系高分子前駆体を貫通めっ
きスルーホールおよび導体間隙に充填する工程 （４）該溶剤を含まない流動性有機系高分子前駆体に静
水圧をかける工程 （５）該溶剤を含まない流動性有機系高分子前駆体を硬
化する工程 （６）該有機系高分子で覆われた導体上面を露出させる
工程 を含むことを特徴とする請求項２記載の穴埋めされた層
間接続スルーホールの導体と接続する導体パッドが設け
られたことを特徴とする両面プリント配線板の製造方
法。5. The through-plated through-hole and the conductor gap of a double-sided printed wiring board having conductor pads connected to desired positions of the through-plated through-hole conductor according to claim 2, are filled with an organic polymer insulating film. (1) A mold having a flat surface is placed on the double-sided printed wiring board, and a fluid organic polymer precursor containing no solvent is provided between the double-sided printed wiring board and the mold. Clamping step (2) Step of evacuating between the die and the double-sided printed wiring board (3) Moving the die toward the double-sided printed wiring board so that the solvent-free fluid organic polymer Step of filling precursor into through-plated through-hole and conductor gap (4) Step of applying hydrostatic pressure to the solvent-free fluid organic polymer precursor (5) Fluid-free organic polymer not containing the solvent Step (6) of curing the precursor The step of exposing the upper surface of the conductor covered with the mechanical polymer, the method comprising the step of exposing the conductor upper surface of the buried interlayer connecting through hole according to claim 2, wherein both sides are provided. Manufacturing method of printed wiring board.
ーホールの導体と接続する導体パッドが設けられた両面
プリント配線板上に （１）感光性絶縁樹脂を成膜する工程 （２）露光、現像により該感光性絶縁樹脂にビアホール
を形成する工程 （３）露光された該感光性絶縁樹脂表面を粗化する工程 （４）導体を形成する工程 （５）熱硬化により該感光性絶縁樹脂を完全硬化する工
程 （６）該導体のエッチングによりパターンを形成する工
程 を経て、（１）から（６）までの工程を繰り返すことで
多層化することを特徴とする請求項１記載の多層配線基
板の製造方法。6. A step of forming a photosensitive insulating resin film on a double-sided printed wiring board provided with a conductor pad for connecting with a conductor of a buried interlayer through hole according to claim 2, (2) exposure A step of forming a via hole in the photosensitive insulating resin by development (3) a step of roughening the exposed surface of the photosensitive insulating resin (4) a step of forming a conductor (5) the photosensitive insulating resin by thermosetting The multilayer wiring according to claim 1, wherein the step (6) of completely curing the layer is repeated to repeat the steps (1) to (6) after the step of forming a pattern by etching the conductor. Substrate manufacturing method.
系高分子前駆体が多官能エポキシ樹脂組成物、分子内に
２個以上のマレイミド骨格を有する化合物の組成物、分
子内に２個以上のシアン酸エステル骨格を有する化合物
の組成物、分子内に２個以上のベンゾシクロブテン骨格
を有する化合物の組成物の内の少なくとも１つ以上を含
む組成物であることを特徴とする請求項４記載の穴埋め
された層間接続スルーホールの導体と接続する導体パッ
ドが設けられたことを特徴とする両面プリント配線板の
製造方法。7. The solvent-free fluid organic polymer precursor according to claim 5 is a polyfunctional epoxy resin composition, a composition of a compound having two or more maleimide skeletons in the molecule, and 2 in the molecule. A composition of a compound having one or more cyanate ester skeletons, and a composition containing at least one of the compositions of compounds having two or more benzocyclobutene skeletons in the molecule. Item 5. A method of manufacturing a double-sided printed wiring board, comprising: a conductor pad connected to the conductor of the inter-layer connection through hole filled in according to Item 4.
とも、室温で固形の多官能不飽和化合物、エポキシ樹
脂、アクリレートモノマー、光重合開始剤、アミン系の
熱硬化剤から成る組成物、あるいは、少なくとも、不飽
和基を付加反応させた２官能以上の多官能固形エポキシ
樹脂、アクリレートモノマー、光重合開始剤、アミン系
の熱硬化剤から成る組成物の内の１つであることを特徴
とする請求項５記載の多層配線基板の製造方法。8. A composition in which the photosensitive insulating resin according to claim 6 comprises at least a solid polyfunctional unsaturated compound at room temperature, an epoxy resin, an acrylate monomer, a photopolymerization initiator, and an amine-based thermosetting agent. Alternatively, it is at least one of the compositions consisting of a polyfunctional solid epoxy resin having two or more functional groups having an unsaturated group added thereto, an acrylate monomer, a photopolymerization initiator, and an amine-based thermosetting agent. The method for manufacturing a multilayer wiring board according to claim 5.
アンジアミドあるいはジアミノトリアジン化合物である
ことを特徴とする請求項７記載の多層配線基板の製造方
法。9. The method for producing a multilayer wiring board according to claim 7, wherein the amine thermosetting agent according to claim 8 is a dicyandiamide or a diaminotriazine compound.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24656593A JP3166442B2 (en) | 1993-10-01 | 1993-10-01 | Multilayer wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24656593A JP3166442B2 (en) | 1993-10-01 | 1993-10-01 | Multilayer wiring board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07106767A true JPH07106767A (en) | 1995-04-21 |
| JP3166442B2 JP3166442B2 (en) | 2001-05-14 |
Family
ID=17150308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24656593A Expired - Lifetime JP3166442B2 (en) | 1993-10-01 | 1993-10-01 | Multilayer wiring board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3166442B2 (en) |
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| JP2002094247A (en) * | 2000-09-14 | 2002-03-29 | Sony Corp | High-frequency module device and method for manufacturing the same |
| US6384344B1 (en) | 1995-06-19 | 2002-05-07 | Ibiden Co., Ltd | Circuit board for mounting electronic parts |
| JP2003069232A (en) * | 2001-08-30 | 2003-03-07 | Hitachi Chem Co Ltd | Wiring board and its manufacturing method |
| US6831234B1 (en) | 1996-06-19 | 2004-12-14 | Ibiden Co., Ltd. | Multilayer printed circuit board |
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| US8344257B2 (en) | 2009-06-10 | 2013-01-01 | Htc Corporation | Flexible printed circuit and fabrication method thereof |
| KR101022871B1 (en) * | 2009-08-11 | 2011-03-16 | 삼성전기주식회사 | Printed circuit board and fabricating method of the same |
| WO2013065694A1 (en) | 2011-11-02 | 2013-05-10 | 三菱瓦斯化学株式会社 | Resin composition, prepreg, and laminated sheet |
| KR20140097146A (en) | 2011-11-02 | 2014-08-06 | 미츠비시 가스 가가쿠 가부시키가이샤 | Resin composition, prepreg, and laminated sheet |
| US9527979B2 (en) | 2011-11-02 | 2016-12-27 | Mitsubishi Gas Chemical Company, Inc. | Resin composition, prepreg, and laminate |
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|---|---|
| JP3166442B2 (en) | 2001-05-14 |
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