JPH0690369A - Horizontal drive circuit - Google Patents

Abstract

PURPOSE:To provide the horizontal drive circuit at a variable scanning rate over a wide variable range used for a high definition display device. CONSTITUTION:A rectangular drive signal synchronous with a horizontal synchronizing signal is inputted to a constant current generating circuit section 28. A drive pulse subjected to current amplification is outputted to a horizontal output transistor(TR) 7 of a horizontal deflection circuit via a clamp circuit section 41. An excess charge extract circuit section 39 eliminates residual charges on a base of the TR 7 at a high speed. An input voltage of a power supply voltage control circuit section 51 is changed almost in proportion to a horizontal deflection frequency. Thus, a voltage outputted from a power supply VC3 is controlled by a TR 61, an optimum power supply is fed to the current generating circuit section 28, in which a tracing frequency range at a multi-scanning rate is considerably extended.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit used in a horizontal deflection circuit such as a high definition display monitor.

[0002]

2. Description of the Related Art A horizontal drive circuit for inputting a drive pulse to a horizontal deflection circuit of a display monitor amplifies a rectangular drive signal having a fixed duty ratio by the drive circuit and drives a horizontal output transistor using a drive transformer. Circuits are common. Such a horizontal drive circuit supplies a constant power supply voltage and is used in a video display device with a fixed scan rate such as a general television receiver. 2. Description of the Related Art In recent years, as a display monitor for a computer, a multi-frequency compatible (variable scan rate) display monitor capable of following a plurality of scan rates (horizontal deflection frequencies) with one display has become widespread.

FIG. 2 is a circuit diagram showing a configuration example of a conventional horizontal drive circuit having a fixed duty ratio and a drive signal having a fixed duty ratio. In the figure, the horizontal oscillation circuit 1 is a circuit for generating a synchronizing pulse in synchronization with a horizontal synchronizing signal of an image when it is input. The horizontal drive transistor 2 is a transistor that inputs a pulse output from the horizontal oscillation circuit 1 and switches a current. A series connection body of a horizontal drive transformer 3 and a resistor 4 is connected to the collector of the transistor 2. The transformer 3 is a transformer that supplies a drive pulse to the horizontal deflection circuit, and current-amplifies the pulse on the primary side and outputs it to the secondary side. The transistor 2, the transformer 3, and the resistor 4 form a drive circuit unit 5, and a DC power source is supplied from a fixed power source (not shown) via a power source input terminal 6.

The horizontal output transistor 7 is a switching transistor which is turned on / off by a drive pulse output from the transformer 3. A series connection of a damper diode 8, a resonance capacitor 9, a horizontal deflection coil 10 and a scanning capacitor 11 is connected between the collector and the emitter of the transistor 7, respectively. The damper diode 8 is a diode that becomes conductive or non-conductive depending on the polarity of the voltage charged in the capacitor 9. The capacitor 9 is a resonance capacitor that forms a resonance circuit together with the horizontal deflection coil 10, and when the transistor 7 is off, the horizontal deflection coil 1
A charging / discharging current is supplied to 0. Horizontal deflection coil 10
Is a coil for passing a deflection current for scanning the electron beam of the CRT in the horizontal direction. The capacitor 11 is an S-shaped correction capacitor that corrects the current of the horizontal deflection coil 10 in order to keep the horizontal deflection sensitivity of the CRT constant on the left and right and in the center of the CRT.

Here, the transistor 7, the damper diode 8, the capacitors 9 and 11, and the horizontal deflection coil 10 constitute a horizontal deflection circuit. The choke coil 12 is a coil that supplies the DC power of the power input terminal 13 to the horizontal deflection circuit and also prevents the deflection signal output from the horizontal deflection coil 10 from being output to the outside through the power supply line.

The horizontal drive circuit 5 thus constructed
When the synchronizing pulse is output from the horizontal oscillation circuit 1 at 1, the transistor 2 performs an on / off operation based on this pulse, and a pulse current flows through the primary side of the transformer 3. The drive pulse current-amplified on the secondary side of the transformer 3 is given to the transistor 7 and drives the resonance circuit of the capacitor 9 and the horizontal deflection coil 10. At this time, a sawtooth wave deflection current flows through the horizontal deflection coil 10, and the capacitor 11 corrects the current waveform of the inclined portion to have an S shape.

The characteristics of the transistors 2 and 7 are selected so as to correspond to a fixed horizontal deflection frequency.
Particularly in the transistor 7 that performs a switching operation of high power, it is difficult to discharge the accumulated charge generated in the base at high speed. Further, when the frequency of the synchronizing pulse output from the horizontal oscillation circuit 1 decreases, the current of the drive pulse output from the drive circuit unit 5 decreases, and it is difficult to keep the horizontal deflection sensitivity of the CRT constant.

Next, FIG. 3 is a circuit diagram showing a configuration example of another conventional horizontal drive circuit in which a drive pulse having a fixed duty ratio is input and driven by a constant current drive source.
In the figure, the capacitor 21 is a coupling capacitor that blocks the DC component of a rectangular drive signal having a fixed duty ratio that is input to the input terminal 5a. The output terminal of the capacitor 21 is connected to the base of the transistor 23 via the resistor 22. The transistor 23 is a transistor that current-amplifies the drive signal, and its collector has a resistor 2
It is connected to the power source V _C1 via 4, 25. Resistance 24, 25
Is a dividing resistor for converting the amplified drive signal into a signal having a predetermined amplitude. The common connection ends of the resistors 24 and 25 are connected to the base of the transistor 26.

The transistor 26 has an emitter connected to a power supply V _C1 via a resistor 27 and a collector connected to a FET described later. The transistor 26 is a PNP type transistor that supplies a switching current to a horizontal output transistor described later. Here, the transistors 23 and 26, the resistor 2
Reference numerals 2, 24, 25 and 27 constitute a constant current generating circuit section 28 for horizontal drive.

Now, the output terminal of the capacitor 21 is further connected to the resistor 2
It is connected to the base of the transistor 30 via 9. The common connection end of the capacitor 21 and the resistor 29 is grounded via the resistor 31, and the resistors 29 and 31 are voltage dividing resistors for dividing the input drive signal. The collector of the transistor 30 is connected to the power supply V _C2 through the series connection of the resistors 32 and 33, and the emitter is grounded. The transistors 34 and 35 are NPN and PNP type transistors, respectively, and form a complementary emitter follower circuit. That is, transistor 3
The collector of 4 is connected to the power supply V _C2 via the resistor 36, the emitter is connected to the emitter of the transistor 35, and the base is connected to the common connection end of the resistors 32 and 33. The collector of the transistor 35 is grounded, and the base is connected to the collector of the transistor 30.

The emitters of the transistors 34 and 35 are commonly connected and connected to the gate of the FET 38 via the resistor 37. The FET 38 is an N-channel MOSFET and has extremely low on-resistance and high-speed switching characteristics. The source of the FET 38 is grounded, and the drain is connected to the collector of the transistor 26. Here, the transistors 30, 34 and 35, the FET 38, and the resistors 29 and 3
1, 32, 33, 36, and 37 are excess charge extraction circuit units 39
Are configured.

Next, the output terminals of the constant current generating circuit section 28 and the charge extracting circuit section 39 are commonly connected and connected to the clamp circuit section 41 via the capacitor 40. The capacitor 40 is a coupling capacitor that blocks the DC component contained in the drive pulse output by the constant current generating circuit unit 28. The clamp circuit unit 41 includes a transistor 42, a resistor 43, and a diode 44. A transistor 42, a resistor 43, and a series connection of a diode 44 are provided between the output end of the capacitor 40 and the ground. Resistance 43
And the cathode side connection end of the diode 44 is the transistor 4
2 connected to the base. The collector of the transistor 42 is grounded, and the emitter is connected to the output terminal of the capacitor 40. The clamp circuit unit 41 is a circuit that holds the DC level of the drive pulse output via the capacitor 40 within a certain range and prevents the base current from varying.

The output terminal of the clamp circuit section 41 is a resistor 45.
It is connected to the base of the horizontal output transistor 7 via a parallel connection body of the coil 46 and the diode 47. Since the configuration of the horizontal deflection circuit including the horizontal output transistor 7 is the same as that of FIG. 2, its description is omitted.

The operation of the horizontal drive circuit 48 constructed as above will be described. When a rectangular wave drive signal having a fixed duty ratio is applied to the input terminal 5a, the DC component of this signal is removed by the capacitor 21, and the signal is applied to the transistors 23 and 30, respectively. In the constant current generating circuit unit 28, the drive signal is inverted and amplified by the transistor 23, and the signal divided by the resistors 24 and 25 is transferred to the transistor 2
6 bases are entered. The transistor 26 generates a rectangular pulse current according to the base current, and outputs a constant-current drive pulse determined by the power supply V _C1 and the resistor 27.
At this time, if the drive signal at the input terminal 5a is at H level, the transistor 26 outputs a drive pulse whose current is limited by the resistor 27. Next, this drive pulse is
It is given to the transistor 7 via the capacitor 40 and the clamp circuit portion 41, and the transistor 7 is rapidly turned on.
The coil 46 suppresses a spike voltage generated when the drive pulse rises.

On the other hand, the drive signal input to the transistor 30 is inverted and amplified. When an H level drive signal is input, the emitters of the transistors 34 and 35 are set to L
The level is turned on and the FET 38 is turned off. As described above, when the transistor 26 is turned on, the FET 38 is turned off and a complementary switching operation is performed.

Next, when the drive signal at the input terminal 5a becomes L level, the transistors 23 and 26 are turned off, and the drive pulse is not supplied to the transistor 7. At this time, the transistors 30 and 34 are also turned off, and F
The gate voltage of ET38 becomes H level. Therefore FE
T38 becomes conductive, and the electric charge accumulated in the base of the transistor 7 is rapidly extracted through the FET 38. At this time, the diode 47 that reduces the resistance of the base circuit of the transistor 7 becomes conductive, and the transistor 7 is rapidly cut off. At this time, the clamp circuit unit 41 prevents the applied voltage between the base and the emitter of the transistor 7 from exceeding the reverse withstand voltage.

As described above, when the constant current type horizontal drive circuit 48 is used, it is possible to supply a drive pulse which gives a constant base current to the horizontal output transistor 7 even if the horizontal deflection frequency changes.

On the other hand, as disclosed in, for example, Japanese Unexamined Patent Publication No. 1-164272, a horizontal deflection circuit is arranged so that the loss of the horizontal output transistor is always minimized regardless of the difference in the horizontal size of the display screen and the horizontal deflection frequency. Has been proposed for controlling the drive pulse of the. Here, feedback control is used to output the optimum drive pulse without being affected by changes in the collector current of the horizontal output transistor, variations in parts of the horizontal drive circuit, and changes in operating temperature.

[0019]

In the horizontal drive circuit 5 shown in FIG. 2, a drive pulse is supplied to the base of the horizontal output transistor 7 by transformer coupling, and the drive voltage changes depending on the frequency. That is, when the deflection frequency becomes low, the drive becomes insufficient, and when the deflection frequency becomes high, the drive becomes excessive. Therefore, the optimum drive condition of the horizontal output transistor 7 cannot be obtained in the entire range of the deflection frequency, which is not suitable for the horizontal drive circuit of the display monitor having the variable scan rate.

Further, in the constant current drive type horizontal drive circuit 48 shown in FIG. 3, almost the same drive current can always flow to the base of the horizontal output transistor 7 even if the deflection frequency changes. Therefore, the horizontal output transistor 7 is not excessively driven or overdriven, and a frequency variable horizontal drive circuit can be realized with a relatively inexpensive configuration. However, due to the characteristics such as the storage time of the horizontal output transistor 7, there may be a slight tendency to drive short when the deflection frequency is low and a drive over tendency when the deflection frequency is high. Therefore, the tracking frequency range of the multi-scan rate is 2
When the width becomes double or triple, it is difficult to keep the operation of the horizontal output transistor 7 optimum at all frequencies by the constant current drive.

Further, in the horizontal drive circuit of the operating voltage control system disclosed in Japanese Patent Laid-Open No. 1-164272, optimum driving conditions can be obtained under various operating conditions, but there is a drawback that the circuit configuration is complicated and the cost is high. .

The present invention has been made in view of the above-mentioned conventional problems, and uses a constant current drive type horizontal drive circuit to extend the range of the follow-up frequency to 2-3 times. It is intended to realize a horizontal drive circuit for a rate display monitor.

[0023]

According to the present invention, there is provided a constant current generating circuit section for generating a drive pulse of a constant current for driving a horizontal output transistor of a horizontal deflection circuit by a horizontal drive signal supplied from a horizontal oscillation circuit. A horizontal drive circuit for extracting excess charge from the base of the horizontal output transistor when the drive pulse output from the constant current generating circuit is at the L level, the power supply voltage of the constant current generating circuit being Is provided when the frequency of the horizontal drive signal is increased, and is increased when the frequency is decreased.

[0024]

According to the present invention having such a feature, the constant current generating circuit section generates a constant current drive pulse for driving the horizontal output transistor of the horizontal deflection circuit by the horizontal drive signal supplied from the horizontal oscillation circuit. Occur. Further, the excess charge extraction circuit unit extracts the excess charge of the base of the horizontal output transistor when the drive pulse output from the constant current generation circuit unit is at L level, and drives the horizontal deflection circuit at high speed.
At this time, the power supply voltage control circuit unit lowers the power supply voltage of the constant current generation circuit unit when the frequency of the horizontal drive signal becomes higher, and raises it when the frequency becomes lower. This makes it possible to optimally set the driving condition of the horizontal output transistor with respect to the horizontal deflection frequency.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A horizontal drive circuit according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a circuit diagram showing the configuration of a horizontal drive circuit according to an embodiment of the present invention, and the same parts as those in FIG. 3 are omitted. The same parts as those in FIGS. 2 and 3 showing the conventional example are designated by the same reference numerals and the description thereof will be omitted. It is the same as the conventional example shown in FIG. 3 that the horizontal drive circuit 50 shown by the broken line in FIG. 1 is provided with a constant current generating circuit section 28, an excess charge extraction circuit section 39, and a clamp circuit section 41, respectively.

Unlike the conventional example, a power supply voltage control circuit section 51 is provided. In the power supply voltage control circuit unit 51, the input terminal 52 is a terminal for inputting a signal for power supply voltage control. The operational amplifier 53 is a circuit that inputs the control voltage of the power supply input to the input terminal 52 to the non-inverting input terminal and amplifies the signal. The transistor 54 is a transistor for inputting the output of the operational amplifier 53 to the base and performing inverting amplification. The emitter of the transistor 54 is grounded via the resistor 55 and is connected to the inverting input terminal of the amplifier 53.
The collector of the transistor 54 is connected to the power source V via the resistor 56.
Connected to _C3 . Here, amplifier 53, transistor 5
The four resistors 55 and 56 form a voltage follower.

Next, a series connection body of a shunt regulator 57 and a resistor 58 is provided between the power source V _C3 and the ground. The shunt regulator 57 is a three-terminal IC for voltage control having an anode A, a cathode K, and a gate R. A resistor 59 is connected between one end of the resistor 56 and the anode A of the regulator 57, and the voltage (V _KA ) between the cathode and the anode is controlled by controlling the voltage ratio applied to the resistors 59 and 56. That is, shunt regulator 5
7, the voltage V _KA rises when the voltage across the terminals of the resistor 56 rises.

The power supply V _C3 is supplied to the transistor 6 via the resistor 60.
1 collector. The base of the transistor 61 is connected to the common connection end of the resistors 58 and 59 and the regulator 57, and the emitter is connected to the power supply input end 28a of the constant current generating circuit unit 28. The transistor 61 is a transistor that causes the voltage of the power supply V _C3 to drop by the control voltage of the input terminal 52 and controls the DC voltage supplied to the constant current generating circuit unit 28. The output end of the horizontal drive circuit 50 configured as above is connected to the same horizontal deflection circuit as in FIG. 2 or 3.

The operation of the horizontal drive circuit 50 of this embodiment will be described focusing on the portion added to FIG. Figure 1
At, the control voltage input to the input terminal 52 is a voltage corresponding to the horizontal deflection frequency, and the control voltage substantially proportional to the frequency is input.

For example, when the horizontal drive circuit 50 is driven at a low deflection frequency, the voltage input to the amplifier 53 is lowered. In this case, the collector current I _{C of the} transistor 54
And the voltage drop across resistor 56 is also reduced. Therefore, the applied voltage of the gate R to the cathode K applied to the regulator 57 decreases. Therefore, the voltage V _KA between the terminals of the regulator 57 decreases and the base potential of the transistor 61 increases. Therefore, the conduction resistance of the transistor 61 decreases, and the voltage supplied to the power supply input terminal 28a of the constant current generating circuit unit 28 increases. Therefore, when the drive signal input to the input terminal 5a is amplified by the transistors 23 and 26, the drive pulse having the increased current capacity is supplied to the base of the horizontal output transistor 7 via the clamp circuit section 41.

Next, when the deflection frequency is increased, the control voltage input to the input terminal 52 is increased. This voltage is amplified through the amplifier 53 and the transistor 54, the collector current I _C of the transistor 54 increases, and the drop voltage of the resistor 56 also increases. Therefore, the voltage of the gate R with respect to the cathode K of the regulator 57 rises, and the voltage V _KA between the terminals is increased.
Will increase. Therefore, the base current of the transistor 61 decreases and the voltage drop between the collector and the emitter rises. Therefore, the voltage input from the power supply V _C3 decreases and is supplied to the power supply input terminal 28a of the constant current generating circuit unit 28. Therefore, when a drive signal having a high frequency is applied to the input terminal 5a, the current capacity of the drive pulse output from the constant current generating circuit unit 28 is slightly reduced, and this signal is supplied to the base of the horizontal output transistor 7.

Thus, at each horizontal deflection frequency, the power supply voltage of the constant current generating circuit unit 28 is determined in advance so that the horizontal output transistor 7 can be optimally driven, and the horizontal deflection is applied to the input terminal 52 so as to obtain the power supply voltage. A control voltage corresponding to the frequency is supplied. By doing so, it is possible to obtain the optimum drive condition following a wide frequency change in a display monitor having a multi-scan rate.

Although the shunt regulator 57 is used for the power supply voltage control circuit section 51, the same voltage control can be performed by using a regulator having another four terminals.
Further, as the control voltage applied to the input terminal 52, for example, data generated by a microcomputer may be applied via a D / A converter. In this way, not only can the horizontal deflection frequency be followed, but a signal corresponding to the timing of the video signal, the difference in horizontal amplitude of the display screen, and the like can be supplied, and the drive amount corresponding to that can be controlled.

[0034]

As described in detail above, according to the present invention, by providing the power supply voltage control circuit section for controlling the supply voltage of the constant current generating circuit section according to the deflection frequency, the horizontal deflection frequency can be prevented. Therefore, the drive condition of the horizontal output transistor can be optimally set. Therefore, in a multi-scan rate display monitor, the width of the horizontal deflection frequency can be expanded 2-3 times at a low cost with a simple configuration. Further, the power loss of the horizontal drive circuit and the horizontal deflection circuit connected to this circuit can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a horizontal drive circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram (No. 1) showing a configuration example of a conventional horizontal drive circuit.

FIG. 3 is a circuit diagram (No. 2) showing a configuration example of a conventional horizontal drive circuit.

[Explanation of symbols]

5,52 Input terminals 21,40 Capacitors 22,24,25,27,29,31,32,33,3
6,37,43,45,55,56,57,58,5
9,61 Resistance 23,26,30,34,35,42,54,61 Transistor 28 Constant current generation circuit part 38 FET 39 Excess charge extraction circuit part 41 Clamp circuit part 44,47 Diode 46 Coil 50 Horizontal drive circuit 51 Power supply Voltage control circuit V _C1 , V _C2 , V _C3 power supply

Claims (1)

[Claims] 1. A constant current generating circuit section for generating a drive pulse of a constant current for driving a horizontal output transistor of a horizontal deflection circuit according to a horizontal drive signal supplied from a horizontal oscillation circuit, and the constant current generating circuit section. In the horizontal drive circuit having an excess charge abstraction circuit unit that abstracts excess charge from the base of the horizontal output transistor when the drive pulse output by the horizontal drive signal is at the L level, A horizontal drive circuit having a power supply voltage control circuit section that lowers the frequency when the frequency increases and raises the frequency when the frequency decreases.