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JPH064039A - Ac type plasma display panel and driving circuit therefor - Google Patents

Ac type plasma display panel and driving circuit therefor

Info

Publication number
JPH064039A
JPH064039A JP4161146A JP16114692A JPH064039A JP H064039 A JPH064039 A JP H064039A JP 4161146 A JP4161146 A JP 4161146A JP 16114692 A JP16114692 A JP 16114692A JP H064039 A JPH064039 A JP H064039A
Authority
JP
Japan
Prior art keywords
electrodes
display panel
plasma display
type plasma
block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4161146A
Other languages
Japanese (ja)
Inventor
Shigetoshi Tomio
重寿 冨尾
Giichi Kanazawa
義一 金澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4161146A priority Critical patent/JPH064039A/en
Publication of JPH064039A publication Critical patent/JPH064039A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/025Reduction of instantaneous peaks of current

Landscapes

  • Gas-Filled Discharge Tubes (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)

Abstract

PURPOSE:To provide the driving circuit of the AC type plasma display panel which is reduced in the peak current of the charging and discharging of a panel capacitance by dispersing the charging and discharging currents at the time of maintaining discharging pulses. CONSTITUTION:This driving circuit drives the AC type plasma display panel 1 in surface discharge structure equipped with X electrodes X1-XP and Y electrodes Y1-YN, and address electrodes A1-AM; and the X electrodes X1-XP and Y electrodes Y1-YN are divided into P blocks (P = 4 in the figure). Then the driving circuit has P X-side driver circuits XD1-XDP which apply high- voltage pulses to the X electrodes X1-XP, block by block, and Y-side driver circuits YD1-YDP which apply maintaining discharging pulses to the Y electrodes Y1-YN, block by block; and the P X-side driver circuits XD1-XDP and P Y-side driver circuits YD1-YDP generate pulse voltages which are out of phase with one another.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、維持放電を行なうため
の電極と、データの書き込みを行なうためのアドレス電
極とを備える面放電構造のAC型プラズマディスプレイ
パネルを駆動するAC型プラズマディスプレイパネルの
駆動回路に係り、特に、維持放電パルス印加時の充放電
電流の集中を少なくすることにより、パネル容量による
充放電のピーク電流を低減したAC型プラズマディスプ
レイパネルの駆動回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AC type plasma display panel for driving an AC type plasma display panel having a surface discharge structure provided with electrodes for sustaining discharge and address electrodes for writing data. The present invention relates to a drive circuit, and more particularly to a drive circuit for an AC type plasma display panel in which the peak charge / discharge current due to the panel capacitance is reduced by reducing the concentration of the charge / discharge current when a sustain discharge pulse is applied.

【0002】[0002]

【従来の技術】図4に、従来の面放電AC型プラズマデ
ィスプレイパネルの断面構造(図4(1))、及び電極
構造(図4(2))を示す。
2. Description of the Related Art FIG. 4 shows a sectional structure (FIG. 4 (1)) and an electrode structure (FIG. 4 (2)) of a conventional surface discharge AC type plasma display panel.

【0003】同図において、従来の面放電AC型プラズ
マディスプレイパネルは、維持放電を行なうためのX電
極X及びY電極Yk (k=1〜N;Nは任意の正整数)
が誘電体層52内に平行して、また、データの書き込み
を行なうためのアドレス電極Ai (i=1〜M;Mは任
意の正整数)が対向して構成された面放電構造となって
いる。
In FIG. 1, a conventional surface discharge AC type plasma display panel has an X electrode X and a Y electrode Y k (k = 1 to N; N is an arbitrary positive integer) for sustaining discharge.
Are parallel to each other in the dielectric layer 52, and address electrodes A i (i = 1 to M; M is an arbitrary positive integer) for writing data are opposed to each other to form a surface discharge structure. ing.

【0004】このように、パネル自身が容量性の構造を
持っているため、一度放電を起こすと、以降は放電開始
電圧よりも低い電圧(維持電圧)をパルス(維持放電パ
ルス)で印加することにより放電を維持し続けることが
できる。発光は放電時に発生する光や紫外線により蛍光
体を励起して行ない、発光輝度は放電の周波数に比例し
て明るくなる。
As described above, since the panel itself has a capacitive structure, once a discharge is generated, a voltage (sustain voltage) lower than the discharge start voltage is applied by a pulse (sustain discharge pulse) thereafter. Therefore, the discharge can be continuously maintained. Light is emitted by exciting phosphors with light or ultraviolet rays generated during discharge, and the emission brightness becomes bright in proportion to the frequency of discharge.

【0005】また、この面放電AC型プラズマディスプ
レイパネルを駆動する駆動回路の構成図を図5に、各部
の電圧波形を図6に示す。本従来例では、面放電構造の
維持放電電極は共通維持放電ドライバに接続されてお
り、パネル全面に渡り、図6に示すような同位相の維持
放電パルスを印加することで維持放電を行なう。尚、維
持放電電極の内、X電極Xは共通接続でX側ドライバ回
路61に接続され、Y電極Yk は、パネルにデータを書
き込む時に線順次に書き込みパルスを印加するため、独
立に駆動が可能なY側ドライバ回路62及びY側ドライ
バICYIC1〜YIC4に接続されている。
FIG. 5 shows a configuration diagram of a drive circuit for driving the surface discharge AC type plasma display panel, and FIG. 6 shows voltage waveforms of respective parts. In this conventional example, the sustain discharge electrodes of the surface discharge structure are connected to a common sustain discharge driver, and sustain discharge is performed by applying sustain discharge pulses of the same phase as shown in FIG. 6 over the entire panel surface. Among the sustain discharge electrodes, the X electrode X is connected to the X side driver circuit 61 by a common connection, and the Y electrode Y k applies a write pulse line-sequentially when writing data to the panel, so that it can be driven independently. It is connected to possible Y-side driver circuits 62 and Y-side drivers ICYIC1 to YIC4.

【0006】[0006]

【発明が解決しようとする課題】従って、従来のAC型
プラズマディスプレイパネル及びその駆動回路では、パ
ネルが大きい場合パネル容量も大きくなり、また同位相
の維持放電パルスを印加しているため、充電時及び放電
時のピーク電流はかなりの大電流となり、供給電流能力
の大きな電源が必要となり、コスト高になるという問題
があった。
Therefore, in the conventional AC type plasma display panel and its driving circuit, when the panel is large, the panel capacity also becomes large and the sustain discharge pulse of the same phase is applied. In addition, the peak current at the time of discharge becomes a considerably large current, and a power source having a large supply current capability is required, which causes a problem of high cost.

【0007】また、電流供給用のコンデンサも大きくな
り、ユニットの薄型化を阻害する要因となっている。更
に、供給電流がピークとなる時に発生する放射ノイズも
増大するため、シールド等の対策が必要となる。
Further, the capacitor for supplying current becomes large, which is a factor that hinders the thinning of the unit. Further, since radiation noise generated when the supply current reaches its peak also increases, it is necessary to take measures such as shielding.

【0008】本発明は、上記問題点を解決するもので、
維持放電を行なうための電極と、データの書き込みを行
なうためのアドレス電極とを備える面放電構造のAC型
プラズマディスプレイパネルを駆動する際に、維持放電
パルス印加時の充放電電流を分散させることにより、パ
ネル容量による充放電のピーク電流を低減したAC型プ
ラズマディスプレイパネルの駆動回路を提供することを
目的とする。
The present invention solves the above problems.
By driving an AC type plasma display panel having a surface discharge structure including electrodes for sustaining discharge and address electrodes for writing data, by dispersing a charging / discharging current when a sustaining discharge pulse is applied. An object of the present invention is to provide a driving circuit for an AC type plasma display panel in which the peak current of charging / discharging due to the panel capacity is reduced.

【0009】[0009]

【課題を解決するための手段】上記課題を解決するため
に、本発明の第1の特徴のAC型プラズマディスプレイ
パネルの駆動回路は、維持放電を行なうための電極と、
データの書き込みを行なうためのアドレス電極とを備え
る面放電構造のAC型プラズマディスプレイパネルを駆
動する駆動回路であって、前記維持放電電極は、前記A
C型プラズマディスプレイパネル内でPブロック(Pは
任意の正整数)に分割され、前記維持放電電極に維持放
電パルスをブロック毎に印加するP個の駆動手段を有し
て構成し、前記P個の駆動手段は、互いに位相のずれた
維持放電パルスを発生する。
In order to solve the above-mentioned problems, a driving circuit for an AC type plasma display panel according to the first feature of the present invention includes electrodes for sustaining discharge,
A driving circuit for driving an AC plasma display panel having a surface discharge structure, comprising: an address electrode for writing data;
The C-type plasma display panel is divided into P blocks (P is an arbitrary positive integer), and P driving means for applying a sustain discharge pulse to the sustain discharge electrodes is provided for each block. Driving means generate sustain discharge pulses whose phases are shifted from each other.

【0010】また、本発明の第2の特徴のAC型プラズ
マディスプレイパネルの駆動回路は、図1に示す如く、
維持放電を行なうためのX電極X1 〜XP 及びY電極Y
1 〜YN (Nは任意の正整数)と、データの書き込みを
行なうためのアドレス電極A 1 〜AM (Mは任意の正整
数)とを備える面放電構造のAC型プラズマディスプレ
イパネル1を駆動する駆動回路であって、前記X電極X
1 〜XP 及びY電極Y 1 〜YN は、前記AC型プラズマ
ディスプレイパネル1内でPブロック(Pは任意の正整
数で、図1においてはP=4)に分割され、前記X電極
1 〜XP に高圧パルスをブロック毎に印加するP個の
X側ドライバ回路XD1〜XDPと、前記Y電極Y1
N に維持放電パルスをブロック毎に印加するP個のY
側ドライバ回路YD1〜YDPとを有して構成し、前記
P個のX側ドライバ回路XD1〜XDP及びP個のY側
ドライバ回路YD1〜YDPは、それぞれ互いに位相の
ずれたパルス電圧を発生する。
The AC type plasma of the second feature of the present invention
The drive circuit of the display panel is as shown in FIG.
X electrode X for sustaining discharge1~ XPAnd Y electrode Y
1~ YN(N is any positive integer) and write data
Address electrode A for performing 1~ AM(M is an arbitrary adjustment
AC plasma display having a surface discharge structure including
A drive circuit for driving the panel 1, wherein the X electrode X
1~ XPAnd Y electrode Y 1~ YNIs the AC plasma
P block in display panel 1 (P is an arbitrary adjustment
By the number, P = 4) in FIG.
X1~ XPP high-voltage pulse is applied to each block
X side driver circuits XD1 to XDP and the Y electrode Y1~
YNP sustaining pulses are applied to each block for each Y
Side driver circuits YD1 to YDP.
P X-side driver circuits XD1 to XDP and P Y-sides
The driver circuits YD1 to YDP are in phase with each other.
Generate staggered pulse voltages.

【0011】[0011]

【作用】本発明の第1及び第2の特徴のAC型プラズマ
ディスプレイパネルの駆動回路では、図1に示す如く、
維持放電を行なうための維持放電電極、即ちX電極X1
〜XP 及びY電極Y1 〜YN (Nは任意の正整数)を、
AC型プラズマディスプレイパネル1内でPブロック
(Pは任意の正整数で、図1においてはP=4)に分割
し、各ブロック毎に、X側ドライバ回路XDj (j=1
〜P)によりX電極Xj に高圧パルスを、Y側ドライバ
回路YDj によりY電極Y1 〜YN に維持放電パルス
を、それぞれ互いに位相のずれたパルス電圧として印加
するようにしている。
In the drive circuit for the AC type plasma display panel of the first and second features of the present invention, as shown in FIG.
Sustain discharge electrode for performing sustain discharge, that is, X electrode X 1
To X P and Y electrodes Y 1 to Y N a (N is an arbitrary positive integer),
The AC plasma display panel 1 is divided into P blocks (P is an arbitrary positive integer, P = 4 in FIG. 1), and each block is divided into X-side driver circuits XD j (j = 1).
To P), a high-voltage pulse is applied to the X electrode X j , and a sustain discharge pulse is applied to the Y electrodes Y 1 to Y N by the Y-side driver circuit YD j as pulse voltages having mutually shifted phases.

【0012】従って、パネル容量による充放電のピーク
電流を、従来に比べて分割ブロック数(P)分の1に低
減させることができる。
Therefore, the peak current of charging / discharging due to the panel capacity can be reduced to 1 / (P) of the number of divided blocks as compared with the conventional case.

【0013】[0013]

【実施例】次に、本発明に係る実施例を図面に基づいて
説明する。図1に本発明の一実施例に係るAC型プラズ
マディスプレイパネルの駆動回路の構成図を示す。ま
た、本実施例の駆動回路の駆動対象となるAC型プラズ
マディスプレイパネル1の構成図を図2に示す。
Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 shows a configuration diagram of a drive circuit of an AC type plasma display panel according to an embodiment of the present invention. Further, FIG. 2 shows a configuration diagram of an AC type plasma display panel 1 which is a drive target of the drive circuit of the present embodiment.

【0014】図2に示すAC型プラズマディスプレイパ
ネル1は、維持放電電極を4個のブロックに分割した構
成であり、維持放電を行なうためのX電極X1 〜X4
びY電極Y1 〜Y1000と、データの書き込みを行なうた
めのアドレス電極A1 〜AM(Mは任意の正整数)とを
備えた面放電構造である。尚、スキャン方向(横ライ
ン)の1000ライン(Y電極Y1 〜Y1000)は4分割
され、250ライン毎(Y1-1〜Y1-250,Y2-1〜Y
-250,Y3-1〜Y3-250,Y4-1〜Y4-250)のブロ
ック構成となっている。
The AC type plasma display panel 1 shown in FIG. 2 has a structure in which the sustain discharge electrodes are divided into four blocks, and X electrodes X 1 to X 4 and Y electrodes Y 1 to Y for performing sustain discharge. The surface discharge structure includes 1000 and address electrodes A 1 to A M (M is an arbitrary positive integer) for writing data. Incidentally, the 1000 line (Y electrodes Y 1 to Y 1000) is divided into four in the scanning direction (horizontal lines), 250 lines per (Y1 -1 ~Y1 -250, Y2 -1 ~Y
2 -250 , Y3 -1 to Y3 -250 , Y4 -1 to Y4 -250 ).

【0015】図1において、本実施例のAC型プラズマ
ディスプレイパネルの駆動回路は、駆動対象となるAC
型プラズマディスプレイパネル1と、X電極X1 〜X4
に高圧パルスをブロック毎に印加する4個のX側ドライ
バ回路XD1〜XD4と、維持放電パルスをブロック
(250ライン)毎に生成する4個のY側ドライバ回路
YD1〜YD4と、Y側ドライバ回路YD1〜YD4を
基にY電極Y1 〜Y1000に消去パルスをブロック毎に印
加するY側ドライバICYIC1〜YIC4と、アドレ
ス電極A1 〜AM に高圧パルスを印加するアドレス側ド
ライバICAIC1〜AIC5と、各ドライバ回路及び
ドライバICに制御信号11〜14を供給して、タイミ
ング制御を行なう制御回路3とから構成されている。
In FIG. 1, the drive circuit of the AC type plasma display panel of this embodiment is an AC to be driven.
-Type plasma display panel 1 and X electrodes X 1 to X 4
Four X-side driver circuits XD1 to XD4 that apply a high-voltage pulse to each block, four Y-side driver circuits YD1 to YD4 that generate a sustain discharge pulse for each block (250 lines), and a Y-side driver circuit and Y side driver ICYIC1~YIC4 that YD1~YD4 based on the erase pulse is applied to the Y electrodes Y 1 to Y 1000 for each block, the address-side driver ICAIC1~AIC5 for applying a high voltage pulse to the address electrodes a 1 to a M and , And a control circuit 3 for controlling the timing by supplying control signals 11 to 14 to each driver circuit and driver IC.

【0016】本実施例の動作を、図3に示す各部電圧波
形図を参照して説明する。尚、Hsync#は水平同期信号
であり、同図は1水平走査期間内の波形図である。先
ず、第1ブロックの1ライン目に、放電開始電圧以上の
書き込みパルスを印加し、1ライン目の全セルを点灯さ
せる。次に、データを書き込むセル(この場合は、点灯
を消去するセル)に対してアドレス電極A1 〜AM によ
り選択消去パルスを印加する。消去パルスを印加しなか
ったセルは、残留壁電荷により後から印加される維持放
電パルスで点灯し続けることとなる。この動作を250
ラインまで行なう。
The operation of this embodiment will be described with reference to the voltage waveform chart of each part shown in FIG. Hsync # is a horizontal synchronizing signal, and the figure is a waveform diagram within one horizontal scanning period. First, a writing pulse having a voltage equal to or higher than the discharge start voltage is applied to the first line of the first block, and all the cells of the first line are turned on. Then, the cell for writing data (in this case, the cell to erase lit) applying a selective erase pulse by the address electrodes A 1 to A M against. The cells to which the erase pulse has not been applied continue to be lit by the sustain discharge pulse that is applied later due to the residual wall charges. This operation is 250
Go to the line.

【0017】同様に、第2、第3、及び第4ブロックも
駆動するが、それぞれ互いに位相のずれたパルス電圧波
形を印加する。以上のように、本実施例では、AC型プ
ラズマディスプレイパネル1のスキャン側を4つのブロ
ックに分割し、各ブロック毎に維持放電ドライバを設
け、互いに位相のずれたパルス電圧波形を印加して駆動
することとしたので、維持放電パルス印加時の充放電電
流を分散させることができ、パネル容量による充放電の
ピーク電流を、従来に比べて4分の1に低減させること
ができる。
Similarly, the second, third, and fourth blocks are also driven, but pulse voltage waveforms whose phases are shifted from each other are applied. As described above, in the present embodiment, the scan side of the AC type plasma display panel 1 is divided into four blocks, the sustain discharge driver is provided for each block, and the pulse voltage waveforms which are out of phase with each other are applied to drive. Therefore, the charging / discharging current at the time of applying the sustaining discharge pulse can be dispersed, and the peak current of charging / discharging due to the panel capacity can be reduced to 1/4 of the conventional case.

【0018】[0018]

【発明の効果】以上説明したように、本発明によれば、
維持放電を行なうための維持放電電極、即ちX電極及び
Y電極を、AC型プラズマディスプレイパネル内でPブ
ロック(Pは任意の正整数)に分割し、各ブロック毎
に、X側ドライバ回路によりX電極に高圧パルスを、Y
側ドライバ回路によりY電極に維持放電パルスを、それ
ぞれ互いに位相のずれたパルス電圧として印加すること
としたので、パネル容量による充放電のピーク電流を、
従来に比べて分割ブロック数(P)分の1に低減しうる
AC型プラズマディスプレイパネルの駆動回路を提供す
ることができる。
As described above, according to the present invention,
The sustain discharge electrodes for performing the sustain discharge, that is, the X electrodes and the Y electrodes are divided into P blocks (P is an arbitrary positive integer) in the AC type plasma display panel, and X blocks are provided by the X side driver circuit for each block. Apply a high-voltage pulse to the electrode, Y
Since the side driver circuit applies the sustain discharge pulses to the Y electrodes as pulse voltages whose phases are shifted from each other, the peak current of charging / discharging due to the panel capacitance is
It is possible to provide a driving circuit for an AC type plasma display panel that can be reduced to one-half the number of divided blocks (P) as compared with the related art.

【0019】また、AC型プラズマディスプレイパネル
の電極取り出しから各維持ドライバ間での距離が各ブロ
ックで同じになるため、AC型プラズマディスプレイパ
ネルの上下等の表示品質のバラツキも低減させることが
できる。
Further, since the distance from the electrode extraction of the AC type plasma display panel to each sustain driver is the same in each block, it is possible to reduce variations in the display quality of the AC type plasma display panel such as up and down.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例に係るAC型プラズマディス
プレイパネルの駆動回路の構成図である。
FIG. 1 is a configuration diagram of a drive circuit of an AC type plasma display panel according to an embodiment of the present invention.

【図2】駆動対象となるAC型プラズマディスプレイパ
ネルの構成図である。
FIG. 2 is a configuration diagram of an AC type plasma display panel to be driven.

【図3】実施例の駆動回路の各部電圧波形図である。FIG. 3 is a voltage waveform diagram of each part of the drive circuit of the embodiment.

【図4】従来の面放電AC型プラズマディスプレイパネ
ルの構造図であり、図4(1)は断面構造図、図4
(2)は電極構造図である。
4 is a structural diagram of a conventional surface discharge AC type plasma display panel, FIG. 4 (1) is a sectional structural diagram, FIG.
(2) is an electrode structure drawing.

【図5】従来の面放電AC型プラズマディスプレイパネ
ルの駆動回路の構成図である。
FIG. 5 is a configuration diagram of a drive circuit of a conventional surface discharge AC type plasma display panel.

【図6】従来の駆動回路の各部電圧波形図である。FIG. 6 is a voltage waveform diagram of each part of a conventional drive circuit.

【符号の説明】[Explanation of symbols]

1…AC型プラズマディスプレイパネル 2…放電セル 3…制御回路 11〜14…制御信号 X,X1 〜X4 〜XP …X電極 Y1 〜Y1000〜Yk 〜YN …Y電極 Y1-1〜Y1-250,…,Y4-1〜Y4-250…Y電極 A1 〜Ai 〜AM …アドレス電極 XD1〜XD4〜XDP…X側ドライバ回路 YD1〜YD4〜YDP…Y側ドライバ回路 YIC1〜YIC4…Y側ドライバIC AIC1〜AIC5…アドレス側ドライバIC Hsync#…水平同期信号 51…背面ガラス基板 52…誘電体層 53…前面ガラス基板 55…壁 60…AC型プラズマディスプレイパネル 61…X側ドライバ回路 62…Y側ドライバ回路 63…制御回路 71,72,73…制御信号1 ... AC type plasma display panel 2 ... discharge cell 3 ... control circuit 11 to 14 ... control signal X, X 1 ~X 4 ~X P ... X electrodes Y 1 ~Y 1000 ~Y k ~Y N ... Y electrodes Y1 - 1 ~Y1 -250, ..., Y4 -1 ~Y4 -250 ... Y electrodes A 1 ~A i ~A M ... address electrodes XD1~XD4~XDP ... X driver circuit YD1~YD4~YDP ... Y driver circuit YIC1 -YIC4 ... Y side driver IC AIC1-AIC5 ... Address side driver IC Hsync # ... Horizontal synchronizing signal 51 ... Rear glass substrate 52 ... Dielectric layer 53 ... Front glass substrate 55 ... Wall 60 ... AC type plasma display panel 61 ... X side Driver circuit 62 ... Y side driver circuit 63 ... Control circuit 71, 72, 73 ... Control signal

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 維持放電を行なうための電極と、データ
の書き込みを行なうためのアドレス電極とを備える面放
電構造のAC型プラズマディスプレイパネルを駆動する
駆動回路であって、 前記維持放電電極は、前記AC型プラズマディスプレイ
パネル内でPブロック(Pは任意の正整数)に分割さ
れ、 前記維持放電電極に維持放電パルスをブロック毎に印加
するP個の駆動手段を有し、 前記P個の駆動手段は、互いに位相のずれた維持放電パ
ルスを発生することを特徴とするAC型プラズマディス
プレイパネルの駆動回路。
1. A drive circuit for driving an AC plasma display panel having a surface discharge structure, comprising: an electrode for sustaining discharge; and an address electrode for writing data. The AC plasma display panel is divided into P blocks (P is an arbitrary positive integer) and has P driving means for applying a sustain discharge pulse to the sustain discharge electrodes for each block. A driving circuit for an AC type plasma display panel, wherein the means generate sustaining discharge pulses whose phases are shifted from each other.
【請求項2】 維持放電を行なうためのX電極(X1
P )及びY電極(Y1 〜YN )と、データの書き込み
を行なうためのアドレス電極(A1 〜AM )とを備える
面放電構造のAC型プラズマディスプレイパネルを駆動
する駆動回路であって、 前記X電極(X1 〜XP )及びY電極(Y1 〜YN
は、前記AC型プラズマディスプレイパネル内でPブロ
ック(Pは任意の正整数)に分割され、 前記X電極(X1 〜XP )に高圧パルスをブロック毎に
印加するP個のX側ドライバ回路(XD1〜XDP)
と、前記Y電極(Y1 〜YN )に維持放電パルスをブロ
ック毎に印加するP個のY側ドライバ回路(YD1〜Y
DP)とを有し、 前記P個のX側ドライバ回路(XD1〜XDP)及びP
個のY側ドライバ回路(YD1〜YDP)は、それぞれ
互いに位相のずれたパルス電圧を発生することを特徴と
するAC型プラズマディスプレイパネルの駆動回路。
Wherein X electrodes for performing sustain discharge (X 1 ~
And X P) and Y electrodes (Y 1 ~Y N), a drive circuit for driving the address electrodes (A 1 ~A M) and AC-type plasma display panel of a surface discharge structure with for writing data Te, the X electrodes (X 1 to X P) and Y electrodes (Y 1 to Y N)
, The P block in the AC type plasma display panel (P is an arbitrary positive integer) is divided into, the X electrodes (X 1 to X P) P-number of X driver circuit for applying a high voltage pulse for each block (XD1-XDP)
When the Y electrodes (Y 1 to Y N) in the P pieces of applying the sustain pulses for each block Y driver circuit (YD1~Y
DP), and the P X-side driver circuits (XD1 to XDP) and P
An AC type plasma display panel drive circuit, wherein each of the Y-side driver circuits (YD1 to YDP) generates pulse voltages whose phases are shifted from each other.
JP4161146A 1992-06-19 1992-06-19 Ac type plasma display panel and driving circuit therefor Pending JPH064039A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4161146A JPH064039A (en) 1992-06-19 1992-06-19 Ac type plasma display panel and driving circuit therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4161146A JPH064039A (en) 1992-06-19 1992-06-19 Ac type plasma display panel and driving circuit therefor

Publications (1)

Publication Number Publication Date
JPH064039A true JPH064039A (en) 1994-01-14

Family

ID=15729470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4161146A Pending JPH064039A (en) 1992-06-19 1992-06-19 Ac type plasma display panel and driving circuit therefor

Country Status (1)

Country Link
JP (1) JPH064039A (en)

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