JPH06342561A - Equalizer filter and magnetic disk system - Google Patents

Abstract

PURPOSE:To form an equalizer filter having no manufacturing difficulty, which is constituted of current output type gm amplifiers capable of obtaining a stable output potential and high output impedance with a comparatively simple circuit. CONSTITUTION:The equalizer filter is constituted of variable conductance amplifiers 1, 2, load resistances 5, 6, variable negative resistance 7, capacitance 9, detection means 10 for amplitude of the filter output, and means to control resistance value of the variable negative resistance 7 by a current 8. The resistance value of the variable negative resistance 7 is controlled by an amplitude detecting means 10 in accordance with the amplitude information preset in a register 12 so that the detected output amplitude coincides with the amplitude information.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active filter, and more specifically, it not only cuts high frequency noise contained in an input signal input from the outside but also cuts the input signal of the input signal. The present invention relates to an active filter that also functions as an equalizer that corrects and outputs a waveform (this active filter is hereinafter referred to as an equalizer filter).

A specific example of applying the equalizer filter will be described below to further clarify the industrial application field of the present invention. Generally, in a magnetic disk device, the position of a peak of an analog waveform read from a disk by a magnetic head is detected, and the signal level at the position is binarized to be converted into digital data and output.

However, the read waveforms are different depending on whether the read position is on the inner circumference or the outer circumference of the rotating disk, the signal recording / reproducing speed, the characteristics of the magnetic head and the disk medium, and the like. Therefore, it is difficult to accurately detect the peak position with the waveform as it is. Therefore, in order to accurately detect the peak position, it is usual to perform various waveform shaping processing on the read waveform and then detect the peak position.

FIG. 7 is a block diagram showing a schematic configuration of a waveform shaping processing circuit which has been conventionally used for the read waveform in this way. As shown in the figure, the waveform shaping processing circuit includes an AGC amplifier 201, an equalizer filter 202, an amplitude detection circuit 203, and a peak detection circuit 204.
Composed of.

In FIG. 7, an AGC amplifier 201 is an amplifier which inputs and amplifies a read waveform and outputs the read waveform. The AGC amplifier 201 is an amplifier circuit which mainly maintains a constant amplitude of the read waveform which changes in the inner and outer circumferences of the disk. An amplitude detection circuit 203 for detecting the amplitude is used on the output side of the equalizer filter 202, and the AGC amplifier 201 is feedback-controlled so that the amplitude becomes constant.

The equalizer filter 202 is a pulse slimming (a peak having a gentle peak shape is difficult to detect the peak position so that the peak detecting circuit 204 can detect an accurate peak position. It is necessary to have the optimum characteristics according to the system by correcting the noise and removing noise).

The present invention is based on the above-mentioned circumstances.
The present invention relates to an improvement of an equalizer filter used for shaping read waveforms, and more specifically, an equalizer filter itself is provided with an AGC (automatic gain control) function, and a simple circuit is used to obtain an optimum waveform. The present invention relates to an improvement of such an equalizer filter that can perform a shaping process and improve a reproduction margin of a read waveform.

[0008]

2. Description of the Related Art FIG. 6 is a circuit diagram showing a conventional example of an equalizer filter. For the sake of simplifying the explanation, a filter called a first-order low-pass filter is shown as the filter. The filter shown in the figure has two variable gm circuits (amplifiers capable of varying the conductance gm, also called variable conductance amplifiers or transconductance amplifiers) 101, 102, current sources (Igm) 103, 104 for varying gm. , An output load resistance (RL) 105, 106 of the gm circuit, a negative resistance circuit (NIC) 107, a control current source (I) of the negative resistance circuit.
nic) 108 and a capacitor (C1) 109.

When the transfer characteristic, which is the ratio of the output to the input of this filter circuit, is represented by H1 (s) (where s is a complex angular frequency), H1 (s) is calculated by using the conductance gm and the capacitance C1. It is expressed by the following equation.

[0010]

[Equation 1]

At this time, the cutoff frequency fc of the filter is

[Equation 2]

[0012] When, for example, a circuit as shown in FIG. 2A described later is used as the variable gm circuits (variable conductance amplifiers) 101 and 102, the value of the conductance gm is a current source (Igm) 103 that changes the conductance gm. Using the current value Igm of 104,

[0013]

[Equation 3]

Since the conductance gm is changed by changing the current value Igm, it is possible to change the cutoff frequency fc of the filter.
Here, V _T represents a thermal voltage (= kT / q) (k is Boltzmann's constant, T is absolute temperature, and q is electron charge). In an RC filter including a resistor and a capacitor, if the cutoff frequency fc is to be changed, the resistance value has to be controlled, and it is generally difficult to control the resistance value. In this case, a filter circuit (that is, a filter circuit using a variable conductance amplifier) that can easily change the cutoff frequency fc by changing the current value Igm from the outside is a convenient circuit.

By the way, in FIG. 6, the variable gm circuit 1
A circuit for supplying a current is required to extract the change in the current from 01 as an output. Therefore, the variable gm circuit 10
1 may be a current output gm amplifier in which a current source for current supply is added, but in this case, a self-bias circuit that stabilizes the output potential becomes complicated and stable characteristics with high output impedance are obtained. There was a problem that it was difficult.

Therefore, as shown in FIG. 6, instead of a current source for supplying current, output load resistors (RL) 105, 10
Negative resistance circuit (NIC) 10 is connected in order to supply current from a power source (not shown) and cancel the resistance component.
7 is connected, and a stable output potential with a relatively simple circuit,
Voltage input current output type gm amplifier (variable conductance amplifier 10) capable of obtaining high output impedance
1) has come to be used.

At this time, for example, a negative resistance circuit (NIC)
As the 107, when a circuit as shown in FIG.

[0018]

[Equation 4]

In order to satisfy the above condition, the current source (Inica) 38 and the resistor (Rnica) 37 in FIG.
By setting, it is possible to cancel the resistance components of the load resistances (RL) 105 and 106.

The circumstances in which the filter described with reference to FIG. 6 is used as the equalizer filter 202 in FIG. 7 described above will be briefly described below for reference. In recent years, with the demand for smaller and faster devices and the diversification of handled signals,
A high-performance and high-function one-chip signal processing LSI is required. Particularly in magnetic disks, a method of changing the recording and reproducing speeds on the inner and outer circumferences of the disk has begun to be adopted in order to improve the recording density.

In this recording method, since the frequency components of the reproduced signal are different on the inner and outer circumferences of the disc, the signal processing circuit of the reproducing system is required to have circuit characteristics optimized for each frequency component. Therefore, in the equalizer filter 202 in FIG. 7, the characteristic variable filter (FIG. 6) having a configuration using the current output type gm circuit (variable conductance amplifier) and the capacitance C is realized and used because it is advantageous to the on-chip filter. -ing

[0022]

In the above-mentioned prior art, it is possible to realize an equalizer filter having a current output type gm amplifier structure which can obtain a stable output potential and a high output impedance with a relatively simple circuit. Is
Achieving the above formula (4) with high accuracy, that is, the load resistors (RL) 105 and 106 in FIG. 6, the resistor (Rinca) 37, the current source (Ii in FIG.
nca) 38 must be realized with high accuracy, which is a problem in manufacturing.

The object of the present invention is to solve the problems of the prior art and to obtain a stable output potential and a high output impedance with a relatively simple circuit.
It is an object of the present invention to provide an equalizer filter having an m-amplifier structure and having no difficulty in manufacturing. Another object is to provide a magnetic disk system incorporating such an equalizer filter.

[0024]

To achieve the above object, in the present invention, a variable conductance amplifier, a load resistor connected to obtain a current output as the output of the amplifier, and a resistance component of the load resistor are canceled. A variable negative resistance to be connected, and an active filter comprising at least a capacitance, for an input signal input from the outside,
Not only does it cut the high-frequency noise it contains,
In an equalizer filter that is the active filter that also functions as an equalizer that corrects and outputs the waveform of the input signal,

Amplitude detecting means for detecting the amplitude of the filter output, and an amplitude by controlling the resistance value of the variable negative resistance included in the active filter so that the detected amplitude has a certain value. Amplitude control means for performing control.

[0026]

The amplitude detecting means detects the amplitude of the filter output. The amplitude control means compares the detected amplitude value with preset amplitude information, and controls the resistance value of the variable negative resistance to control the amplitude so as to eliminate the difference.
Controlling the amplitude in this way is equivalent to providing the equalizer filter circuit with an AGC (automatic gain control) function. In the present invention, the one that requires an AGC amplifier and an equalizer filter is required. It can be said that a simple and highly accurate equalizer filter is realized by combining the two.

The amplitude control means controls the filter gain (gain) by controlling the resistance value of the variable negative resistance as described above, and accordingly the desired gain frequency characteristic as the equalizer filter is It functions as a means to be realized without changing the cutoff frequency characteristic and the group delay characteristic of the filter. Cutoff frequency characteristics,
To change the group delay characteristic, the conductance gm of the variable conductance amplifier may be changed.

[0028]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a circuit diagram showing an equalizer filter as an embodiment of the present invention. The present embodiment shows the case of a primary filter as the characteristic of the filter.

In FIG. 1, gm circuits (variable conductance amplifiers) 1 and 2 mean a variable transconductance circuit that outputs a current at a ratio of conductance gm to an input voltage that is a differential input, and a reference current (Igm).
1) Operates in 3 and 4. At this time, the reference current (Igm1)
The gm (conductance) of the gm circuit can be changed by changing 3 and 4.

The load resistors (RL1) 5 and 6 are connected to the output side of the gm circuits 1 and 2 for supplying a current for extracting a current from the gm circuits 1 and 2, and have negative resistances for canceling their resistance components. Sex resistance circuit (NIC) 7 is connected in parallel. The negative resistance circuit (NIC) 7 has a reference current (Inic).
1) It is controlled by 8, and it is necessary to set it with high precision so that the formula (4) is satisfied.

In this embodiment, the amplitude detection circuit 10 is connected to the output (out) 14 of the equalizer filter, and the reference current (Inic1) 8 is controlled according to the detected output amplitude. That is, the reference amplitude serving as a reference for comparison is supplied to the amplitude detection circuit 10 from the register 12 storing the reference amplitude information after being converted into an analog amount by the digital / analog converter (DAC) 11 and the comparison result with this is given. The reference current (Inic1) 8 is controlled so as to become zero.

Here, the operation principle of controlling the negative resistance circuit (NIC) 7 by the output amplitude of the equalizer filter will be described. Now, a current output type gm amplifier (gm circuit 1,
If the output voltage gain of 2) is Ao and the output resistance is Zo,
Using gm,

[0033]

[Equation 5]

The following relationship holds. The DC gain Go of the first-order filter is obtained by using the output voltage gain Ao,

[0035]

[Equation 6]

It is expressed as Therefore, the output voltage gain A
If o is large enough, the DC gain is 1. Further, since the output resistance Zo is a combined resistance of the load resistances (RL1) 5 and 6 and the negative resistance (NIC) 7, the output resistance Zo becomes infinite if the above formula (Equation 4) holds. The DC gain of the primary filter is also 1.

At this time, the output resistance of the gm circuits 1 and 2 is
It is assumed that the load resistances (RL1) 5 and 6 are sufficiently large. Further, when the equation does not hold in the equation (4), for example, when the load resistances (RL1) 5 and 6 are larger than the negative resistance (NIC) 7, the output resistance Zo.
Has a positive finite value, and the DC gain of the primary filter becomes smaller than 1 according to the equation (6).

When the load resistances (RL1) 5 and 6 are smaller than the negative resistance (NIC) 7, the output resistance Zo has a negative finite value, and according to the equation (6), the primary filter The DC gain is greater than 1. From this, if the amplitude detection circuit 10 detects the output amplitude of the filter, controls the negative resistance (NIC) from the detected amplitude, and changes the output resistance Zo, the value of gm does not change, that is, The DC gain (filter gain) can be adjusted without changing the filter characteristics.

FIG. 2 is a circuit diagram showing three specific examples of the gm circuit in FIG. 1 as (a), (b) and (c). The circuit shown in (a) of FIG. 2 is a simple differential input circuit and includes a pair of differential transistor pairs Qa1 and Qa2 (15,
16) and the reference current (Iea) 17. At this time,
If the transconductance indicating the output differential current with respect to the input differential voltage is represented by gm2a, the transconductance gm2a is

[0040]

[Equation 7]

It is represented by 2B shows an input range expanded by connecting an emitter resistor to the differential input circuit shown in FIG. 2A.
1, Qb2 (20, 21), reference current (Ieb1) 2
3, 24, and the emitter resistor (Rb1) 22. At this time, the transconductance gm2b is obtained by using the resistance value re of the emitter resistance (Rb1) of the differential transistor pair Qb1, Qb2 (20, 21),

[0042]

[Equation 8]

It is represented by FIG. 2C shows an input range widened by combining two pairs of transistor pairs having different emitter sizes, and a differential transistor pair Qc1 and Qc.
c2 (27, 28, a differential transistor pair having different emitter sizes Qc3, Qc4 (29, 30) and reference currents (Iec1) 31, 32. At this time, the transconductance gm2c is

[0044]

[Equation 9]

It is represented by All of these circuits can change gm (conductance) by changing the reference current.

FIG. 3 shows the negative resistance (NIC) shown in FIG.
It is a circuit diagram showing a concrete example of a circuit. FIG. 3A shows the simplest circuit configuration, which includes a pair of transistor pairs Qa3 and Qa.
a4 (35, 36), emitter resistance (Rnica) 3
7 and reference currents (Inica) 38 and 39. At this time, if the output resistance value is Znica,

[0047]

[Equation 10]

It is expressed as follows, and shows that it has a negative resistance. FIG. 3B is a circuit in which an emitter follower circuit for supplying a base current is added to the circuit of FIG. 3A to improve the characteristics. The transistor pair Qb3, Qb4 (41, 4)
2), Qb5, Qb6 (43, 44), emitter resistance (Rnicb) 45, reference current (Inicb1) 46,
47 and reference currents (Inicb2) 48 and 49. At this time, the output resistance value Znicb is the same as Znica,

[0049]

[Equation 11] Becomes

FIG. 4 is a block diagram showing a configuration example of the amplitude detection circuit 10 in FIG.
H) A circuit 51 and a comparator 52. The P / H circuit 51 connects the output of the equalizer filter circuit to its input (IN) 53 and holds the peak signal amplitude of the filter output signal. The comparator 52 compares the output voltage of the P / H circuit 51 with the reference voltage 60 from the DAC 11 and outputs a control current (out) 54 corresponding to the difference voltage. The control current (out) 54 is connected to the reference current (Inic1) 8 of the NIC circuit 7 and controls the negative resistance value of the NIC circuit 7.

FIG. 5 is a block diagram showing the configuration of the equalizer filter according to the present invention when viewed as a waveform shaping circuit. The waveform shaping processing circuit is an equalizer filter 55 with an AGC function according to the present invention.
And a peak detection circuit 56. The AGC circuit and the equalizer filter circuit, which are conventionally independent functional blocks, can be configured by the same circuit, so that the configuration is simplified.

Next, FIG. 8 is a circuit diagram showing an equalizer filter as another embodiment of the present invention. In this case, an example of the configuration of an nth-order filter is shown as the characteristic of the filter. gma
1 circuit 301, 302, reference current (Igma1) 30
3, 304, load resistance (RLa1) 305, 306, N
ICa1 circuit 307, NICa1 circuit reference current (In
ica1) n first-order filters composed of 308 are connected in series to form an n-th order filter.

Here, the output (out) 321 of the final stage
The output of the amplitude detection circuit 319 connected to the
Reference current (Inica1) 307 to (Inica) 3
16 are commonly controlled. In this case, the primary filter is
Although the n-th order filters are configured by connecting them individually, the same can be said of course by combining the second-order bicut filters.

FIG. 9 shows still another embodiment of the present invention, which shows another example of the structure of the nth-order filter. Similar to the configuration example of FIG.
gmb1 circuit 322, 323, reference current (Igmb1)
324, 325, load resistance (RLb1) 326, 32
7, an nth-order filter is formed by connecting n first-order filters configured by the NICb1 circuit 328 and the reference current (Inicb1) 329 of the NICb1 circuit in series.
In contrast to the configuration example of 1, the amplitude detection circuit 1 is output to each primary output.
~ N amplitude detection circuits n (331 to 341) are connected, and n corresponding NIC reference currents (Inicb)
1) to (Inicbn) are controlled.

As a result, more precise control can be performed as compared with the example of FIG. Also in this case, the n-th order filter is constructed by connecting n first-order filters.
The same is true when the next bi-cut filter is combined.

FIG. 10 is a block diagram showing an embodiment in which the equalizer filter according to the present invention is incorporated in a magnetic disk system. In this embodiment, a head 344, an R / W amplifier 345 for amplifying a signal, an AGC according to the present invention are used.
Equalizer filter with function 346, peak detection circuit 347 for detecting and peaking signal peak position, data separator 348 for generating clock synchronized with pulsed signal, encoder for recording / decoding Decoder 349, controller 350 for controlling data, I / F (interface) 351 for exchanging data, controller 350, I / F3
A processor 352 that controls 51 and the like, a RAM / ROM 353 that stores data, and a host 354 that processes data.

In FIG. 10, the signal reproduced from the magnetic disk (not shown) by the head 344 is the R / W amplifier 34.
After being amplified by 5, the equalizer filter 346 with an AGC function cuts high-frequency noise with high accuracy, and the signal waveform is corrected (pulse slimming) and supplied to the peak detection circuit 347. To improve the recording density, even if a method of changing the recording and reproducing speeds on the inner and outer circumferences of the disc is adopted, the correct peak position can be detected and the subsequent processing can be performed smoothly. There is.

[0058]

According to the present invention, an equalizer filter having a current output type gm amplifier configuration capable of obtaining a stable output potential and a high output impedance with a relatively simple circuit has a difficulty in manufacturing. There is an advantage that an equalizer filter that does not exist can be provided. Further, since the equalizer filter according to the present invention has an AGC function and constitutes a simple and highly accurate waveform shaping processing circuit that combines the AGC amplifier and the equalizer filter alone, a magnetic disk system incorporating such an equalizer filter is also applicable. There is an advantage that a highly accurate system can be expected.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an equalizer filter as an embodiment of the present invention.

2A is a specific example of the gm circuit in FIG.
It is the circuit diagram shown three as (b) and (c).

3 is a circuit diagram showing a specific example of a negative resistance (NIC) circuit in FIG.

4 is a block diagram showing a configuration example of an amplitude detection circuit in FIG.

FIG. 5 is a block diagram showing a configuration of an equalizer filter according to the present invention when viewed as a waveform shaping processing circuit.

FIG. 6 is a circuit diagram showing a conventional example of an equalizer filter.

FIG. 7 is a block diagram showing a schematic configuration of a conventional waveform shaping processing circuit.

FIG. 8 is a circuit diagram showing an equalizer filter as another embodiment of the present invention.

FIG. 9 is a circuit diagram showing an equalizer filter as still another embodiment of the present invention.

FIG. 10 is a block diagram showing an embodiment in which an equalizer filter according to the present invention is incorporated in a magnetic disk system.

[Explanation of symbols]

1, 2, ... Gm circuit, 3, 4 ... Reference current (Igm1),
5, 6 ... Load resistance (RL1), 7 ... Negative resistance (NIC)
Circuit, 8 ... Negative resistance reference current (Inic1), 9 ... Capacitance, 10 ... Amplitude detection circuit, 11 ... Digital / analog converter (DAC), 12 ... Register

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroshi Kimura 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture Inside the Microelectronics Equipment Development Laboratory, Hitachi, Ltd. (72) Inventor, Koichi Awano Yokohama, Kanagawa 292 Yoshida-cho, Totsuka-ku, Hitachi Ltd. Microelectronics equipment development laboratory (72) Inventor Ken Urakami 111 Nishiyokote-cho, Takasaki-shi, Gunma Hitachi Semiconductor Design and Development Center

Claims (4)

[Claims] 1. A variable conductance amplifier, a load resistance connected to obtain a current output as the output of the amplifier, a variable negative resistance connected to cancel a resistance component of the load resistance, and a capacitance. An active filter including an input signal input from the outside, which not only cuts high-frequency noise contained therein, but also functions as an equalizer that corrects and outputs the waveform of the input signal. In an equalizer filter that is an active filter, an amplitude detection unit that detects the amplitude of the filter output, and a resistance value of the variable negative resistance included in the active filter so that the detected amplitude has a certain value. And an amplitude control means for controlling the amplitude to control the equalizer. 2. The equalizer filter according to claim 1, wherein the amplitude control means controls a resistance value of the variable negative resistance included in the active filter, thereby controlling a filter gain, and accordingly. A desired gain frequency characteristic as an equalizer filter functions as a means to be realized without changing the cutoff frequency characteristic and group delay characteristic as a filter. 3. The equalizer filter according to claim 1, wherein the entire equalizer filter is implemented as a one-chip LSI. 4. A magnetic disk system for binarizing an analog signal reproduced from a magnetic disk and digitally processing the analog signal, wherein the equalizer filter according to claim 1, 2 or 3 is built in, and the reproduced analog signal is binary-coded. A magnetic disk system characterized by performing amplitude control and waveform correction through the equalizer filter prior to conversion.