JPH06302713A - Package device - Google Patents
Package deviceInfo
- Publication number
- JPH06302713A JPH06302713A JP5110066A JP11006693A JPH06302713A JP H06302713 A JPH06302713 A JP H06302713A JP 5110066 A JP5110066 A JP 5110066A JP 11006693 A JP11006693 A JP 11006693A JP H06302713 A JPH06302713 A JP H06302713A
- Authority
- JP
- Japan
- Prior art keywords
- package
- aluminum
- semiconductor device
- lead frame
- base portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体デバイスをパッ
ケージ内に収容してなるパッケージデバイスに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package device in which a semiconductor device is housed in a package.
【０００２】[0002]
【従来の技術】一般に半導体ウエハから分断された半導
体デバイスは、パッケージ内に封入されてパッケージデ
バイスとしてプリント基板に実装される。このパッケー
ジデバイスは、パッケージの下側部分であるベース部の
上に半導体デバイスを搭載すると共に、金属のリード端
子であるリードフレームと半導体デバイスの電極とをボ
ンディングワイヤで接続し、パッケージの上側部分であ
るカバー部と前記ベース部との間にリードフレームを挟
んだ状態でこれらを接着剤により接合して構成される。2. Description of the Related Art Generally, a semiconductor device separated from a semiconductor wafer is enclosed in a package and mounted on a printed circuit board as a package device. In this package device, the semiconductor device is mounted on the base portion which is the lower side portion of the package, and the lead frame which is the metal lead terminal and the electrode of the semiconductor device are connected by the bonding wire, and the upper portion of the package is connected. A lead frame is sandwiched between a cover portion and the base portion, and they are joined by an adhesive.
【０００３】前記パッケージは、通常セラミックや樹脂
で構成され、エポキシ系の接着剤やガラスなどのシール
材によりシールされる。またパッケージは半導体デバイ
スの周りを樹脂によりモールドして作られる場合もあ
る。The package is usually made of ceramic or resin and sealed with an epoxy adhesive or a sealing material such as glass. The package may be formed by molding the periphery of the semiconductor device with resin.
【０００４】ところで半導体デバイスは発熱するが、こ
の熱がパッケージ内に籠もると半導体デバイスや接着剤
を劣化させてしまうため、パッケージ内の熱を放熱する
工夫が必要である。特に最近では半導体デバイスが微細
化しており、例えば配線層のわずかな腐食によっても微
細パターンの抵抗値が大きく変わるし、腐食が進むと断
線をも引き起こすことから放熱効率の高いパッケージが
要求されている。By the way, a semiconductor device generates heat, but if this heat is trapped in the package, it deteriorates the semiconductor device and the adhesive. Therefore, it is necessary to devise a method for radiating the heat in the package. Particularly in recent years, semiconductor devices have been miniaturized. For example, even a slight corrosion of the wiring layer causes a large change in the resistance value of the fine pattern, and if corrosion progresses, it also causes disconnection, so a package with high heat dissipation efficiency is required. .
【０００５】このような事情から特許出願公表平成４年
５０５０７５号公報に記載されているようにアルミニウ
ムまたはアルミニウム合金よりなるベース部及びカバー
部を用いてパッケージを構成し、このパッケージの表面
に陽極酸化層を形成することが提案されている。一般に
アルミニウムまたはアルミニウム合金は熱伝導率が高い
のでパッケージとしては好ましい材料であり、上述の陽
極酸化層は、電気化学的手法により形成された表面被膜
であって、大きな耐蝕性及び絶縁性が得られるため、上
述公報のパッケージは、従来の樹脂やセラミックスのパ
ッケージに比べて実用上有効であると考えられる。Under such circumstances, a package is constructed by using a base portion and a cover portion made of aluminum or aluminum alloy as described in Japanese Patent Application Publication No. 504,075, 1992, and the surface of the package is anodized. It has been proposed to form layers. In general, aluminum or aluminum alloy is a preferable material for a package because it has a high thermal conductivity, and the above-mentioned anodized layer is a surface coating formed by an electrochemical method, and provides a large corrosion resistance and insulation property. Therefore, the package of the above publication is considered to be practically effective as compared with the conventional resin and ceramic packages.
【０００６】[0006]
【発明が解決しようとしている課題】しかしながら陽極
酸化層は熱伝導率がそれ程高くないためパッケージの外
面からの放熱性が十分ではないし、またベース部、カバ
ー部及びリードフレームの間の熱の流れが不十分とな
り、例えばパッケージ側の温度がリードフレームの温度
より高い場合には、パッケージからリードフレームを介
して外部へ逃げる熱が少なくなるし、あるいはベース
部、カバー部の一方側に熱が偏っている場合にも放熱効
率が低くなり、特に電力が大きい場合にはパッケージ内
の温度上昇を十分抑えることができなかった。However, since the thermal conductivity of the anodized layer is not so high, the heat dissipation from the outer surface of the package is not sufficient, and the heat flow between the base portion, the cover portion and the lead frame is not sufficient. If the temperature on the package side is higher than the temperature of the lead frame, the heat that escapes from the package to the outside via the lead frame will decrease, or the heat will be unevenly distributed to one side of the base and cover. The heat dissipation efficiency was low even when the temperature was high, and the temperature rise inside the package could not be sufficiently suppressed especially when the power was high.
【０００７】そして今後コンピュータシステムの小型化
に伴い、ＥＷＳや高性能パーソナルコンピュータの性能
を引き上げるためにはＣＰＵやＬＳＩ周辺の信号処理を
高速化する必要がある。そこでマルチチップモジュール
などと呼ばれている、複数の半導体デバイスをパッケー
ジ内に封入する方式が展開されていくと予想されている
が、このような方式のパッケージデバイスにおいては、
パッケージ内の発熱量が多いため放熱効率の高いパッケ
ージが必要になってくる。With the miniaturization of computer systems in the future, it is necessary to speed up signal processing around the CPU and LSI in order to improve the performance of EWS and high-performance personal computers. Therefore, it is expected that a method of enclosing a plurality of semiconductor devices in a package, which is called a multi-chip module, will be developed, but in a package device of such a method,
Since a large amount of heat is generated in the package, a package with high heat dissipation efficiency is required.
【０００８】本発明はこのような事情のもとになされた
ものであり、その目的は、パッケージ内の温度上昇を十
分抑えることのできるパッケージデバイスを提供するこ
とにある。The present invention has been made under such circumstances, and an object thereof is to provide a package device capable of sufficiently suppressing the temperature rise in the package.
【０００９】[0009]
【課題を解決するための手段】請求項１の発明は、各々
アルミニウムまたはアルミニウム合金よりなるベース部
とカバー部とを接合してパッケージを構成し、このパッ
ケージ内に半導体デバイスを収容すると共に、ベース部
とカバー部との互いの接合面の間に外部との接続のため
の導電路を介装してなるパッケージデバイスにおいて、
前記ベース部とカバー部との少なくとも外面及び互いの
接合面に窒化アルミニウム層を形成したことを特徴とす
る。According to a first aspect of the present invention, a package is formed by joining a base portion and a cover portion, which are each made of aluminum or aluminum alloy, and a semiconductor device is housed in the package. In a package device in which a conductive path for external connection is provided between the joint surfaces of the cover and the cover,
An aluminum nitride layer is formed on at least an outer surface of the base portion and the cover portion and a joint surface thereof.
【００１０】請求項２の発明は、導電路は、ベース部と
カバー部との互いの接合面の間に沿って伸びるリードフ
レームにより構成されることを特徴とする。According to a second aspect of the present invention, the conductive path is constituted by a lead frame extending along a joint surface between the base portion and the cover portion.
【００１１】[0011]
【作用】半導体デバイスは電力が供給されると発熱し、
熱輻射、対流、及び熱伝導によりパッケージ及び導電路
例えばリードフレームの温度が上昇する。ここでパッケ
ージの外面に形成されている窒化アルミニウム層は熱伝
導率が大きいのでパッケージの基材であるアルミニウム
またはアルミニウム合金を伝熱された熱は高い効率で放
熱されるし、またパッケージの外面が大気により酸化さ
れて熱伝導率のそれ程高くない酸化アルミニウムに変わ
るのを防止できる。[Operation] The semiconductor device generates heat when power is supplied,
Thermal radiation, convection, and heat conduction increase the temperature of the package and conductive paths, such as the lead frame. Since the aluminum nitride layer formed on the outer surface of the package has a high thermal conductivity, the heat transferred through the aluminum or aluminum alloy, which is the base material of the package, is dissipated with high efficiency, and the outer surface of the package is It can be prevented from being oxidized by the atmosphere and converted into aluminum oxide having a not so high thermal conductivity.
【００１２】そしてベース部とカバー部との接合面にも
窒化アルミニウム層が形成されているため、ベース部、
カバー部及びリードフレーム間の熱の流れがスムーズに
なり、例えばパッケージからリードフレームを介して放
熱される場合の放熱性が高くなる。従ってパッケージ内
の温度上昇を抑えることができ、またパッケージについ
て大きな耐蝕性が得られる。Since the aluminum nitride layer is also formed on the joint surface between the base portion and the cover portion,
The flow of heat between the cover portion and the lead frame becomes smooth, and the heat dissipation is improved when heat is dissipated from the package via the lead frame, for example. Therefore, the temperature rise in the package can be suppressed, and a great corrosion resistance of the package can be obtained.
【００１３】[0013]
【実施例】図１は本発明の実施例を示す図であり、パッ
ケージ１は、各々周縁部以外の個所全体の凹部２１、３
１が形成されたベース部２及びカバー部３を、凹部２
１、３１が互に対向するように周縁部にて後述のリード
フレームを挟むようにして、例えばエポキシ系の接着剤
よりなる接着層１０により接合して構成されている。前
記ベース部２及びカバー部３は、各々アルミニウムまた
はアルミニウム合金により作られており、その表面（内
面、外面及び接合面）には例えば厚さ数μｍの窒化アル
ミニウム層１１が形成されている。FIG. 1 is a view showing an embodiment of the present invention, in which a package 1 is provided with recesses 21 and 3 in the whole portion except the peripheral portion.
The base portion 2 and the cover portion 3 on which the concave portion 1 is formed.
A lead frame, which will be described later, is sandwiched between the peripheral portions so that 1 and 31 are opposed to each other, and they are joined by an adhesive layer 10 made of, for example, an epoxy adhesive. The base portion 2 and the cover portion 3 are each made of aluminum or an aluminum alloy, and an aluminum nitride layer 11 having a thickness of, for example, several μm is formed on the surface (inner surface, outer surface and joining surface) thereof.
【００１４】この窒化アルミニウム層１１を形成する方
法としては、アルミニウムまたはアルミニウム合金より
なる基体を配置した真空チャンバ内において、Ａｒガス
やＨｅガスなどの不活性ガスを放電させ、この放電ガス
中にＮ2 ガスあるいはＮＨ3ガスなどの反応性ガスを加
え、その中でアルミニウムを蒸発させて前記基体の表面
に窒化アルミニウム層を形成する反応性イオンプレーテ
ィング法を利用することができる。ただしこれ以外の方
法で窒化アルミニウム層を形成してもよい。As a method of forming the aluminum nitride layer 11, an inert gas such as Ar gas or He gas is discharged in a vacuum chamber in which a substrate made of aluminum or aluminum alloy is placed, and N is added to the discharge gas. A reactive ion plating method can be used in which a reactive gas such as 2 gas or NH 3 gas is added and aluminum is evaporated therein to form an aluminum nitride layer on the surface of the substrate. However, the aluminum nitride layer may be formed by a method other than this.
【００１５】前記ベース部２の凹部２１の中央部には半
導体集積回路よりなる半導体デバイス４が接着層４１に
より接着されている。この接着層４１としては、半導体
デバイス４の構造に応じて絶縁性あるいは導電性の接着
剤が用いられる。A semiconductor device 4 composed of a semiconductor integrated circuit is adhered to the central portion of the recess 21 of the base portion 2 by an adhesive layer 41. As the adhesive layer 41, an insulating or conductive adhesive is used depending on the structure of the semiconductor device 4.
【００１６】前記ベース部２及びカバー部３の周縁部の
間、つまり互いの接合面の間には、パッケージ１の内部
空間から外部に伸びる導電路例えばリードフレーム５が
前記接着層１０を介して介装されており、このリードフ
レーム５は半導体デバイス４の電極の数に対応した数だ
け設けられている。前記リードフレーム５の内端部と半
導体デバイス４の電極とはボンディングワイヤ５１によ
り電気的に接続されており、リードフレーム５の外端部
は図示しないプリント基板に接続される。Between the peripheral portions of the base portion 2 and the cover portion 3, that is, between the joint surfaces of the base portion 2 and the cover portion 3, a conductive path extending from the inner space of the package 1 to the outside, for example, a lead frame 5 is provided via the adhesive layer 10. The lead frames 5 are provided in an amount corresponding to the number of electrodes of the semiconductor device 4. The inner end of the lead frame 5 and the electrode of the semiconductor device 4 are electrically connected by a bonding wire 51, and the outer end of the lead frame 5 is connected to a printed board (not shown).
【００１７】次に上述実施例の作用、効果について述べ
る。リードフレーム５から半導体デバイス４に電力が供
給されると当該半導体デバイス４が発熱し、ここからの
輻射熱や、パッケージ１内の空気の対流、及び半導体デ
バイス４からベース部２への熱伝導やボンディングワイ
ヤ５を通じてのリードフレーム５への熱伝導などにより
パッケージ１及びリードフレーム５の温度が上昇し、半
導体デバイス４の発熱量及びパッケージ１及びリードフ
レーム５の放熱量の差に対応してパッケージ１内つまり
半導体デバイス４が置かれている雰囲気の温度が上昇す
る。Next, the operation and effect of the above embodiment will be described. When power is supplied from the lead frame 5 to the semiconductor device 4, the semiconductor device 4 generates heat, radiant heat from the semiconductor device 4, convection of air in the package 1, and heat conduction and bonding from the semiconductor device 4 to the base portion 2. The temperature of the package 1 and the lead frame 5 rises due to heat conduction to the lead frame 5 through the wire 5, and the inside of the package 1 corresponds to the difference between the heat generation amount of the semiconductor device 4 and the heat radiation amount of the package 1 and the lead frame 5. That is, the temperature of the atmosphere in which the semiconductor device 4 is placed rises.
【００１８】ここでパッケージ１即ちベース部２及びカ
バー部３の内面には、窒化アルミニウム層１１が形成さ
れており、この窒化アルミニウム層は熱伝導率、輻射熱
の吸収性が非常に高いため、半導体デバイス４からの熱
は高い効率でパッケージ１に伝わっていく。そしてパッ
ケージ１の外面には窒化アルミニウム層１１が形成され
ているため、パッケージ１に蓄熱された熱は外気に高い
効率で放熱されていく。なおパッケージ１の外面に窒化
アルミニウム層が形成されない場合には、大気により酸
化されて、熱伝導率のそれ程高くない酸化アルミニウム
が形成されてしまうので窒化アルミニウム層を形成する
ことは非常に有効である。Here, an aluminum nitride layer 11 is formed on the inner surfaces of the package 1, that is, the base portion 2 and the cover portion 3, and the aluminum nitride layer has a very high thermal conductivity and absorption of radiant heat. The heat from the device 4 is transferred to the package 1 with high efficiency. Since the aluminum nitride layer 11 is formed on the outer surface of the package 1, the heat stored in the package 1 is radiated to the outside air with high efficiency. Note that if the aluminum nitride layer is not formed on the outer surface of the package 1, the aluminum oxide is oxidized by the atmosphere to form aluminum oxide having a not so high thermal conductivity. Therefore, it is very effective to form the aluminum nitride layer. .
【００１９】また半導体デバイス４の電力やパッケージ
１の大きさあるいはパッケージ１の実装の状態などの要
因によって、リードフレーム５の温度がパッケージ１の
温度よりも高くなったり、その逆になったりするが、ベ
ース部２及びカバー部３の互いの接合面には熱伝導率の
高い窒化アルミニウム層１１が形成されているので、ベ
ース部２、カバー部３及びリードフレーム５の間の熱の
流れが円滑になり、このため例えばベース部２及びカバ
ー部３からリードフレーム５を介して外部へ効率よく放
熱されるし、また例えばベース部２及びカバー部３の間
に温度差が生じてもこれらの間の熱の偏りが抑えられ、
こうしたことからパッケージ１内の温度上昇を抑えるこ
とができ、半導体デバイスに対する熱の悪影響を低減で
きる。The temperature of the lead frame 5 may be higher than the temperature of the package 1 or vice versa due to factors such as the power of the semiconductor device 4, the size of the package 1 or the mounting state of the package 1. Since the aluminum nitride layer 11 having high thermal conductivity is formed on the joint surfaces of the base portion 2 and the cover portion 3, the heat flow between the base portion 2, the cover portion 3 and the lead frame 5 is smooth. Therefore, for example, the heat is efficiently radiated from the base portion 2 and the cover portion 3 to the outside via the lead frame 5, and even if a temperature difference occurs between the base portion 2 and the cover portion 3, for example, between them, Bias of the heat of
Therefore, the temperature rise in the package 1 can be suppressed, and the adverse effect of heat on the semiconductor device can be reduced.
【００２０】更に窒化アルミニウム層は熱膨張率が小さ
い（酸化アルミニウムよりも小さい）ためパッケージ１
の熱変形が小さい。また窒化アルミニウム層は耐食性が
大きいので、高温多湿などの過酸な環境においてもパッ
ケージの腐食劣化が抑えられる。Furthermore, since the aluminum nitride layer has a small coefficient of thermal expansion (smaller than aluminum oxide), the package 1
The thermal deformation of is small. Further, since the aluminum nitride layer has a high corrosion resistance, the corrosion deterioration of the package can be suppressed even in a peracid environment such as high temperature and high humidity.
【００２１】そしてまた本発明は、図２に示すようにパ
ッケージ１の一部例えばカバー部３の上面に、例えばア
ルミニウムやアルミニウム合金の表面に窒化アルミニウ
ム層６を形成してなる放熱フィン６１を設けてもよい
し、あるいは図３に示すように冷媒流路部材６２を設け
てこの中に例えば冷却水を通流させるようにしてもよ
く、更には図示しないがパッケージの外表面や内表面全
体に放熱フィンを形成するようにしてもよい。放熱フィ
ンについてはアルミニウムやアルミニウム合金に限定さ
れず、それ以外の金属を用いてもよい。Further, according to the present invention, as shown in FIG. 2, a radiating fin 61 formed by forming an aluminum nitride layer 6 on the surface of, for example, aluminum or an aluminum alloy is provided on a part of the package 1, for example, the upper surface of the cover portion 3. Alternatively, as shown in FIG. 3, a cooling medium flow path member 62 may be provided to allow cooling water to flow therethrough. Further, although not shown, the entire outer surface or inner surface of the package may be provided. You may make it form a radiation fin. The heat radiation fin is not limited to aluminum or aluminum alloy, and other metals may be used.
【００２２】なお本発明では、図２に示すようにパッケ
ージ１の内面に必ずしも窒化アルミニウム層１１を形成
しなくともよいし、またベース部２とカバー部３とを、
接着剤を用いる代わりに図３に示すようにロー材１２に
よりロー付けしてもよい。In the present invention, the aluminum nitride layer 11 does not necessarily have to be formed on the inner surface of the package 1 as shown in FIG. 2, and the base portion 2 and the cover portion 3 are
Instead of using an adhesive, brazing may be performed with a brazing material 12 as shown in FIG.
【００２３】そしてボンディングワイヤ５１に接続され
る導電路としてはリードフレーム５に限定されるもので
はなく、例えば金属蒸着膜であってもよい。更に本発明
は、例えばカバー部３とリードフレーム５との間にウイ
ンドフレームを備えたウインドフレームパッケージにつ
いても適用できる。The conductive path connected to the bonding wire 51 is not limited to the lead frame 5, but may be a metal vapor deposition film, for example. Furthermore, the present invention can be applied to a wind frame package including a wind frame between the cover portion 3 and the lead frame 5, for example.
【００２４】以上において本発明は、マルチチップモジ
ュールなどと呼ばれている、複数の半導体デバイスをパ
ッケージ内に封入した構造に対しても適用でき、この実
施例を図４に示す。図中７はフレキシブル基板であり、
このフレキシブル基板７の上には複数の半導体デバイス
７１が塔載されると共に配線パターン７２が形成され、
半導体デバイス７１の電極と配線パターン７２とがボン
ディングワイヤ７３を介して接続されている。In the above, the present invention can be applied to a structure called a multi-chip module in which a plurality of semiconductor devices are enclosed in a package, and this embodiment is shown in FIG. In the figure, 7 is a flexible substrate,
A plurality of semiconductor devices 71 are mounted on the flexible substrate 7 and a wiring pattern 72 is formed,
The electrodes of the semiconductor device 71 and the wiring pattern 72 are connected via bonding wires 73.
【００２５】前記フレキシブル基板７は、周縁部以外の
個所全体に凹部８０が形成されたベース部８１の凹部８
０の上に接着層８２を介して載置されている。このベー
ス部８１はアルミニウムまたはアルミニウム合金よりな
り、表面全体に窒化アルミニウム層１００が形成されて
いる。前記ベース部８１の周縁部上面には配線パターン
８３が形成され、この配線パターン８３の一端は前記フ
レキシブル基板７上の配線パターン７２とボンディング
ワイヤ８４を介して接続されると共に、配線パターン８
３の他端はベース部８１の周縁部を上下に貫通するピン
８５の上端に接続されている。このピン８５は例えば外
周面に窒化アルミニウム層を形成したアルミニウムまた
はアルミニウム合金により構成されるが、他の金属で構
成してもよい。図４に示す実施例では配線パターン８３
とピン８５とにより、外部との接続のための導電路が構
成される。The flexible substrate 7 has a recessed portion 8 of a base portion 81 in which a recessed portion 80 is formed on the entire portion except the peripheral portion.
No. 0 is mounted via an adhesive layer 82. The base portion 81 is made of aluminum or an aluminum alloy, and the aluminum nitride layer 100 is formed on the entire surface. A wiring pattern 83 is formed on the upper surface of the peripheral portion of the base portion 81. One end of the wiring pattern 83 is connected to the wiring pattern 72 on the flexible substrate 7 through a bonding wire 84, and the wiring pattern 8 is formed.
The other end of 3 is connected to the upper end of a pin 85 that vertically penetrates the peripheral portion of the base portion 81. The pin 85 is made of, for example, aluminum or aluminum alloy having an aluminum nitride layer formed on the outer peripheral surface thereof, but may be made of other metal. In the embodiment shown in FIG. 4, the wiring pattern 83
And the pin 85 form a conductive path for connection to the outside.
【００２６】前記ベース部８１の上には、カバー部９が
接着層８６を介して被せられており、このカバー部９
は、周縁部分９１と、放熱フィン９２を備えた上蓋部分
９３とに分割されている。これら周縁部分９１及び上蓋
部分９３はアルミニウムまたはアルミニウム合金の表面
に窒化アルミニウム層１００を形成した材質が用いられ
る。A cover portion 9 is covered on the base portion 81 with an adhesive layer 86 interposed therebetween.
Is divided into a peripheral portion 91 and an upper lid portion 93 provided with heat radiation fins 92. The peripheral portion 91 and the upper lid portion 93 are made of aluminum or an aluminum alloy having a surface on which the aluminum nitride layer 100 is formed.
【００２７】このようにマルチチップモジュール方式の
パッケージデバイスにおいては、半導体デバイスが複数
設けられているのでパッケージ内の発熱量が大きいた
め、本発明を適用することは非常に有効である。またマ
ルチチップモジュール方式のパッケージデバイスを構成
する場合、上述のようにピン８５を用いる代りに、例え
ばリードフレームをベース部８１とカバー部９との間に
介装してリードフレームの内端をボンディングワイヤ８
４に接続するようにしてもよい。As described above, in the multi-chip module type package device, since a plurality of semiconductor devices are provided and the amount of heat generated in the package is large, it is very effective to apply the present invention. Further, in the case of configuring a package device of a multi-chip module system, instead of using the pins 85 as described above, for example, a lead frame is interposed between the base portion 81 and the cover portion 9 and the inner end of the lead frame is bonded. Wire 8
4 may be connected.
【００２８】[0028]
【発明の効果】本発明によれば各々アルミニウムまたは
アルミニウム合金よりなるベース部とカバー部との少な
くとも外面及び互いの接合面に熱伝導率の大きい窒化ア
ルミニウム層を形成しているため、放熱性が大きく、従
ってパッケージ内の温度上昇を抑えることができる。ま
たベース部とカバー部との外面に窒化アルミニウム層が
形成されているので、大気により外面が酸化アルミニウ
ムに変わるのを防止できる。According to the present invention, since the aluminum nitride layer having a large thermal conductivity is formed on at least the outer surface of the base portion and the cover portion, each of which is made of aluminum or aluminum alloy, and the joint surface between them, the heat dissipation is improved. Since it is large, the temperature rise in the package can be suppressed. Further, since the aluminum nitride layer is formed on the outer surfaces of the base portion and the cover portion, it is possible to prevent the outer surfaces from being changed to aluminum oxide by the atmosphere.
【図１】本発明の実施例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of the present invention.
【図２】本発明の他の実施例を示す断面図である。FIG. 2 is a sectional view showing another embodiment of the present invention.
【図３】本発明の更に他の実施例を示す断面図である。FIG. 3 is a sectional view showing still another embodiment of the present invention.
【図４】本発明の更にまた他の実施例を示す断面図であ
る。FIG. 4 is a cross-sectional view showing still another embodiment of the present invention.
１ パッケージ ２ ベース部 ３ カバー部 １１ 窒化アルミニウム層 ４ 半導体デバイス ５ リードフレーム ７ フレキシブル基板 ７１ 半導体デバイス ７３、８４ ボンディングワイヤ ８１ ベース部 ８３ 配線パターン ８５ ピン １００ 窒化アルミニウム層 1 Package 2 Base Part 3 Cover Part 11 Aluminum Nitride Layer 4 Semiconductor Device 5 Lead Frame 7 Flexible Board 71 Semiconductor Devices 73, 84 Bonding Wire 81 Base Part 83 Wiring Pattern 85 Pin 100 Aluminum Nitride Layer
Claims (2)
金よりなるベース部とカバー部とを接合してパッケージ
を構成し、このパッケージ内に半導体デバイスを収容す
ると共に、ベース部とカバー部との互いの接合面の間に
外部との接続のための導電路を介装してなるパッケージ
デバイスにおいて、 前記ベース部とカバー部との少なくとも外面及び互いの
接合面に窒化アルミニウム層を形成したことを特徴とす
るパッケージデバイス。1. A package is constructed by joining a base portion and a cover portion, each of which is made of aluminum or aluminum alloy, and a semiconductor device is housed in the package, and a joint surface between the base portion and the cover portion is formed. A package device in which a conductive path for connection with the outside is interposed, wherein an aluminum nitride layer is formed on at least an outer surface of the base portion and the cover portion and a joint surface of the base portion and the cover portion. .
の接合面の間に沿って伸びるリードフレームにより構成
されることを特徴とする請求項１記載のパッケージデバ
イス。2. The package device according to claim 1, wherein the conductive path is constituted by a lead frame extending along a joint surface between the base portion and the cover portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5110066A JPH06302713A (en) | 1993-04-12 | 1993-04-12 | Package device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5110066A JPH06302713A (en) | 1993-04-12 | 1993-04-12 | Package device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06302713A true JPH06302713A (en) | 1994-10-28 |
Family
ID=14526202
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5110066A Pending JPH06302713A (en) | 1993-04-12 | 1993-04-12 | Package device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06302713A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013021283A (en) * | 2011-07-08 | 2013-01-31 | Samsung Electro-Mechanics Co Ltd | Power module package and manufacturing method of the same |
-
1993
- 1993-04-12 JP JP5110066A patent/JPH06302713A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013021283A (en) * | 2011-07-08 | 2013-01-31 | Samsung Electro-Mechanics Co Ltd | Power module package and manufacturing method of the same |
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