JPH0630092B2 - Virtual memory management method in multiprocessor system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention comprises a main processor sharing a main storage device and one or more additional processors, wherein the main processor and the one or more additional processors are The present invention relates to a virtual memory management method in a multiprocessor system that controls virtual memory.

[Conventional technology]

Conventionally, in the virtual memory management method in this kind of multiprocessor system, when each processor has a management program individually and manages the memory independently, the main memory is divided for each processor or a plurality of processors are used. When one OS is present in each processor, each processor shares resource management information such as a page table, and closely manages communication at the control program level for storage management.

[Problems to be solved by the invention]

Among the virtual memory methods in the conventional multiprocessor system described above, the former method cannot be flexibly performed because the actual memory that can be used by each processor is limited in advance or the communication between the processors is divided because the memory area is divided. In the latter method, it is necessary to have a control program with the same capability for each processor, and it is necessary to modify the existing control program for a single processor to a multiprocessor. There are drawbacks.

[Means for solving problems]

A virtual memory management method for a multiprocessor system according to the present invention includes a main processor adopting a virtual memory system, one or more additional processors adopting the same virtual memory system as the main processor, the main processor and the one or more A main memory shared by the additional processor, a control program executed on the main processor, and a control program generated by the control program corresponding to each of the one or more additional processors and managed as a user program. A multiprocessor system comprising one or more proxy processes and an interprocessor communication means for notifying the main processor that a page fault has occurred due to a request from any one of the one or more additional processors, Each of the one or more additional processors has a real address corresponding to the virtual address to be accessed. When the absence of a dress is detected, the inter-processor communication means makes a real address recovery request to a proxy process corresponding to each of the one or more proxy processes, and each of the one or more proxy processes is In response to the real address recovery request, obtaining the notified virtual address to be accessed, accessing with the virtual address, and notifying the additional processor of processing recovery.

[Operation] Since the absence of a page of the additional processor is accessed again by the proxy process to access the same address and the main processor solves the problem, the additional processor requires special hardware and control programs for virtual memory management. do not do.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of a multiprocessor system to which the virtual memory management system of the present invention is applied.

The multiprocessor system according to the present embodiment includes a main processor 1, a main storage device 2, an additional processor 3, a control program 4, a proxy process 5, and an interprocessor communication means 6.

When the additional processor 3 detects the page absence, the signal line 13
The interprocessor communication means 6 is notified of that fact and the virtual address at which the page is absent. The inter-processor communication means 6 notifies the main processor 1 that a page fault has occurred in the additional processor 3 through the signal line 21. The main processor 1 then enters an interrupt process, and requests the control program 4 for control using the hardware / software interfaces 16 and 15. Here, the hardware-software interface is a means for the hardware to communicate with software operating on that hardware along with certain information, such as changing the instruction pointer or storing the hardware state in memory. It means that the software is intentionally saved, or the software intentionally executes an instruction forcibly causing an interrupt. Control program 4 is an interface between software
Through 17 and 18, the proxy process 5 corresponding to the additional processor 3 is notified of the page absence. During the transfer of control up to this point, the virtual address notified from the additional processor 3 may carry each control unit through the inter-processor communication unit 6, or when the proxy process 5 receives the notification, it is determined to be certain. The virtual address in the inter-processor communication means 6 may be obtained by the means provided. In any case, when the proxy process 5 gets the virtual address, it accesses the address. In this case, since the purpose is to cause a page absence on the main processor 1 side by access, it is sufficient to simply read the address. Due to this access, a page-absence event occurs on the main processor 1 side, and page generation or recovery processing for a normal page-absence is performed. Since the proxy process 5 and the additional processor 3 are given the same address space in advance by the control program 4, the page absence event detected by the additional processor 3 is resolved by the processing for this page absence. The information necessary for converting the virtual address to the real address is the corresponding proxy process 5
When the initialization is performed, the additional processor 3 is notified through the inter-processor communication means 6.

FIG. 2 is a flowchart of the processing of the proxy process.
First, the additional processor 3 is initialized (step 21).
Next, the process is put to sleep (step 22). After that, when the virtual address is obtained (step 23), the virtual address is accessed to cause a page fault (step 2).
Four). Then, the end of processing is notified to the additional processor 3 (step 25).

〔The invention's effect〕

As described above, according to the present invention, a proxy process having the same virtual address corresponding to the additional processor and a means for notifying the proxy process of the request of the additional processor are provided, and the page absence of the additional processor is again processed by using the same address as the proxy process. Access by the main processor to solve the problem, the special processor does not need any special hardware or control program for virtual memory management, and the main processor has a control program for the existing single processor. Only by doing so, it is possible to construct a multiprocessor system having a flexible storage management function.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a multiprocessor system to which the virtual memory management system of the present invention is applied, and FIG.
It is a flowchart of the process of the proxy process 5 in the figure. 1 ... Main processor, 2 ... Main storage device, 3 ... Additional processor, 4 ... Control program 5 ... Surrogate process, 6 ... Interprocessor communication means, 11-14, 19-22 ... Signal line, 15,16 ... Hardware-software interface, 17,18 ... Software interface.

Claims (1)

[Claims] 1. A main processor adopting a virtual memory system, one or more additional processors adopting the same virtual memory system as the main processor, and shared by the main processor and the one or more additional processors. A main memory, a control program executed on the main processor, one or more proxy processes generated by the control program corresponding to each of the one or more additional processors, and managed as a user program, A multiprocessor system comprising an inter-processor communication means for notifying the main processor that a page fault has occurred in response to a request from any one or more additional processors, each of the one or more additional processors When the absence of the real address corresponding to the virtual address to be accessed is detected, communication between the processors is performed. By means, a real address recovery request is made to a proxy process corresponding to each of the one or more proxy processes, and each of the one or more proxy processes responds to the real address recovery request and notifies A virtual memory management method in a multiprocessor system comprising: a step of obtaining the virtual address to be accessed, a step of accessing with the virtual address, and a step of notifying the additional processor of processing recovery.