JPH0621738A - Amplitude limit circuit - Google Patents

Abstract

PURPOSE:To keep a limiting voltage constant at all times independently of a temperature change by cancelling the temperature characteristic of 1st and 2nd transistors(TRs) whose emitters are connected to a prescribed point by the temperature characteristic of 3rd and 4th TRs. CONSTITUTION:A base voltage of TRs Q1, Q2 to connect to a prescribed point is imparted from a voltage application power supply via TRs Q3, Q4. Thus, the temperature characteristic of the TRs Q1, Q2 is cancelled by that of the TRs Q3, Q4 and a limiting voltage is kept always constant independently of a temperature change. That is, the voltages VL+VBE3 and VH-VBE4 are applied to each base of the TRs Q1, Q2 inserted among circuits X, Y, Z to let the voltages respectively be V1, V2. Even when a current is inputted/ outputted to/from the circuits Y, Z via the TRs Q1, Q2, since the circuits Y, Z are constituted with feedback circuits, the respective voltages at connecting points P2, P3 and the respective emitters of the TRs Q3, Q4 are immediately restored to the original voltage. Thus, the base voltage of the TRs Q1, Q2 are kept always to the voltage V1, V2 respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplitude limiting circuit installed in an FM communication device or the like.

[0002]

2. Description of the Related Art An amplitude limiting circuit is a circuit for limiting the amplitude of all input signals having a certain threshold value or more and keeping the output signal constant. For example, it is installed in the instantaneous deviation control circuit (IDC) of the FM transmitter, limits the maximum frequency deviation of the carrier to a certain value or less, suppresses the spread of the transmission power spectrum, and FM demodulates the FM receiver ( It is installed in front of the (detection) stage and is used to remove AM waves and impulsive noise mixed with FM waves.

FIG. 4 shows an example of a conventional amplitude limiting circuit.
In the figure, a circuit X is a capacitor-coupled AC amplifier circuit, and is composed of an input terminal 1, a coupling capacitor C, an input resistor R ₇ , an operational amplifier A to which a feedback resistor R ₈ is connected, and an output terminal 2. In this circuit, the input AC signal is multiplied by R ₈ / R ₇ and inverted and output. The circuit Z includes transistors Q ₅ , Q ₆ and a constant current source CS
₃ which a differential amplifier circuit consisting of a current mirror circuit consisting of transistors Q _7, Q _8, the transistors Q _9, and a resistor R ₈ feedback circuit is constituted by a voltage inputted from the base of the transistor Q ₅ Is a voltage follower circuit for outputting from the base of the transistor Q ₆ .
The input side of the circuit Z is resistors R ₉ and R ₁₀ (provided that R ₉ = R ₁₀ ) connected in series from the GND line to the power supply line.
Connected to the connection point P ₄ of the power supply voltage V _{C C} and the output side thereof is connected to the non-inverting input terminal of the operational amplifier A of the circuit X via the resistor R ₆ A bias voltage is applied to A.

Between the circuit X and the circuit Z having the above-described circuit configuration, an NPN transistor Q ₁ ′ whose collector is connected to the power supply line and a P transistor whose collector is connected to the GND line are connected.
An NP-type transistor Q ₂ ′ is inserted, and a transistor Q ₁
The bases of ′ and Q ₂ ′ are connected to the base of the transistor Q ₆ and the voltage V _CC / 2 is applied to the base of the transistor Q _6.
1 ', Q _2' emitter of are given the output voltage e _o of the circuit X is connected to the output terminal 2 of the circuit X.

Therefore, the circuit operation of this circuit will be described below with the base-emitter voltage of the transistors Q ₁ ′ and Q ₂ ′ being V _BE (about 0.7 V at room temperature). Output signal e _{o of} circuit X
There _{(V cc / 2) -V BE} <e o <(V cc / 2) + V transistor Q ₁ is the time of _BE ', Q _2' because both are non-conductive, the output of the circuit X from the amplitude limiting circuit The signal e _o is output as it is. However, the output signal e _{o of the} circuit X is e _o ≤
When (V _cc / 2) -V _BE , the transistor Q ₁ ′ conducts, and the current is supplied to the circuit X from the circuit Z through the transistor Q ₁ ′, so the output signal of this amplitude limiting circuit is ( is limited to V _cc / 2) -V _bE. When the output signal e _{o of the} circuit X is e _o ≧ (V _cc / 2) + V _BE , the transistor Q ₂ ′ conducts and a current flows from the circuit X to the circuit Z through the transistor Q ₂ ′. The output signal of this amplitude limiting circuit is limited to ( _Vcc / 2) + _VBE . That is, the low side V _LL and the high side V _LH of the limiting voltage of this amplitude limiting circuit are (V _cc / 2) -V _BE and (V _cc / 2) + V, respectively.
_BE .

Since the circuit Z has a feedback circuit configuration, fluctuations in the output voltage of the circuit Z due to the input and output of currents through the transistors Q ₁ ′ and Q ₂ ′ are always recovered and the transistor Q is always recovered.
₁ ', Q _2' the voltage applied to the base of is always maintained at V _cc / 2, for example, if you enter the triangular wave in this circuit,
The output waveform is clipped at ± V _BE with reference to V _cc / 2, as shown in FIG. Further, the order of 1.8V when determining minimum operating voltage M _in the amplitude limiting circuit (V _cc) below. The constant current source CS ₃ of the circuit Z is connected to one transistor Q.
, And the collector of the transistor Q is the transistor Q
₅ and Q ₆ are connected to the emitter and the emitter is connected to the GND line, the transistor Q which is the input of the circuit Z
The base voltage of ₅ is V _CE + V _BE5 (1). (However, V _CE is the collector of transistor Q
The emitter-to-emitter voltage, V _BE5, is the base-to-emitter voltage of the transistor Q ₅ . ) V _CE and V _BE5 are at least 0.
If 3V and 0.6V are not applied, transistors Q and Q
_{Since 5} does not conduct, the input of the circuit Z is
It is necessary to provide a minimum of 0.9V. Therefore, the power supply voltage V _cc
This amplitude limiting circuit can operate by applying a voltage twice that, that is, 1.8V.

[0007]

In [0005] the amplitude limiting circuit of a conventional configuration, the limiting voltage, as described above _{(V cc / 2) -V BE} , is _{(V cc / 2) + V} BE However, the base-emitter voltage V _{BE of} the transistor is about −
Since it has a temperature characteristic of 2 mV / ° C., there is a problem that the limiting voltage also changes with changes in temperature. Also, the dynamic range, that is, _VLH - _VLL , is 2
It is V _BE . This means that the value of the dynamic range is always 2V _BE even if the minimum operating voltage M _in (V _cc ) 1.8 V obtained above is applied to the power supply voltage V _cc or a higher voltage is applied. As shown, there is a problem that the dynamic range is not widened even in a circuit that applies a high voltage to the power supply voltage _Vcc .

An object of the present invention is to solve these problems and to provide an amplitude limiting circuit which can always keep the limiting voltage constant irrespective of temperature changes and can change the dynamic range by the power supply voltage.

[0009]

In order to achieve the above object, the amplitude limiting circuit of the present invention is an amplitude limiting circuit for suppressing the level of a signal applied to a predetermined point to a predetermined level when the signal exceeds the predetermined level. , A first transistor of a first conductivity type having an emitter connected to the predetermined point, a second transistor of a second conductivity type opposite to the first transistor having an emitter connected to the predetermined point, and an emitter A second conductivity type third transistor connected to the base of the first transistor, and a first constant current source and an emitter which are connected to the base of the first transistor and the emitter of the third transistor and are stable against temperature changes. Is connected to the base of the second transistor, the fourth transistor of the first conductivity type, the base of the second transistor, and the fourth transistor
It comprises a second constant current source connected to the emitter of the transistor and stable against temperature changes, and a voltage applying power source for applying a voltage equal to a predetermined level to the bases of the third and fourth transistors.

The voltage applying power source is a voltage follower circuit, and first, second, and third voltage dividing points of the power source voltage for applying the input voltage of the voltage follower circuit and the base voltages of the third and fourth transistors. Composed of.

[0011]

According to this structure, since the base voltages of the first and second transistors connected to the predetermined point are given from the voltage application power source through the third and fourth transistors, the temperature of the first and second transistors is reduced. The characteristics are canceled by the temperature characteristics of the third and fourth transistors, and the limiting voltage can always be kept constant regardless of temperature changes. Further, since the base voltages of the third and fourth transistors are given from the voltage dividing point of the power supply voltage, the dynamic range can be changed by the power supply voltage.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an embodiment of the present invention. A circuit X is a capacitor-coupled AC amplifier circuit having the same circuit configuration as the conventional example, but an NPN transistor Q ₁ , PNP type is provided at an output terminal 2 of the circuit X. Connect the emitter of transistor Q ₂ . A circuit obtained by removing the circuit X from the circuit of FIG. 1 is shown in FIG. 1 and 2, the same parts as those in the conventional example of FIG.

First, the circuit configuration of the present invention except the circuit X will be described with reference to FIG. The circuit Y includes a PNP transistor Q ₃ whose emitters are connected to the output terminals of the constant current sources CS ₁ and CS ₂ and the constant current source CS _{1 which} are stable against temperature changes, and an emitter to the input terminals of the constant current source CS _2. And an NPN transistor Q ₄ connected to each other, and transistors Q ₃ and Q ₄
This is a level shift circuit for applying the base voltage of the transistors Q ₁ and Q ₂ from the emitter of. The collectors of the transistors Q ₁ and Q ₂ are connected to the power supply line and the GND line, respectively. Further, the circuit Z is a voltage follower circuit having the same circuit configuration as that of the conventional example, and its input is V as follows.
A voltage of _cc / 2 is applied. 4 resistors R ₁ , R ₂ ,
R ₃ and R ₄ are serially connected in series between the GND line and the power supply line, and the connection point P ₁ of the resistors R ₂ and R ₃ is connected to the base of the transistor Q ₅ which is the input terminal of the circuit Z. Further resistance R ₁ ,
The connection point P ₃ of the R ₂ at the connection point P ₂ and the resistor R _3, R _4, are each connected to the base of the circuit Y transistor Q ₃ and the transistor Q ₄ of. However, the sizes of the resistors R ₁ , R ₂ , R ₃ and R ₄ are set to R ₁ = R ₄ and R ₂ = R ₃ .

In this way, R ₁ + R ₂ = R ₃ + R ₄
As a result, not only the voltage at the connection point P ₁ becomes V _cc / 2, but also R ₂
= R ₃ , the voltages V _L and V _{H at the} connection points P ₂ and P ₃ are respectively (V _cc
/ 2) -V, ( _Vcc / 2) + V and _Vcc / 2 with reference to V
The value can be small or large by V. Here, since the value of V is calculated as V = R ₂ · V _cc / 2 (R ₁ + R ₂ ), V _L and V _H can be respectively expressed by the following equations. _{V L = (V cc / 2} ) - {R 2 · V cc / 2 (R 1 + R 2)} ··· (2) V H = (V cc / 2) + {R 2 · V cc / 2 ( R ₁ + R ₂ )} ... (3)

The base voltage of the transistors Q ₁ and Q ₂ is the transistor Q ₃ due to the currents of the constant current sources CS ₁ and CS ₂ .
The base-emitter voltage of Q ₄ is V _BE3 and V _BE4 respectively.
Then it becomes as follows. The base voltage of the transistor Q ₁ is _VL + V _{BE3 because} it is a voltage applied to the connection point between the constant current source CS ₁ and the transistor Q ₃ from the connection point P ₂ via the transistor Q ₃ . The base voltage of the transistor Q ₂ is V _H −V _{BE4 because} it is a voltage applied to the connection point between the constant current source CS ₂ and the transistor Q ₄ from the connection point P ₃ via the transistor Q ₄ .

Now, returning to FIG. 1, the circuit operation of the amplitude limiting circuit of the present invention will be described. In addition, like FIG. 4 of the conventional example,
The output side of the circuit Z is connected to the non-inverting input terminal of the operational amplifier A of the circuit X via the resistor R ₆ and applies a bias voltage to the operational amplifier A.

[0017] In circuit X and circuitry Y, transistors Q _1, Q _2, which is inserted between the Z, not the voltage _{V L + V BE3, V H} -V BE4 granted as described above to the respective bases However, these voltages will now be simply expressed as V ₁ and V ₂ . The output voltage e _o of the circuit X is applied to each emitter. When the base-emitter voltages of the transistors Q ₁ and Q ₂ are V _BE1 and V _BE2 , respectively, the base voltages of the transistors Q ₁ and Q ₂ are V ₁ and V ₂ , so the output signal e _{o of the} circuit X is V ₁ -V _BE1 <e _o <V ₂ +
Since both transistors Q ₁ and Q ₂ are in the off state when V _BE2 , the output signal e of the circuit X is output from this amplitude limiting circuit.
_o is output as is.

However, the output signal e _{o of the} circuit X is e _o ≤V _1-
When V _BE1 , the transistor Q ₁ is turned on, and current is supplied to the circuit X from the circuits Y and Z via the transistor Q _1. Therefore, the output signal of this amplitude limiting circuit is limited to V ₁ −V _BE1. . When the output signal e _{o of the} circuit X is e _o ≧ V ₂ + V _BE2 , the transistor Q ₂ is turned on, and the current flows from the circuit X into the circuits Y and Z through the transistor Q ₁ .
The output signal of this amplitude limiting circuit is limited to V ₂ + V _BE2 .

[0019] Here, the transistors Q _1, circuit via Q ₂ Y, circuitry Y even with and out of current Z, Z is a connection point so feedback circuit configuration P _2, the P ₃ and transistor Q _3, Q ₄ The voltage of each of the emitters is immediately restored to the original voltage, so that the base voltages of the transistors Q ₁ and Q ₂ are always kept at V ₁ and V ₂ .

From the above, the low side V _LL and high side V _LH of the limiting voltage of this amplitude limiting circuit are V _BE1 = V
_{If BE3} , V _BE2 = V _BE4 are adjusted, V _LL = V ₁ −V _BE1 = V _L + V _BE3 −V _BE1 = V _L (4) V _LH = V ₂ + V _BE2 = V _H − V _BE4 + V _BE2 = V _H (5) When a triangular wave is input to this circuit, its output waveform is cut off by V _L and V _H with reference to V _cc / 2 as shown in FIG. The limiting voltages V _LL and V _LH are given by the following equations from the equations (2), (3), (4) and (5). V _LL = (V _cc / 2)-{R ₂ · V _cc / 2 · (R ₁ + R ₂ )} (6) V _LH = (V _cc / 2) + {R ₂ · V _cc / 2・ (R ₁ + R ₂ )} (7) From equations (6) and (7), the limiting voltages V _LL and V _LH depend on the power supply voltage and the size of the resistance connected between the power supply line and the GND line. Since it is determined, the limiting voltage is constant even if the temperature changes.

Further, equation (6), the dynamic range is from _{(7), V LH -V LL} = R 2 · V cc / (R 1 + R 2) , and the dynamic range is proportional to the supply voltage V _cc,
Comparing FIG. 3 showing the input / output characteristic with FIG. 5 of the conventional example, it can be clearly seen that the amplitude is large. Further, since the configuration of the circuit Z and the voltage value given to its input are the same as those of the conventional example, the minimum operating voltage M _in (V _cc ) of the amplitude limiting circuit of the present invention is about 1.8 V as in the conventional example.

Although the amplitude limiting circuit of the present invention described above is a bipolar amplitude limiting circuit, a positive amplitude limiting circuit can be obtained by removing the transistors Q ₁ and Q ₃ and the constant current source CS ₁ from the circuit of FIG. be able to. Also it is possible to obtain a negative amplitude limiting circuit by removing the transistor Q _2, Q ₄ and the constant current source CS ₂ from the circuit of FIG. In this way, it is possible to obtain a positive or negative amplitude limiting circuit in which the limiting voltage can be kept constant with respect to temperature changes and the dynamic range can be varied by the power supply voltage _Vcc .

[0023]

As described above, with the amplitude limiting circuit of the present invention, the limiting voltage can be made constant with respect to temperature changes. In addition, the circuit configuration not only allows operation at a low power supply voltage of about 1.8 V, but also widens the dynamic range in proportion to the power supply voltage. Can send a big signal. As a result, it is possible to provide an amplitude limiting circuit suitable for various integrated circuit devices.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an amplitude limiting circuit embodying the present invention.

FIG. 2 is a circuit diagram showing a part of an amplitude limiting circuit embodying the present invention.

FIG. 3 is a diagram showing input / output characteristics of the amplitude limiting circuit of the present invention.

FIG. 4 is a circuit diagram showing a conventional amplitude limiting circuit.

FIG. 5 is a diagram showing an input / output characteristic of the amplitude limiting circuit.

[Explanation of symbols]

Q ₁ , Q ₄ NPN type transistor Q ₂ , Q ₃ PNP type transistor 1 Input terminal 2 Output terminal CS ₁ , CS ₂ , CS ₃ Constant current source Z Voltage follower circuit V _cc Power supply voltage P ₁ , P ₂ , P ₃ minutes Pressure point

Claims (4)

[Claims] 1. A first conductivity type first transistor having an emitter connected to the predetermined point in an amplitude limiting circuit for suppressing the level of the signal to a predetermined level when the signal applied to the predetermined point exceeds the predetermined level. A second transistor of a second conductivity type opposite to the first transistor having an emitter connected to the predetermined point, and a second transistor of a second conductivity type having an emitter connected to the base of the first transistor. A first conductivity type fourth transistor connected to the base of the first transistor and an emitter of the third transistor and having a stable first constant current source and an emitter connected to the base of the second transistor. And a second constant current source connected to the base of the second transistor and the emitter of the fourth transistor, which is stable against temperature changes, and the third and third An amplitude limiting circuit including a voltage application power source for applying a voltage equal to a predetermined level to the base of four transistors. 2. The voltage application power supply is a voltage follower circuit, and first, second, and third voltage divisions of a power supply voltage for applying an input voltage of the voltage follower circuit and base voltages of the third and fourth transistors. The amplitude limiting circuit according to claim 1, wherein the amplitude limiting circuit is composed of points. 3. An amplitude limiting circuit for suppressing the level of a signal applied to a predetermined point to a predetermined level when the signal applied to the predetermined point exceeds a predetermined level. A second transistor having a conductivity type opposite to that of the first transistor connected to the base of the first transistor, and a constant current source connected to the base of the first transistor and the emitter of the second transistor and stable against temperature changes And an amplitude limiting circuit configured to include a voltage application power source for applying a voltage equal to a predetermined level to the base of the second transistor. 4. The voltage application power supply according to claim 3, wherein a voltage follower circuit and first and second voltage dividing points of a power supply voltage for applying an input voltage of the voltage follower circuit and a base voltage of the second transistor are provided. Claim 3 constructed
Amplitude limiting circuit described in.