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JPH06188328A - Semiconductor device and assembly method thereof - Google Patents

Semiconductor device and assembly method thereof

Info

Publication number
JPH06188328A
JPH06188328A JP34002992A JP34002992A JPH06188328A JP H06188328 A JPH06188328 A JP H06188328A JP 34002992 A JP34002992 A JP 34002992A JP 34002992 A JP34002992 A JP 34002992A JP H06188328 A JPH06188328 A JP H06188328A
Authority
JP
Japan
Prior art keywords
semiconductor chip
submount
semiconductor device
laser
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34002992A
Other languages
Japanese (ja)
Inventor
Akira Takamori
晃 高森
Hiroyuki Ota
啓之 大田
Satoshi Kamiyama
智 上山
Yuzaburo Ban
雄三郎 伴
Seiji Onaka
清司 大仲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP34002992A priority Critical patent/JPH06188328A/en
Publication of JPH06188328A publication Critical patent/JPH06188328A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10158Shape being other than a cuboid at the passive surface

Landscapes

  • Semiconductor Lasers (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To lower a thermal resistance and to enhance the reliability of an element by a method wherein a substance whose thermal conductivity is excellent is liquefied and filled into a gap at the bonding face of an uneven metallized substrate to a semiconductor chip by utilizing a capillary phenomenon. CONSTITUTION:A groove part 3 for electrode isolation is formed in a metallized substrate 1 provided with an electrode pattern 4, an electrode pattern 5 for a semiconductor chip 2 is aligned with it, and a face-down bonding operation is performed. An insulating filler 6 is applied in advance to one part of the groove part at the outside of the semiconductor chip 2. The filler is melted by heating in the bonding operation, it is conveyed in the groove part due to a capillary phenomenon, and a thermal resistance between the semiconductor chip and the metallized substrate is reduced. Since the heat-dissipating property of the semiconductor chip is improved, the reliability of an element can be enhanced.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置およびその
実装方法に係わり、特に半導体レーザの組立方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its mounting method, and more particularly to a method of assembling a semiconductor laser.

【0002】[0002]

【従来の技術】高速光ディスク装置用の光源として、マ
ルチビーム半導体レーザが開発されている。このような
レーザアレイとサブマウントとの組立実装において、個
々のレーザを独立して駆動するために、レーザチップの
電極パターンに対応した電極パターンを持つ複雑なヒー
トシンクが必要である。また、複数のレーザ素子を同時
に動作させるので、放熱効果の高いサブマウントが必要
である。レーザチップ側では、各素子を独立して駆動す
るため、アレイ間に電極分離用の溝がエッチングによっ
て設けられる。各素子の間隔は用途にもよるが50μm
ないし百数十μmと狭いために、チップのジャンクショ
ンダウン実装時の位置合わせにおいても高い精度が要求
される。
2. Description of the Related Art A multi-beam semiconductor laser has been developed as a light source for a high-speed optical disk device. In such assembly and mounting of the laser array and the submount, in order to independently drive each laser, a complicated heat sink having an electrode pattern corresponding to the electrode pattern of the laser chip is required. Moreover, since a plurality of laser elements are operated simultaneously, a submount having a high heat dissipation effect is required. On the laser chip side, since each element is driven independently, a groove for electrode separation is provided between the arrays by etching. The distance between each element is 50 μm, depending on the application
Since it is as narrow as one hundred and several tens of μm, high precision is required also in the alignment at the time of chip-down mounting of the chip.

【0003】以上のように、シングルビームのレーザに
比べて、サブマウントの設計、レーザチップの作製工
程、および実装が複雑で、素子としての歩留まりが低
い。
As described above, compared with a single-beam laser, the submount design, laser chip manufacturing process, and mounting are complicated, and the yield as an element is low.

【0004】[0004]

【発明が解決しようとする課題】レーザのアレイ化で
は、複数のレーザが狭い間隔でワンチップ化されるた
め、個々のレーザ素子間の熱干渉によって、活性層温度
が上昇し、寿命低下や発振波長がドリフトするなどの特
性変動が大きな問題となっている。
In the arraying of lasers, a plurality of lasers are integrated into a single chip with a narrow interval. Therefore, thermal interference between individual laser elements raises the temperature of the active layer, shortens the life, and oscillates. Characteristic variations such as wavelength drift have become a serious problem.

【0005】そこで本発明は、凹凸を有するメタライズ
基板と半導体チップの接合面の隙間に熱伝導性の優れた
物質を液化して、毛細管現象を利用して充填することに
より、熱抵抗を下げ、素子の信頼性の高い半導体装置お
よびその組立方法を提供するものである。
In view of the above, the present invention reduces the thermal resistance by liquefying a material having excellent thermal conductivity in the gap between the joint surface of the metallized substrate having irregularities and the semiconductor chip and filling it by utilizing the capillary phenomenon. A semiconductor device having a highly reliable element and a method for assembling the same are provided.

【0006】[0006]

【課題を解決するための手段】サブマウントと半導体チ
ップの接合面の隙間に、熱伝導性の優れた物質を液化し
て、毛細管現象を利用して充填することにより、熱抵抗
を下げ、素子の信頼性向上を図る。
[Means for Solving the Problems] By liquefying a substance having excellent thermal conductivity and filling it in a gap between a joint surface of a submount and a semiconductor chip by utilizing a capillary phenomenon, the thermal resistance is lowered, Improve the reliability of.

【0007】[0007]

【作用】サブマウントに溝を形成することによって、レ
ーザからの放熱が効果的になされ、片方のレーザがオン
した状態で、もう一方のレーザをオンさせても熱干渉に
よる温度上昇が減少し、レーザの光出力の変化がすくな
くなり、従来に比べて改善される。
[Function] By forming a groove in the submount, heat dissipation from the laser is effectively performed, and even if one laser is turned on and the other laser is turned on, the temperature rise due to thermal interference is reduced, The change in the optical output of the laser is reduced, which is improved compared to the conventional case.

【0008】絶縁性フィラー6の溝部への充填方法も、
ダイスボンド時の加熱により、溶融させて毛細管現象に
よって自動的に溝部を伝わり、レーザチップおよびサブ
マウント間の空間を埋める。
The method of filling the insulating filler 6 in the groove is also
By heating at the time of die bonding, it is melted and automatically propagates through the groove due to the capillary phenomenon to fill the space between the laser chip and the submount.

【0009】[0009]

【実施例】以下、本発明の実施例を図示の実施例によっ
て説明する。
Embodiments of the present invention will be described below with reference to the illustrated embodiments.

【0010】図1は、本発明の実施例に係る半導体装置
の概略図である。この例では、一つの半導体レーザチッ
プ2に2個のレーザ素子が集積化されている。図中には
詳しく描いていないが、半導体レーザチップ2には2つ
の素子があり、それぞれがV型のメサで分離されてい
る。2個のレーザ素子の間隔は50μmで、深さ約10
μmの溝によって電気的に分離されている。分離溝上は
電極金属の代わりにSiO2膜で覆われている。
FIG. 1 is a schematic diagram of a semiconductor device according to an embodiment of the present invention. In this example, two laser elements are integrated on one semiconductor laser chip 2. Although not shown in detail in the drawing, the semiconductor laser chip 2 has two elements, which are separated by a V-type mesa. The distance between the two laser elements is 50 μm and the depth is about 10 μm.
It is electrically separated by a μm groove. The separation groove is covered with a SiO 2 film instead of the electrode metal.

【0011】一方、サブマウントは上下面がTi/Pt/
Auでメタライズされているが側面はメタライズされて
いないので電気的に絶縁されている。その上から下面に
はヒートシンクとの接着のためのPb/Sn半田が蒸着
してある。半導体レーザチップと接合する側の上面に
は、レーザチップよりもやや大きな面積に部分的にPb
/Sn半田の電極パターン4が蒸着してある。さらに、
半導体レーザチップの電極パターン5に対応して電極パ
ターン4の中央部には電極分離のための溝部3が設けら
れている。溝部3の幅はレーザ素子間隔に比べて、30
μmと狭くしている。深さは5〜10μm程度である。
On the other hand, the upper and lower surfaces of the submount are Ti / Pt /
It is metallized with Au, but the sides are not metallized, so it is electrically insulated. Pb / Sn solder for adhesion to a heat sink is vapor-deposited on the upper and lower surfaces. The upper surface of the side to be joined to the semiconductor laser chip is partially covered with Pb in a slightly larger area than the laser chip.
The electrode pattern 4 of / Sn solder is vapor-deposited. further,
Corresponding to the electrode pattern 5 of the semiconductor laser chip, a groove 3 for electrode separation is provided at the center of the electrode pattern 4. The width of the groove 3 is 30
It is as narrow as μm. The depth is about 5 to 10 μm.

【0012】溝部3上には,あらかじめ熱伝導性に優れ
た絶縁性フィラー6を付着させておく。絶縁性フィラー
6の材料には、粒径2〜5μmのAlN,BN,ダイヤ
モンド粉末をポリイミド樹脂などのバインダ材料に混ぜ
たものを用いたが、この粉末はこれらの材料以外でも熱
伝導性に優れた物質であれば用いることができる。ま
た,このバインダの融点はレーザチップのダイスボンド
時の温度よりも10〜20℃高くしている。このサブマ
ウント1に半導体レーザチップ2を半田の融点よりも少
し高い温度でフェースダウンボンディングする。それぞ
れの電極パターンを合わせてボンディングが終了した時
点で,サブマウントの温度を20〜30℃高くすると,
絶縁性フィラー6が溶融し,数秒で溝部3を伝わって流
れ出し,毛細管現象によってレーザチップおよびサブマ
ウント間の空間が絶縁性フィラー6によって充填され
る。
An insulating filler 6 having excellent thermal conductivity is previously attached to the groove portion 3. As the material of the insulating filler 6, a mixture of AlN, BN and diamond powder having a particle size of 2 to 5 μm with a binder material such as polyimide resin was used. This powder is also excellent in thermal conductivity other than these materials. Any substance can be used. The melting point of this binder is set to 10 to 20 ° C. higher than the temperature at the time of die bonding of the laser chip. The semiconductor laser chip 2 is face-down bonded to the submount 1 at a temperature slightly higher than the melting point of the solder. When the temperature of the submount is raised by 20 to 30 ° C. at the time when bonding is completed by combining the respective electrode patterns,
The insulating filler 6 is melted, flows out along the groove 3 in a few seconds, and the space between the laser chip and the submount is filled with the insulating filler 6 by the capillary phenomenon.

【0013】次に、レーザ素子の特性が改善される様子
を実験結果を図2を用いて説明する。図1で説明してよ
うに、一つの半導体レーザチップに2個のレーザ素子
(LD1およびLD2)が集積化されており、図1に示
すような構成で実装されている。それぞれのレーザは独
立に駆動できるようになっている。
Next, how the characteristics of the laser device are improved will be described with reference to experimental results with reference to FIG. As described with reference to FIG. 1, two laser elements (LD1 and LD2) are integrated on one semiconductor laser chip, and are mounted in the configuration shown in FIG. Each laser can be driven independently.

【0014】図2(a)は,図1溝部3に空間がある場
合のLD2の光出力-電流特性を示している。LD1が
オフのときの発振しきい値電流は42mAで光出力も3
0mW以上まで直線性が保たれている。LD2のみを駆
動させたときの特性温度は120Kであった。この値
は、同じ構造のシングルビーム半導体レーザの値に比べ
て約20K低く、溝部3の空間によって放熱特性が悪く
なっていると考えられる。
FIG. 2A shows the light output-current characteristics of the LD 2 when there is a space in the groove portion 3 of FIG. The oscillation threshold current is 42 mA and the optical output is 3 when LD1 is off.
Linearity is maintained up to 0 mW and above. The characteristic temperature when driving only LD2 was 120K. This value is about 20 K lower than the value of the single-beam semiconductor laser having the same structure, and it is considered that the space of the groove 3 deteriorates the heat dissipation characteristic.

【0015】LD1を光出力30mWに設定し定電流で
動作させているときのLD2の光出力-電流特性は、し
きい値電流が約3mA上昇し,光出力も20mW以上で
飽和する傾向が見られた。同時にLD1の光出力も波線
で示すようにLD2の駆動電流の上昇と共に大きく低下
していく傾向が見える。
When the light output of LD1 is set to 30 mW and the LD2 is operated at a constant current, the light output-current characteristics of LD2 show that the threshold current increases by about 3 mA and the light output tends to be saturated at 20 mW or more. Was given. At the same time, it can be seen that the light output of LD1 also greatly decreases as the drive current of LD2 increases, as indicated by the broken line.

【0016】LD2の特性温度、しきい値電流の増加量
から換算して、LD1によるLD2の活性層付近の温度
上昇は10℃前後と見積れる。さらに電流を増していく
と、熱干渉の相互作用によってさらに活性層温度が上が
るため温度上昇の影響は10℃以上になる。
From the characteristic temperature of LD2 and the amount of increase in the threshold current, the temperature rise in the vicinity of the active layer of LD2 by LD1 is estimated to be around 10 ° C. When the current is further increased, the temperature of the active layer further rises due to the interaction of thermal interference, so that the influence of the temperature rise becomes 10 ° C. or more.

【0017】図2(b)は,図1溝部3の空間が熱伝導
性の優れた絶縁性フィラー6で充填されている場合のL
D2の光出力-電流特性を示している。放熱効果の改善
によって熱干渉による温度上昇が減少し、LD1がオン
の場合の特性がかなり改善されている。絶縁性フィラー
6の溝部への充填方法であるが,ダイスボンド時の加熱
により、溶融させて毛細管現象によって自動的に溝部を
伝わり、レーザチップおよびサブマウント間の空間を埋
める。
FIG. 2B shows L when the space of the groove portion 3 in FIG. 1 is filled with the insulating filler 6 having excellent thermal conductivity.
The optical output-current characteristic of D2 is shown. Due to the improvement of the heat radiation effect, the temperature rise due to thermal interference is reduced, and the characteristics when the LD1 is on are considerably improved. This is a method of filling the groove with the insulating filler 6, but it is melted by heating at the time of die bonding and automatically propagates through the groove by a capillary phenomenon to fill the space between the laser chip and the submount.

【0018】[0018]

【発明の効果】以上詳述したように本発明によれば,半
導体チップとサブマウントとの間の熱抵抗が減少する。
半導体チップの放熱特性が改善されるため、素子の信頼
性を向上できる。また、そのための組立方法も簡単で、
従来の工程を大きく変えることなく実施できるのでその
効果は大きい。
As described in detail above, according to the present invention, the thermal resistance between the semiconductor chip and the submount is reduced.
Since the heat dissipation characteristics of the semiconductor chip are improved, the reliability of the device can be improved. Also, the assembly method for that is simple,
The effect is great because it can be carried out without significantly changing the conventional process.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す半導体レーザ装置の概
略図
FIG. 1 is a schematic view of a semiconductor laser device showing an embodiment of the present invention.

【図2】本発明の作用および効果を説明する図面FIG. 2 is a drawing for explaining the operation and effect of the present invention.

【符号の説明】[Explanation of symbols]

1 サブマウント 2 半導体チップ 3 溝部 4 電極パターン(サブマウント) 5 電極パターン(半導体チップ) 6 絶縁性フィラー 1 Submount 2 Semiconductor Chip 3 Groove 4 Electrode Pattern (Submount) 5 Electrode Pattern (Semiconductor Chip) 6 Insulating Filler

───────────────────────────────────────────────────── フロントページの続き (72)発明者 伴 雄三郎 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 大仲 清司 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor, Yuzaburo 1006, Kadoma, Kadoma, Osaka Prefecture, Matsushita Electric Industrial Co., Ltd. (72) Kiyoji Ohnaka, 1006, Kadoma, Kadoma, Osaka, Matsuda Electric

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】半導体チップと、サブマウントと、ヒート
シンクとを高温でハンダで接合し、放熱構造を構成する
半導体装置において、接合面間にできた隙間に熱伝導の
すぐれた物質が充填されていることを特徴とした半導体
装置。
1. A semiconductor device in which a semiconductor chip, a submount, and a heat sink are joined by soldering at high temperature to form a heat dissipation structure, and a gap formed between the joining surfaces is filled with a substance having excellent heat conduction. A semiconductor device characterized in that
【請求項2】半導体装置の実装において,充填物質を毛
細管現象を利用して上記隙間に充填することを特徴とし
た組立方法。
2. A method for assembling a semiconductor device, wherein a filling substance is filled in the gap by utilizing a capillary phenomenon.
【請求項3】請求項1記載の充填物質はあらかじめサブ
マウント上にのせられており、その融点が半導体チップ
とサブマウントのダイスボンド温度よりも高いことを特
徴とする組立方法。
3. A method for assembling, wherein the filling material according to claim 1 is placed on a submount in advance, and its melting point is higher than the die bond temperature of the semiconductor chip and the submount.
【請求項4】請求項1記載の充填物質が、請求項3記載
の融点を有するバインダ物質中に熱伝導性の優れた微少
粒状物質が均一に混ぜ合わされた構成になっていること
を特徴とした半導体装置。
4. The filling material according to claim 1, wherein the binder material having the melting point according to claim 3 is uniformly mixed with fine particulate material having excellent thermal conductivity. Semiconductor device.
JP34002992A 1992-12-21 1992-12-21 Semiconductor device and assembly method thereof Pending JPH06188328A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34002992A JPH06188328A (en) 1992-12-21 1992-12-21 Semiconductor device and assembly method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34002992A JPH06188328A (en) 1992-12-21 1992-12-21 Semiconductor device and assembly method thereof

Publications (1)

Publication Number Publication Date
JPH06188328A true JPH06188328A (en) 1994-07-08

Family

ID=18333064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34002992A Pending JPH06188328A (en) 1992-12-21 1992-12-21 Semiconductor device and assembly method thereof

Country Status (1)

Country Link
JP (1) JPH06188328A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998019338A1 (en) * 1996-10-30 1998-05-07 Hitachi Chemical Company, Ltd. Chip supporting substrate for semiconductor package, semiconductor device, and method for manufacturing them
JP2005191373A (en) * 2003-12-26 2005-07-14 Ricoh Co Ltd Semiconductor laser device
JP2006135177A (en) * 2004-11-08 2006-05-25 Sony Corp Semiconductor laser apparatus
JP2007180563A (en) * 2001-02-14 2007-07-12 Fuji Xerox Co Ltd Laser light source
US9494684B2 (en) 2011-12-12 2016-11-15 Murata Manufacturing Co., Inc. Position measurement device
JP2018078135A (en) * 2016-11-07 2018-05-17 スタンレー電気株式会社 Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998019338A1 (en) * 1996-10-30 1998-05-07 Hitachi Chemical Company, Ltd. Chip supporting substrate for semiconductor package, semiconductor device, and method for manufacturing them
JP2007180563A (en) * 2001-02-14 2007-07-12 Fuji Xerox Co Ltd Laser light source
JP2005191373A (en) * 2003-12-26 2005-07-14 Ricoh Co Ltd Semiconductor laser device
JP2006135177A (en) * 2004-11-08 2006-05-25 Sony Corp Semiconductor laser apparatus
JP4609700B2 (en) * 2004-11-08 2011-01-12 ソニー株式会社 Semiconductor laser device
US9494684B2 (en) 2011-12-12 2016-11-15 Murata Manufacturing Co., Inc. Position measurement device
JP2018078135A (en) * 2016-11-07 2018-05-17 スタンレー電気株式会社 Semiconductor device

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