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JPH06151824A - Manufacture of inverse continuity gto thyristor - Google Patents

Manufacture of inverse continuity gto thyristor

Info

Publication number
JPH06151824A
JPH06151824A JP29545192A JP29545192A JPH06151824A JP H06151824 A JPH06151824 A JP H06151824A JP 29545192 A JP29545192 A JP 29545192A JP 29545192 A JP29545192 A JP 29545192A JP H06151824 A JPH06151824 A JP H06151824A
Authority
JP
Japan
Prior art keywords
layer
gto thyristor
conductivity type
gto
conductivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29545192A
Other languages
Japanese (ja)
Inventor
Hideaki Kakigi
秀昭 柿木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP29545192A priority Critical patent/JPH06151824A/en
Publication of JPH06151824A publication Critical patent/JPH06151824A/en
Pending legal-status Critical Current

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  • Thyristors (AREA)

Abstract

PURPOSE:To solve a problem where n<+> region is generated at the layer of a diode part and the amount of inverse recovery resistance is reduced due to the process failure when forming an emitter layer of the GTO part of an inverse continuity GTO thyristor by diffusion. CONSTITUTION:By forming a P<+> layer 12 by diffusion an impurity from the surface of the p layer of a diode part 20 after the diffusion process for forming an n emitter layer 4 of a GTO part 10, n<+> region generated at that part can be collapsed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、GTOサイリスタと同
一半導体基体に逆並列のダイオードを内蔵する逆導通G
TOサイリスタの製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reverse conducting G in which an antiparallel diode is built in the same semiconductor substrate as a GTO thyristor.
The present invention relates to a method of manufacturing a TO thyristor.

【0002】[0002]

【従来の技術】逆導通GTOサイリスタは、GTOサイ
リスタとフリーホィールダイオードを同一半導体基体に
形成したもので、高耐圧、大電流のインバータ、コンバ
ータ、チコッパなどの電力変換装置に用いられる。図2
に従来の逆導通GTOサイリスタの断面構造を示す。図
のように、pnpnの4層構造からなるGTO部10とp
nの2層構造からなるダイオード部20が同一シリコン基
体に集積されている。GTO部10は、pエミッタ層1、
nベース層2、pベース層3、nエミッタ層4からな
り、アノード電極5からカソード電極6の方向に電流が
流れ、その電流はpベース層3上のゲート電極7よりゲ
ート電流を引きぬくことによってしゃ断される。一方ダ
イオード部20は、n層2の延長部とp層3の延長部とよ
りなり、n層2はn+ コンタクト層8を介してアノード
電極5の延長部に接触し、p層3上に設けられたダイオ
ードアノード電極9は、図示しない金属接触板によって
GTO部10のカソード電極6と一体に接触される。この
ようにダイオード20がGTO10に対して逆並列に接続さ
れた構造になっている。なおダイオード部20のn+ 層8
形成の際には、GTO部にも全面に形成し、pエミッタ
層1を選択的に形成することにより、n層2がアノード
電極5に接続されるアノード短絡構造にしてスイッチン
グ速度を早めている。
2. Description of the Related Art A reverse conducting GTO thyristor is a GTO thyristor and a freewheel diode formed on the same semiconductor substrate, and is used in power converters such as high withstand voltage, large current inverters, converters, and chippers. Figure 2
The cross-sectional structure of a conventional reverse conducting GTO thyristor is shown in FIG. As shown in the figure, the GTO section 10 and the p-layer having a four-layer structure of pnpn and p
A diode portion 20 having a two-layer structure of n is integrated on the same silicon substrate. The GTO section 10 includes a p-emitter layer 1,
It is composed of the n base layer 2, the p base layer 3, and the n emitter layer 4, and a current flows in the direction from the anode electrode 5 to the cathode electrode 6, and the current can draw the gate current from the gate electrode 7 on the p base layer 3. Cut off by. On the other hand, the diode part 20 comprises an extension part of the n-layer 2 and an extension part of the p-layer 3, and the n-layer 2 contacts the extension part of the anode electrode 5 through the n + contact layer 8 and is formed on the p-layer 3. The provided diode anode electrode 9 is brought into contact with the cathode electrode 6 of the GTO unit 10 integrally by a metal contact plate (not shown). In this way, the diode 20 is connected in antiparallel to the GTO 10. The n + layer 8 of the diode section 20
At the time of formation, the p-type emitter layer 1 is selectively formed on the entire surface of the GTO portion to form an anode short-circuit structure in which the n layer 2 is connected to the anode electrode 5 to accelerate the switching speed. .

【0003】[0003]

【発明が解決しようとする課題】このような逆導通GT
Oサイリスタを高周波動作させる場合、電流上昇率di/
dtの増大、GTOスナバコンデンサの小容量化によって
ダイオードにかかる責務も大きくなる。図2に示すよう
な構造では、製造工程において、nエミッタ層4の拡散
時に酸化膜剥離等でn+ 拡散領域がダイオード部20のp
ベース層3延長部表面に形成されることがある。このよ
うにn+ 領域がpベース層3の表面に残ると、導通状態
から逆回復しようとするとき、pベース層3表面の高濃
度のn+ 領域に正孔が注入され、npnトランジスタと
して動作し、ダイオードとしての逆回復に遅れが生ず
る。したがって、製造工程でわずかに発生したp層3表
面のn + 領域に電流が集中し、素子破壊につながる。
Such a reverse conduction GT
When operating an O thyristor at high frequency, the current rise rate di /
By increasing dt and reducing the capacity of the GTO snubber capacitor
The responsibility on the diode also increases. As shown in Figure 2
In this structure, diffusion of the n-emitter layer 4 is performed in the manufacturing process.
Sometimes the oxide film peels off+The diffusion area is p of the diode section 20.
It may be formed on the surface of the extension of the base layer 3. This
Sea urchin+When the region remains on the surface of the p base layer 3, it becomes conductive.
When the reverse recovery from the
Degree n+Holes are injected into the region,
It operates as a diode and there is no delay in reverse recovery as a diode.
It Therefore, the p layer 3 surface slightly generated in the manufacturing process
Face n +The current concentrates on the region, which leads to device destruction.

【0004】本発明の目的は、このようなGTO部のゲ
ート電極の接触するベース層の表面に他導電形の領域の
形成されるのを防ぎ、ダイオード部の逆回復耐量の低下
を防止することのできる逆導通GTOサイリスタの製造
方法を提供することにある。
An object of the present invention is to prevent the formation of another conductivity type region on the surface of the base layer in contact with the gate electrode of the GTO portion and prevent the reverse recovery withstand capability of the diode portion from being lowered. It is to provide a method of manufacturing a reverse conducting GTO thyristor capable of performing.

【0005】[0005]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明は、GTOサイリスタ部においては他側に
第二導電形ベース層が隣接する第一導電形ベース層の表
面から不純物を拡散して第二導電形エミッタ層を形成す
る逆導通GTOサイリスタの製造方法において、GTO
サイリスタ部の第二導電形エミッタ層形成後、ダイオー
ド部のpn接合の一方の層となる第一導電形ベース層延
長部の表面層から不純物を拡散して第一導電形の高不純
物濃度層を形成するものとする。そして、第一導電形の
高不純物濃度層を、GTOサイリスタ部を酸化膜からな
るマスクで被覆しての不純物拡散により形成すること、
第二導電形ベース層の表面全面から不純物を導入して第
二導電形の高不純物濃度層を形成し、そのあとGTOサ
イリスタ部の複数個所の表面から不純物を拡散して第一
導電形エミッタ層を形成することが有効である。
In order to achieve the above-mentioned object, the present invention is to remove impurities from the surface of the first conductivity type base layer adjacent to the second conductivity type base layer on the other side in the GTO thyristor portion. A method of manufacturing a reverse conducting GTO thyristor, which comprises diffusing to form a second conductivity type emitter layer, comprising:
After forming the second conductivity type emitter layer of the thyristor part, impurities are diffused from the surface layer of the first conductivity type base layer extension, which is one layer of the pn junction of the diode part, to form a first conductivity type high impurity concentration layer. Shall be formed. And forming a high impurity concentration layer of the first conductivity type by impurity diffusion by covering the GTO thyristor portion with a mask made of an oxide film,
Impurities are introduced from the entire surface of the second-conductivity-type base layer to form a second-conductivity-type high-impurity-concentration layer, and then impurities are diffused from the surfaces of a plurality of GTO thyristor portions to form the first-conductivity-type emitter layer. Is effective.

【0006】[0006]

【作用】第一導電形ベース層の延長部の表面層に第一導
電形の高不純物濃度層を形成することにより、製造工程
不良により発生したダイオード部第一導電形層の表面層
の第二導電形領域を消滅させて逆回復時の電流集中を防
ぐ。
By forming a high impurity concentration layer of the first conductivity type on the surface layer of the extension of the first conductivity type base layer, the second surface layer of the first conductivity type layer of the diode portion caused by the manufacturing process failure The conductivity type region is eliminated to prevent current concentration during reverse recovery.

【0007】[0007]

【実施例】図1(a) 〜(d) は本発明の一実施例の製造工
程の一部を示し、図2と共通の部分には同一の符号が付
されている。先ず、nベース層となるn形シリコン基板
2の一面から不純物を拡散してpベース層3を拡散し、
次いでそのpベース層3のGTO部となる領域の表面の
複数個所からSiO2 膜マスクを用いて選択的に不純物を
拡散し、nエミッタ層4を形成する。このときマスクの
欠陥からダイオード部のp層3にn+ 領域41が生じたと
する。また他面から異なる不純物を拡散してダイオード
コンタクト層となるn+ 層8を形成する〔同図(a) 〕。
次いで、両面をSiO2 膜11で被覆する〔同図(b) 〕。そ
のあと、SiO2 膜11をマスクして表面から不純物を導入
し、ダイオード部20のpベース層3の表面層に表面不純
物濃度1×1019 atoms/cm3 のp+ 層12を形成し、GT
O部10の裏面のn+ 層8を貫通するpエミッタ層1を形
成する〔同図(c) 〕。これにより、ダイオード部には、
製造工程不良によって生じたn+ 領域41をつぶすp+
12が形成され、GTO部にはアノード短絡構造ができ上
がる。p+ 層12は、ダイオードアノード電極9の接触の
オーム性確保にも役立つ。
1 (a) to 1 (d) show a part of the manufacturing process of an embodiment of the present invention, and the same parts as those in FIG. 2 are designated by the same reference numerals. First, impurities are diffused from one surface of the n-type silicon substrate 2 to be the n-base layer to diffuse the p-base layer 3.
Next, the n emitter layer 4 is formed by selectively diffusing the impurities from a plurality of portions of the surface of the region of the p base layer 3 which will be the GTO portion using a SiO 2 film mask. At this time, it is assumed that the n + region 41 is generated in the p layer 3 of the diode portion due to the defect of the mask. Further, different impurities are diffused from the other surface to form an n + layer 8 serving as a diode contact layer [(a) in the same figure].
Then, both surfaces are covered with the SiO 2 film 11 [FIG. After that, the SiO 2 film 11 is masked and impurities are introduced from the surface to form a p + layer 12 having a surface impurity concentration of 1 × 10 19 atoms / cm 3 on the surface layer of the p base layer 3 of the diode portion 20, GT
A p-emitter layer 1 is formed so as to penetrate the n + layer 8 on the back surface of the O portion 10 [FIG. As a result, the diode section
P + layer that crushes n + region 41 caused by defective manufacturing process
12 is formed, and an anode short circuit structure is completed in the GTO part. The p + layer 12 also helps ensure the ohmic contact of the diode anode electrode 9.

【0008】図3は図1と同様の工程で作製されたが、
nエミッタ層4をセグメントに形成した本発明の実施例
の逆導通形GTOサイリスタである。
Although FIG. 3 was manufactured in the same process as FIG. 1,
It is a reverse conducting GTO thyristor according to an embodiment of the present invention in which an n emitter layer 4 is formed in a segment.

【0009】[0009]

【発明の効果】本発明によれば、逆導通形GTOサイリ
スタのダイオード部に高不純物濃度のコンタクト層を形
成して電極を接触させることにより、GTO部エミッタ
層形成時にダイオード部表面層に生ずる他導電形の領域
を消滅させその領域への電流集中による逆回復耐量の低
下を防止することができた。
According to the present invention, a contact layer having a high impurity concentration is formed in the diode portion of the reverse conducting GTO thyristor and the electrodes are brought into contact with each other. It was possible to eliminate the conductivity type region and prevent the reverse recovery withstand capability from decreasing due to current concentration in that region.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の逆導通GTOサイリスタの
製造工程の一部を(a) ないし(d) の順に示す断面図
FIG. 1 is a sectional view showing a part of a manufacturing process of a reverse conducting GTO thyristor according to an embodiment of the present invention in the order of (a) to (d).

【図2】従来の逆導通GTOサイリスタの断面図FIG. 2 is a cross-sectional view of a conventional reverse conducting GTO thyristor.

【図3】本発明の別の実施例の逆導通GTOサイリスタ
の断面図
FIG. 3 is a sectional view of a reverse conducting GTO thyristor according to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 pエミッタ層 2 nベース層 3 pベース層 4 nエミッタ層 5 GTOアノード電極 6 GTOカソード電極 7 GTOゲート電極 8 n+ 層 9 ダイオードアノード電極 10 GTO部 11 SiO2 膜 12 p+ 層 20 ダイオード部1 p emitter layer 2 n base layer 3 p base layer 4 n emitter layer 5 GTO anode electrode 6 GTO cathode electrode 7 GTO gate electrode 8 n + layer 9 diode anode electrode 10 GTO part 11 SiO 2 film 12 p + layer 20 diode part

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】GTOサイリスタ部においては他側に第二
導電形ベース層が隣接する第一導電形ベース層の表面か
ら不純物を拡散して第二導電形エミッタ層を形成する逆
導通GTOサイリスタの製造方法において、GTOサイ
リスタ部の第二導電形エミッタ層形成後、ダイオード部
のpn接合の一方の層となる第一導電形ベース層延長部
の表面層から不純物を拡散して第一導電形の高不純物濃
度層を形成することを特徴とする逆導通GTOサイリス
タの製造方法。
1. A reverse conducting GTO thyristor for forming an emitter layer of a second conductivity type by diffusing impurities from the surface of a first conductivity type base layer adjacent to the second conductivity type base layer on the other side in the GTO thyristor portion. In the manufacturing method, after the second conductivity type emitter layer of the GTO thyristor part is formed, impurities are diffused from the surface layer of the first conductivity type base layer extension part which is one layer of the pn junction of the diode part to diffuse the impurities of the first conductivity type. A method of manufacturing a reverse conducting GTO thyristor, which comprises forming a high impurity concentration layer.
【請求項2】第一導電形の高不純物濃度層を、GTOサ
イリスタ部を酸化膜からなるマスクで被覆しての不純物
拡散により形成する請求項1記載の逆導通GTOサイリ
スタの製造方法。
2. The method for manufacturing a reverse conducting GTO thyristor according to claim 1, wherein the high-concentration impurity layer of the first conductivity type is formed by impurity diffusion by covering the GTO thyristor portion with a mask made of an oxide film.
【請求項3】第二導電形ベース層の表面全面から不純物
を導入して第二導電形の高不純物濃度層を形成し、その
あとGTOサイリスタ部のその第二導電形層の複数個所
の表面から不純物を拡散して第一導電形エミッタ層を形
成する請求項1あるいは2記載の逆導通GTOサイリス
タの製造方法。
3. An impurity is introduced from the entire surface of the second-conductivity-type base layer to form a second-conductivity-type high-impurity-concentration layer, and then surfaces of a plurality of the second-conductivity-type layers of the GTO thyristor portion. 3. The method for manufacturing a reverse conducting GTO thyristor according to claim 1, wherein impurities are diffused from the first conductive type emitter layer to form a first conductive type emitter layer.
JP29545192A 1992-11-05 1992-11-05 Manufacture of inverse continuity gto thyristor Pending JPH06151824A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29545192A JPH06151824A (en) 1992-11-05 1992-11-05 Manufacture of inverse continuity gto thyristor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29545192A JPH06151824A (en) 1992-11-05 1992-11-05 Manufacture of inverse continuity gto thyristor

Publications (1)

Publication Number Publication Date
JPH06151824A true JPH06151824A (en) 1994-05-31

Family

ID=17820761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29545192A Pending JPH06151824A (en) 1992-11-05 1992-11-05 Manufacture of inverse continuity gto thyristor

Country Status (1)

Country Link
JP (1) JPH06151824A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109075211A (en) * 2016-04-25 2018-12-21 三菱电机株式会社 Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109075211A (en) * 2016-04-25 2018-12-21 三菱电机株式会社 Semiconductor device

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