JPH06151290A - Manufacture of charged particle exposure mask - Google Patents

Abstract

PURPOSE:To provide an improved method of manufacturing a charged particle exposure mask, wherein an etching process is simplified by limiting the types of optimal conditions under which block patterns different from each other in area are formed on a silicon substrate of thin film to a few and time surface of the mask is prevented from being charged up with static electricity when a block mask is formed by the use of an SOI substrate. CONSTITUTION:Provided that the total area of through-hole patterns 24 and a predetermined reference area are represented by S and S0 respectively, and when S0 is larger than S, an auxiliary pattern 15 whose area of S is so set as to satisfy a formula, S=S0-S, is provided to the peripheral region of the through-hole pattern 24, or when S0 is smaller than S, an island-shaped residual pattern whose area of S is so set as to satisfy a formula, S=S-S0, is provided inside the through-hole patterns 24, and then an etching process is carried out.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improved method of manufacturing a charged particle exposure mask.

In recent years, with the increase in density of integrated circuits, exposure by a charged particle beam such as an electron beam or an ion beam, or a new exposure by using X-rays has been performed instead of the photolithography method which has been a mainstream for forming fine patterns for many years. Methods have been studied and are being put to practical use. Of these, electron beam exposure that forms a pattern using an electron beam is
Since the beam itself can be narrowed down to a size of several Å, it has a great feature that a fine pattern of 1 μm or less can be created. However, since electron beam exposure is a so-called "one-stroke writing" drawing method, the finer the pattern, the smaller the beam must be exposed, and the exposure time becomes very long.

In order to solve this problem, a stencil mask (hereinafter referred to as a block mask) having a block pattern consisting of a plurality of transmission hole patterns corresponding to various patterns repeatedly appearing in the exposure pattern is provided in the exposure apparatus. A block exposure method has been proposed in which a desired block pattern is selected from them, and an electron beam having a large beam diameter is irradiated to generate a shaped beam for exposure. The present invention relates to a method for manufacturing a charged particle exposure mask used in this block exposure method.

[0004]

2. Description of the Related Art Several methods have been proposed as a method for manufacturing a charged particle exposure mask, and one example of them has been described below.

As shown in FIG. 3A, _two silicon substrates 1 and 3 are bonded to each other with an SiO ₂ insulating layer 2 in between, and one silicon substrate 1 is thinned to form a silicon on insulator (SOI) substrate. Form.

As shown in FIG. 3B, a SiO ₂ film 4 is formed on the thinned silicon substrate 1, and then a SiN film 5 is formed on the entire surface.

As shown in FIG. 4A, an opening 6 is formed in the SiN film 5 on the thick silicon substrate 3 by using a dry etching method, and then the silicon substrate 3 is etched by using KOH. To do. At this time, the SiO ₂ layer 2 functions as an etching stopper.

As shown in FIG. 4B, after removing the SiN film 5 using phosphoric acid, the SiO ₂ film 4 is patterned using a dry etching method to form an opening 7 in the block pattern forming region. Form.

As shown in FIG. 5A, the thinned silicon substrate 1 is dry-etched using the SiO ₂ film 4 as a protective film to form a block pattern 8 on the thinned silicon substrate 1. .

As shown in FIG. 5B, the SiO ₂ film 4 and the exposed SiO ₂ insulating layer 2 are removed using hydrofluoric acid.

Not only the above manufacturing method but also a block mask having a through hole, a dry etching step for forming the through hole 8 in the thinned silicon substrate 1 is required. The thickness of the silicon substrate 1 thinned here is generally 15 to 20 μm in consideration of strength and the like. On the other hand, the thickness of the SiO ₂ film 4 used as a protective film for dry etching should be as thick as possible, but there is a limit to the coating thickness of the resist film used to form the opening 7 in the SiO ₂ film 4. Considering this, there is no choice but to set the thickness to about 1 μm.

Therefore, the selection ratio of SiO ₂ to silicon in the dry etching process for forming the through holes 8 in the thinned silicon substrate 1 must be 15 to 20 or more. There are several possible etching gases that satisfy this condition, but it is considered that the etching rate is high and that the etching shape is barrel type instead of taper type is convenient as a mask for beam shaping. Hydrogen (HBr) and the like are the most influential.

[0013]

By the way, when etching silicon, a phenomenon called black silicon may occur in which foreign matter is deposited on the etching surface during the etching and the etching does not proceed.
HBr is a gas in which this phenomenon is most likely to occur.

Although the cause of generation of black silicon has not been determined yet, its generation tends to depend on the size of the area of the pattern to be etched on the substrate, and if the total area of the pattern to be etched is different, Optimal etching conditions for black silicon generation will change. Therefore, to etch multiple substrates with different total areas of the patterns to be etched so that black silicon does not occur, the amount of etching gas, etching chamber pressure, substrate temperature, etc. should be adjusted according to the total area of the patterns. It is necessary to change the etching conditions for each. As a method, several kinds of reference pattern areas are selected in advance, the optimum condition corresponding to each reference pattern area is experimentally obtained, and when actually etching a substrate having various pattern areas, the pattern area is A method is conceivable in which a reference pattern having an area closest to is selected and etching is performed using etching conditions corresponding to the reference pattern. However, there is a considerable difference in the area of the patterns that are etched by the substrate, so it is necessary to select the worst + several types of reference patterns and find the etching conditions corresponding to them in order to cover all of them. Not relevant. what if,
Even if the conditions are required, it is difficult to use them properly in mass production.

On the other hand, when a block mask is manufactured using an SOI substrate in which two silicon substrates 1 and 3 are bonded together via an insulating layer 2, the two silicon substrates are insulated from each other. When the silicon substrate 1, which has been thinned to a thickness of about 20 μm and has a high resistance value, is irradiated with an electron beam, there is no escape route for electric charges, so that the mask surface is easily charged up.

An object of the present invention is to eliminate this drawback and to suppress the kinds of optimum etching conditions when forming block patterns having different areas on a thinned silicon substrate to simplify the etching process. Another object of the present invention is to provide a method of manufacturing a charged particle exposure mask that prevents charge-up from occurring on the mask surface when a block mask is formed using an SOI substrate.

[0017]

The above object can be achieved by any of the following means.

The first means is to thin a partial region of a silicon substrate and to form a plurality of through hole patterns (24) corresponding to a part of an integrated circuit on the thinned silicon substrate (12). In the method of manufacturing a mask for particle exposure,
Difference Δ between the total area S of the plurality of transmission hole patterns (24) and a predetermined reference area S ₀ (where S ₀ > S)
S = S ₀ −S is calculated, and the auxiliary pattern (15) having the same area as the difference ΔS is formed into the thinned silicon substrate (1
2) A method of manufacturing a charged particle exposure mask formed in the peripheral region.

The second means is to manufacture a mask for charged particle exposure in which a partial region of a silicon substrate is thinned and a plurality of through hole patterns corresponding to a part of an integrated circuit are formed on the thinned silicon substrate. In the method, the silicon substrate is divided into a plurality of compartments, and for each of the divided compartments, a plurality of transmission hole patterns (19a or 19b or 19c or 19d) formed in the compartments.
Of the total area S'and a predetermined reference area S ₀ '(however,
S ₀ '>S') difference ΔS '= S ₀ ' -S 'is calculated, and the auxiliary pattern (20a or 20b or 20c or 20d) having the same area as the difference ΔS' is calculated in each of the sections. Thinned silicon substrate (17a or 1
7b or 17c or 17d) is a method for manufacturing a charged particle exposure mask formed in the peripheral region.

The two silicon substrates (1 and 3) are adhered to each other via the insulating layer (2) to make one silicon substrate (1) into a thin film, and to the thinned silicon substrate (1). A through hole pattern (8) using the method for manufacturing a charged particle exposure mask according to the first means or the second means.
And the auxiliary pattern (10) are formed, the conductive material (20) is deposited on the inner surface of the auxiliary pattern (10) to bring the two silicon substrates (1, 3) into a conductive state. , It is possible to prevent charge-up.

When it is found that black silicon is generated when the total area S of a plurality of transmission hole patterns becomes larger than a certain size Slimit, a mask having a total area S of transmission hole patterns larger than Slimit is used. Means that etching cannot be performed by the above means, which causes a problem that the number and area of the transmission hole patterns arranged on the mask are limited. The solution to this problem is achieved by the following third to fifth means.

A third means is to thin a partial region of a silicon substrate and to form a plurality of through hole patterns (24) corresponding to a part of an integrated circuit on the thinned silicon substrate (12). In the method of manufacturing a mask for particle exposure,
A difference ΔS = S−S ₀ between the total area S of the plurality of transmission hole patterns (24) and a predetermined reference area S ₀ (where S ₀ <S) is calculated, and this difference ΔS A plurality of island-shaped remaining patterns (23) having the same total area as the above are formed inside the plurality of through hole patterns (24) and used as etching through hole patterns (22). This is a method of manufacturing a charged particle exposure mask for forming individual transmission hole patterns (24).

The fourth means is to thin a partial region of the silicon substrate and to form a plurality of through hole patterns (24) corresponding to a part of the integrated circuit on the thinned silicon substrate (12). In the method of manufacturing a mask for particle exposure,
Let S be the total area of the plurality of transmission hole patterns (24), and a predetermined reference area be S ₀ (where S ₀ <S).
As a similar pattern, a similar pattern in which the areas of the plurality of transmission hole patterns (24) are each reduced by [1- (S ₀ / S)] times is created, and the transmission hole pattern (24) and the similar pattern are Figure (total area S ₀ /
A method for manufacturing a charged particle exposure mask, wherein S) is used as an etching through hole pattern (22) to form the plurality of through hole patterns (24).

A fifth means is to charge a thin film on a partial region of the silicon substrate and to form a plurality of through hole patterns (24) corresponding to a part of an integrated circuit on the thinned silicon substrate (12). In the method of manufacturing a mask for particle exposure,
A value S ₀ / which is obtained by calculating the total length L of the peripheral sides of the plurality of transmission hole patterns (24) and dividing the predetermined reference area S ₀ by the total length L of the peripheral sides. The plurality of transmission hole patterns (24) having the strip pattern having a width L
Is a method for manufacturing a charged particle exposure mask, wherein the plurality of transmission hole patterns (24) are formed inside the contour of the mask and are used as etching transmission hole patterns (22).

[0025]

In the first and second means, the auxiliary pattern is formed in addition to the originally required block pattern, so that the total area of the pattern to be etched on the substrate is integrated into one or several kinds of reference areas. Therefore, the etching conditions to be optimized can be suppressed to one kind or several kinds.

If the substrate is divided into a plurality of sections and the auxiliary pattern is formed so that the total area of the block pattern and the area of the auxiliary pattern are equal in each section, the distribution density of the pattern to be etched is reduced. Averaging on the substrate and local generation of black silicon is prevented.

In the case of manufacturing the mask using an SOI substrate, a conductive material is deposited on the inner surface of the auxiliary pattern so that the conductive pattern is attached to the inner surface of the auxiliary pattern through the insulating layer.
The silicon substrates are brought into conduction, and charge-up on the mask surface is prevented.

In the third to fifth means, the total area of the etching through hole patterns 22 is a plurality of through hole patterns 24 by forming an island-shaped remaining pattern.
Is smaller than the total area S and can be arbitrarily set. Therefore, the etching area can be selected so that black silicon is not generated during etching, and the problem that the number and area of the transmission hole patterns are limited is avoided. Also, the remaining pattern 2
Since 3 is formed in an island shape, when the etching through hole pattern 22 is penetrated by etching, the remaining pattern 23 is removed at the same time, so that an extra unetched portion remains in the through hole pattern. There is no. On the contrary, an unnecessary pattern does not occur on the mask substrate.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a charged particle exposure mask according to an embodiment of the present invention will be described below with reference to the drawings.

First Example See FIG. 4 (a) The same steps as in the prior art are performed to form the shape shown in FIG. 4 (a).

See FIG. 6A. The SiN film 5 is removed using phosphoric acid, and dry etching is performed.
SiO using the ₂Pattern the membrane 4 and
An opening 7 is formed in the pattern formation area to form an auxiliary pattern.
The opening 9 is formed in the formed region. Block pattern type
Area of opening 7 in the formation area and opening 9 in the auxiliary pattern formation area
Is the reference area S₀To be equal to
The size of the opening 9 in the auxiliary pattern formation region is determined.

See FIG. 6B. The thinned silicon substrate 1 is dry-etched by using the SiO ₂ film 4 as a protective film to dry the thinned silicon substrate 1.
Then, the block pattern 8 and the auxiliary pattern 10 are formed.

Referring to FIG. 7A, the SiO ₂ film 4 and the exposed SiO ₂ insulating layer 2 are removed using hydrofluoric acid. As a result, the block pattern 8 is formed on the thinned silicon substrate 1, and the auxiliary pattern 10 is formed in the peripheral region thereof.

FIG. 1 is a plan view of the block mask. In the figure,
Reference numeral 11 is a silicon substrate, 12 is a thinned region of the silicon substrate, 13 is a non-thinned region, 14 is a block pattern composed of a plurality of through hole patterns 24, and 15 is an auxiliary pattern. Is. The area of the auxiliary pattern 15 is selected so that the total area of the block pattern 14 and the area of the auxiliary pattern 15 becomes the reference area S ₀ .

Second Example See FIG. 2. A silicon substrate is divided into a plurality of compartments, for example, four compartments 16a.
It is divided into 16b, 16c, and 16d. 4 sections 16a
16b, 16c, and 16d are composed of thinned regions 17a, 17b, 17c, and 17d and non-thinned regions 18a, 18b, 18c, and 18d, respectively. Thinned regions 17a, 17b, 17c, 17d
Include block patterns 19a
19b, 19c, 19d are formed, also, on the thick film region 18a, 18b, 18c, 18 d, different auxiliary patterns 20a, 20b, 20c of each size,
20d is formed. In this example, the area of the auxiliary pattern is changed by increasing or decreasing the number of rectangular patterns having the same size, but this method is not always necessary. The total area of the block pattern and the auxiliary pattern in each section is equal to each other, and the total area of the block pattern and the auxiliary pattern in all the sections is equal to the reference area S ₀ . Select the area.

Third Example See FIG. 7 (b) When a conductive material 21 such as tungsten, tantalum, gold, etc. is deposited on the block mask shown in FIG. 7 (a), as shown in FIG. 7 (b), SiO 2 is formed. _{2 The} upper and lower two silicon substrates 1 and 3, which are insulated from each other with the insulating layer 2 sandwiched therebetween, are brought into conduction by the conductive substance 21 deposited on the inner surface of the auxiliary pattern 10 and are irradiated on the block mask when the charged particle beam is irradiated. It is possible to prevent the charge-up from occurring.
It is not necessary to remove the conductive substance deposited on the thinned silicon substrate 1. This is because it has an effect of substantially reducing the resistance value of the silicon substrate 1 which has been thinned and has a large resistance value, and also has an effect of preventing charge-up.

Fourth Example Referring to FIG. 8, 11 is a silicon substrate, 12 is a thinned region of the silicon substrate, and 14 is a block pattern consisting of a plurality of through hole patterns 24. The hatched area 22 is a through hole pattern for etching,
An island-shaped remaining pattern 23 exists inside thereof. The combination of the etching through hole pattern 22 and the island-shaped remaining pattern 23 corresponds to the shape of the through hole pattern 24 formed after etching. Since the total area of the etching through hole patterns 22 may be equal to the reference area S ₀ , a plurality of island-shaped remaining patterns 23 may exist inside one transmitting hole pattern 24, or none of them may exist. There may be.

Fifth Example See FIG. 9 FIG. 9A shows the pattern of the through holes to be formed. FIG. 2B shows an auxiliary pattern obtained by reducing the transmission hole pattern shown in FIG. 1A by [1- (S ₀ / S)] times. FIG. 6C shows an etching transmission hole pattern (hatched portion) created by subtracting the auxiliary pattern from the transmission hole pattern.

FIG. 10 shows the block pattern 14 formed of the etching through hole pattern 22 formed by the method shown in FIG. 9 formed in the thinned region in the substrate of the block mask. In this case, the island-shaped remaining pattern 23 does not need to be accurately located at the center of the transmission hole pattern 24. Therefore, the band width of the etching through hole pattern 22 is not generally constant.

Sixth Example See FIG. 11 The total length L of the sides around the plurality of transmission hole patterns 24 is defined as one side, and S ₀ / L (S ₀ is a reference area) is defined as the other side orthogonal thereto. In this method, the rectangle is divided, and the rectangle is divided in proportion to the length of the side around each of the transmission hole patterns and is distributed to each of the transmission hole patterns 24. That is, a band-shaped pattern having a constant width (S ₀ / L) is formed as the etching pattern 22 inside the contour of each transmission hole pattern 24.
According to this method, the band width of the etching pattern 22 is constant at any place. Further, it is not necessary to take the total opening area S of the transmission hole pattern 24 into consideration. Since the band width of the band-shaped pattern does not take into consideration the overlapping portion when it is arranged inside the outline of each transmission hole pattern 24, the width (S ₀
/ L), the total area of the etching pattern 22 is less than the reference area S ₀ , but since this error is an amount that does not pose a problem for etching, there is no problem in practice. When it is desired to exactly match the areas, the band width may be calculated in consideration of the overlapping portion.

[0041]

As described above, in the method of manufacturing a charged particle exposure mask according to the present invention, the size of the etching area can be adjusted to the reference area where black silicon does not occur. If 1 to several types are selected, the etching conditions depending on the etching area can be suppressed to one to several types, and the etching process can be simplified. Further, when forming the auxiliary pattern, it is possible to prevent charge-up on the mask surface by depositing a conductive material on the inner surface.

[Brief description of drawings]

FIG. 1 is a plan view of a charged particle exposure mask.

FIG. 2 is a plan view of a charged particle exposure mask.

FIG. 3 is a manufacturing process diagram of a charged particle exposure mask according to a conventional technique.

FIG. 4 is a manufacturing process diagram of a charged particle exposure mask according to a conventional technique.

FIG. 5 is a manufacturing process diagram of a mask for charged particle exposure according to a conventional technique.

FIG. 6 is a manufacturing process diagram of a charged particle exposure mask according to the present invention.

FIG. 7 is a manufacturing process diagram of the charged particle exposure mask according to the present invention.

FIG. 8 is a plan view showing a shape of a through hole pattern for etching.

FIG. 9 is an explanatory diagram of a method of forming a through hole pattern shape for etching.

FIG. 10 is a plan view showing a shape of a through hole pattern for etching.

FIG. 11 is a plan view showing the shape of a through hole pattern for etching.

[Explanation of symbols]

1 Thinned Silicon Substrate 2 Insulating Layer 3 Silicon Substrate 4 SiO ₂ Film 5 SiN Film 6, 7, 9 Opening 8 Block Pattern 10 Auxiliary Pattern 11 Silicon Substrate 12 Thinned Area 13 Non-Thinned Area 14 Block Pattern 15 Auxiliary pattern 16a, 16b, 16c, 16d Divided sections 17a, 17b, 17c, 17d Thinned area 18a, 18b, 18c, 18d Non-thinned area 19a, 19b, 19c, 19d Block pattern 20a, 20b, 20c 20d auxiliary pattern 21 conductive material 22 through-hole pattern for etching 23 island-shaped remaining pattern 24 through-hole pattern

Claims (6)

[Claims] 1. A thin film is formed on a partial region of a silicon substrate, and a part of an integrated circuit is formed on the thinned silicon substrate (12).
Which forms a plurality of through hole patterns (24) corresponding to
In the method of manufacturing a mask for exposure to electric particles, the total area S of the plurality of transmission hole patterns (24) and
Defined reference area S ₀(However, S₀> S) Difference △
S = S₀-S is calculated, and an auxiliary pattern having the same area as the difference ΔS is calculated.
The thinned silicon substrate (12)
For exposing charged particles characterized by being formed in the peripheral area of
Mask manufacturing method. 2. A method for manufacturing a charged particle exposure mask, comprising forming a thin film on a partial region of a silicon substrate and forming a plurality of through hole patterns corresponding to a part of an integrated circuit on the thinned silicon substrate, The silicon substrate is divided into a plurality of compartments, and for each of the divided compartments, the total area S ′ of the plurality of transmission hole patterns (19a or 19b or 19c or 18d) formed in the compartments is predetermined. Difference ΔS 'with reference area S ₀ ' (however, S ₀ '>S')
= S ₀ '-S' is calculated, and an auxiliary pattern (20a or 20b or 20c or 20) having the same area as the difference ΔS 'is calculated.
d) is formed in a peripheral region of the thinned silicon substrate (17a or 17b or 17c or 17d) in each of the sections, and a method for manufacturing a charged particle exposure mask. 3. Two silicon substrates (1, 3) are adhered via an insulating layer (2), one silicon substrate (1) is made into a thin film, and the thinned silicon substrate (1) is formed. Claim 1 or 2
Forming a through hole pattern (8) and an auxiliary pattern (10) using the method for manufacturing a charged particle exposure mask described above, and depositing a conductive material (20) on the inner surface of the auxiliary pattern (10). A method for manufacturing a charged particle exposure mask, comprising: 4. A thin film is formed on a partial region of a silicon substrate, and a part of an integrated circuit is formed on the thinned silicon substrate (12).
Which forms a plurality of through hole patterns (24) corresponding to
In the method of manufacturing a mask for exposure to electric particles, the total area S of the plurality of transmission hole patterns (24) and
Defined reference area S ₀(However, S₀Difference from <S) △
S = S-S₀And the total area is equal to the difference ΔS.
A plurality of island-shaped remaining patterns (23)
Form inside the hole pattern (24) and etch it
A plurality of through holes patterns (22) for
A load characterized by forming a through hole pattern (24)
A method for manufacturing a mask for exposure to charged particles. 5. A charged particle exposure mask for forming a thin film on a partial region of a silicon substrate and forming a plurality of through hole patterns (24) corresponding to a part of an integrated circuit on the thinned silicon substrate (12). In the manufacturing method, the total area of the plurality of transmission hole patterns (24) is S, and a predetermined reference area is S ₀ (where S ₀ <S).
As a result, a similar pattern in which the areas of the plurality of transmission hole patterns (24) are each reduced by [1- (S ₀ / S)] times is created, and the difference between the transmission hole pattern (24) and the similar pattern is calculated. A method for manufacturing a charged particle exposure mask, characterized in that the plurality of transmission hole patterns (24) are formed by using corresponding figures (total area S ₀ / S) as etching transmission hole patterns (22). . 6. A charged particle exposure mask for forming a thin film on a partial region of a silicon substrate and forming a plurality of through-hole patterns (24) corresponding to a part of an integrated circuit on the thinned silicon substrate (12). In the manufacturing method, the total length L of the peripheral sides of the plurality of transmission hole patterns (24) is calculated, and a predetermined reference area S ₀ is divided by the total length L of the peripheral sides. A band-shaped pattern having a width of S ₀ / L is generated inside the contours of the plurality of transmission hole patterns (24) and is used as an etching transmission hole pattern (22). 24) The method for manufacturing a charged particle exposure mask according to claim 24.