JPH06125102A - Solar battery - Google Patents

Abstract

PURPOSE:To enable effective absorption of incident light and to improve productivity of a solar battery. CONSTITUTION:This amorphous silicon solar battery 10 is different from a conventional amorphous silicon solar battery in respects that irregularities are formed on a surface (a surface at the side of an n-layer 14) of an oxide semiconductor layer 13 and that height difference between a top and a bottom of the irregularities is from 1000 to 5000Angstrom . That is, in the amorphous silicon solar battery 10, a surface of a lower electrode 12 is smooth and light confinement is performed by forming irregularities on a surface of the oxide semiconductor layer 13. Meanwhile, suitable height of irregularities (height difference between a top and a bottom thereof) on a surface of the oxide semiconductor layer 13 for most effective light confinement is 1000 to 5000Angstrom .

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell, and more particularly to a solar cell including an oxide semiconductor layer, a photovoltaic layer, an upper electrode and a metal electrode, which are sequentially laminated on a substrate.

[0002]

Description of the Related Art A solar cell, which is a photoelectric conversion element for converting light energy of sunlight into electric energy, has been attracting attention as a power generation means in place of petroleum energy. In particular, amorphous silicon solar cells are expected to be capable of producing large-area and low-cost solar cells. Among the element structures of amorphous silicon solar cells, the pin type element structure is most practically used.

FIG. 5 is a schematic sectional view showing a conventional example of an amorphous silicon solar cell having a pin type element structure.

The amorphous silicon solar cell 50 shown in FIG. 5 is disclosed in US Pat. No. 4,419,533, and includes a substrate 51 and a lower electrode 52 laminated on the substrate 51. An oxide semiconductor layer 53 stacked on the lower electrode 52, an n layer 54 stacked on the oxide semiconductor layer 53, and an i layer 55 stacked on the n layer 54.
A p layer 56 laminated on the i layer 55, an upper electrode 57 laminated on the p layer 56, and a metal electrode 58 laminated on the upper electrode 57. Here, the n layer 54 and the i layer 5
5 and the p layer 56 form a photovoltaic layer.

In the amorphous silicon solar cell 50, the incident light incident from the metal electrode 58 side is the i layer 55.
However, a part thereof reaches the substrate 51 without being absorbed by the i layer 55. Therefore, it is necessary that a part of the incident light that has reached the substrate 51 is reflected again by the substrate 51 and absorbed by the i layer 55. Therefore, a part of the incident light transmitted through the i layer 55 is partially converted into the surface of the lower electrode 52 (the oxide semiconductor layer 53).
The irregularity is provided by the unevenness provided on the side surface), and a part of the incident light is re-incident on the i layer 55 so that the i layer 55 can efficiently absorb the incident light. Note that in order to improve the contact between the lower electrode 52 and the n layer 54, the oxide semiconductor layer 53 in which unevenness is formed on the front surface (the surface on the n layer 54 side) and the back surface (the surface on the lower electrode 52 side) is the lower portion. It is provided on the electrode 52.

[0006]

However, in the above-described conventional amorphous silicon solar cell 50, since the lower electrode 52 is formed by the sputtering method or the like, there is a problem that the productivity is lowered due to the following reasons. (1) In order to form irregularities on the surface of the lower electrode 52, it is necessary to form a film at a high temperature as a preparation condition. (2) In order to roughen the surface, the lower electrode 5 is used depending on the surface roughness.
It is necessary to increase the thickness of 2.

An object of the present invention is to provide a solar cell capable of efficiently absorbing incident light and improving productivity.

[0008]

The solar cell of the present invention is a solar cell including a lower electrode, an oxide semiconductor layer, a photovoltaic layer, an upper electrode and a metal electrode, which are sequentially laminated on a substrate, and the oxidation is performed. Unevenness is formed on the surface of the semiconductor layer, and the height difference between the peaks and valleys of the unevenness is from 1000Å to 50
It is 00Å.

Here, the oxide semiconductor layer may be made of zinc oxide.

Further, the oxide semiconductor layer may be formed by a coating method or a plasma CVD method.

[0011]

In the solar cell of the present invention, the height difference between the peak and the valley is 10
By forming the unevenness of 00Å to 5000Å on the surface of the oxide semiconductor layer, light can be effectively confined without forming the unevenness on the surface of the lower electrode.

[0012]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic sectional view of an amorphous silicon solar cell showing an embodiment of the solar cell of the present invention.

The amorphous silicon solar cell 10 of this embodiment has a surface of the oxide semiconductor layer 13 (a surface on the side of the n layer 14).
The conventional amorphous silicon solar cell 50 shown in FIG. 5 differs from the conventional amorphous silicon solar cell 50 in that irregularities are formed on the surface and the height difference between the peaks and valleys of the irregularities is 1000Å to 5000Å. That is, the conventional amorphous silicon solar cell 5
At 0, light is confined by irregularly reflecting incident light by the irregularities formed on the surface of the lower electrode 52, whereas in the amorphous silicon solar cell 10 of the present embodiment, the surface of the lower electrode 12 is Light is confined by being smooth and forming unevenness on the surface of the oxide semiconductor layer 13. Note that in order to confine light most effectively, the height difference (hereinafter, referred to as “height”) between the peaks and valleys of the unevenness on the surface of the oxide semiconductor layer 13 is 1.
000Å to 5000Å are suitable.

Next, the amorphous silicon solar cell 10
Each of the components will be described.

(1) Substrate 11 The substrate 11 may be conductive or insulative, but when a metal is used, it is a material that is industrially stably supplied and is inexpensive and easy to process, such as stainless steel or aluminum. Are preferred. Further, as the size of the substrate 11,
The size may be about 30 cm square. However, in the case of continuous production of solar cells such as roll-to-roll, a long continuous substrate is preferable, and it is necessary to be able to wind the substrate into a roll. It is desirable to be flexible, and the thickness of the substrate is preferably about 100 μm to 1 mm. Furthermore, when an insulating substrate is used, glass or ceramics is preferable from the viewpoint of heat resistance and workability.

In order to efficiently reflect mainly long-wavelength incident light that cannot be absorbed by the i-layer 15 on the surface of the substrate 11, it is necessary to increase the reflectance of the surface of the substrate 11. Therefore, when the substrate 11 is metallic, the surface of the substrate 11 is made smooth by performing mechanical polishing or electrolytic polishing as desired. Alternatively, a metal having a high reflectance such as Ag or Al may be deposited on the surface of the substrate 11 by a method such as vapor deposition. In this case,
The vapor deposition layer can also be used as the lower electrode 12. On the other hand, when the substrate 11 is insulative, a metal electrode is required as the reflective layer and the lower electrode 12, and the metal described above is preferably used as the metal electrode.

(2) Lower electrode 12 If the substrate 11 is metallic, it is not necessary.

(3) Oxide Semiconductor Layer 13 The oxide semiconductor layer 13 has the following three functions. (A) The substrate 11 absorbs incident light that is not completely absorbed by the i layer 15.
The function of increasing the photoelectric conversion efficiency by transmitting the reflected light to the surface of the substrate 11 and then absorbing the reflected light again in the i layer 15. (B) The function of the barrier layer to prevent current leakage when a pinhole is generated in the photovoltaic layer. (C) When a metal such as Ag or Al used as the lower electrode 12 is in direct contact with the amorphous semiconductor layer (n layer 14), the non-metal Function to prevent deterioration of solar cell characteristics due to migration to crystalline materials.

Regarding the desirable electrical characteristics of the oxide semiconductor layer 13, it is desirable that the oxide semiconductor layer 13 has a high resistance in order to function as a barrier layer. However, the oxide semiconductor layer 13 does not become a series resistance component with respect to the current generated by photoelectric conversion. It must be a resistance value. Specifically, the resistivity ρ is 10 ²
It is desirable that it is about Ωcm to 10 ⁻⁴ Ωcm. Further, since the oxide semiconductor layer 13 needs to allow long-wavelength light to reach the surface of the substrate 11, it is preferable that the oxide semiconductor layer 13 have sufficient light-transmitting property. Specifically, the forbidden band width (E
It is desirable that g) is 3 eV or more. As materials having such characteristics, tin oxide (SnO ₂ ), ITO which is an alloy of indium and tin oxide, and zinc oxide (ZnO) are preferable. When the electric resistance of these materials is high, the resistance can be lowered by doping. Z of the above materials
Since nO has a suitable electric conductivity, is inexpensive, and has a good light transmittance, research is progressing as an optimal material.

The oxide semiconductor layer 13 is usually formed by a sputtering method, a spray method, a vapor deposition method, an ion plating method, or the like, but when formed by these methods, the surface shape is generally smooth. Will be things. In order to form the desired unevenness on the surface of the oxide semiconductor layer 13, for example, a method of forming oxide semiconductor fine particles having a particle size corresponding to the desired unevenness by a plasma CVD method and depositing them on the substrate 11. Can be used. Alternatively, the oxide semiconductor fine particles may not be directly deposited on the substrate 11, but a binder or the like may be added thereto to perform screen printing as a paste.

(4) Photovoltaic power generation layer (n layer 14, i layer 1)
5 and p layer 16) n layer 14 is SiH_Four PH for gases and doping agents₃ Moth
It can be created by decomposing plasma with plasma. i layer
15 absorbs the light and is excited by the incident light.
Is an amorphous semiconductor layer that causes carrier
Always SiH_Four Can be created by decomposing gas with plasma
it can. The p-layer 16 is generally made of SiH. _Four Gas and do
B for ping₂H₆Create by decomposing gas and plasma with plasma
be able to.

Although the photovoltaic generation layer shown in FIG. 1 is a single cell having a pin structure, it may be a tandem cell in which two single cells are laminated or a triple cell in which three layers are laminated. The order of stacking the n layer 14, the i layer 15, and the p layer 16 may be reversed. Further, the photovoltaic generation layer may not be flat as shown in FIG. 1, but may be formed so as to trace the irregularities on the surface of the oxide semiconductor layer 13.

(5) Upper Electrode 17 and Metal Electrode 18 The upper electrode 17 is a transparent conductive film that transmits incident light and has conductivity, and generally, it can be formed by sputtering using ITO or SnO ₂ as a target. it can.
The metal electrode 18 (grid) is generally Ag or Al.
It can be prepared by depositing a low-resistance metal such as by using a resistance heating method, an electron beam method, a sputtering method, a screen printing method, or the like. Also, the metal electrode 1
It is desirable that 8 is designed to have the smallest possible area so as not to impede the transmission of incident light, and is usually formed in a comb shape.

Next, an example of trial production of the amorphous silicon solar cell 10 shown in FIG. 1 will be described.

As the substrate 11, a 500 μm-thick stainless steel substrate cut into a size of 10 cm × 10 cm was used, and the surface thereof was polished with an alumina abrasive to give an average surface roughness (Ra) of 500 Å. After that, a lower electrode 12 made of Al is deposited on the substrate 11 to a thickness of 5000 Å using a sputtering device (not shown), and then the substrate 1 is formed.
1 was put into the oxide semiconductor deposition apparatus 200 shown in FIG.

The oxide semiconductor deposition apparatus 200 includes a microwave oscillator 201, a waveguide 202 for transmitting microwaves oscillated by the microwave oscillator 201, and a microwave generator 201 provided in the waveguide 202. A power monitor 203 for measuring incident power and reflected power, a matching circuit 204 provided in the waveguide 202, a chamber 208, and the waveguide 202.
The microwave input window 205 for inputting the microwave transmitted by the chamber 208 into the chamber 208, the cavity resonator 206 provided in the chamber 208, and the hole with a diameter of 8 mm provided in the cavity resonator 206 are provided. A perforated plate 207 opened so that the porosity is 40%, an exhaust pump 210 for exhausting gas in the chamber 208, a chamber 208 and an exhaust pump.
An exhaust pipe 209 communicating with 210 is included. Here, the chamber 208 is connected to the oxygen gas cylinder 21 through the oxygen gas introduction pipe 223.
The oxygen gas inlet pipe 223 is connected to the pressure regulator 215, the valve 219, and the mass flow controller 220.
And a valve 221 is provided. Further, a bubbling device for N ₂ gas cylinder 213 for N ₂ gas as a carrier gas and diethyl zinc ((CH ₃ ) ₂ Zn) as a source gas
The pressure regulator 214 and the valve 21 are connected to the pipe communicating with 211.
6, a mass flow controller 217 and a valve 218 are provided, and the bubbling device 211 and the chamber 208 are connected by a raw material gas introduction pipe 222. A substrate holder 225 is provided at a position facing the aperture plate 207 in the chamber 208, and a substrate heater 226 is provided in the substrate holder 225. The substrate 11 on which the lower electrode 12 is deposited is placed on the substrate holder 225 so as to face the aperture plate 207.

The exhaust pump 210 is operated and 10 ^-6 Tor
After evacuating the inside of the chamber 208 to a vacuum degree of r or less,
The substrate 11 was heated to 300 ° C. using the substrate heating heater 226. Thereafter, bubbling controls the N ₂ gas is a carrier gas filled in N ₂ gas cylinder 213 to 10sccm flow by the mass flow controllers 217 device
It was introduced in 211. The raw material gas is contained in the carrier gas at a predetermined vapor pressure and introduced into the cavity resonator 206. Oxygen gas was introduced into the cavity resonator 206 with the mass flow controller 220 controlling the flow rate to 20 sccm. The pressure inside the chamber 208 is set to 1 by a pressure controller (not shown).
Adjusted to 5 mTorr. When the pressure inside the chamber 208 has stabilized, turn on the microwave oscillator 201 and
A microwave with a power of 120 W was generated. The matching circuit 204 was adjusted so that the reflected power shown on the power monitor 203 was minimized. Plasma was generated in the cavity resonator 206, and ZnO particles generated by the gas phase reaction were drawn out into the chamber 208 through the aperture plate 207 to deposit a ZnO film on the substrate 11. The substrate 11 after film formation was taken out, and the height of the unevenness on the surface was measured.
It was 00Å.

Next, using the plasma CVD apparatus shown in FIG. 3, a photovoltaic layer was deposited as follows.

The plasma CVD apparatus 300 includes an n-layer film forming chamber 301 for depositing the n-layer 14 and an i-layer film forming chamber 31 for depositing the i-layer 15.
1 and a p-layer deposition chamber 321 for depositing the p-layer 16. The n-layer film forming chamber 301, the i-layer film forming chamber 311 and the p-layer film forming chamber 321 respectively include first to fourth gate valves 309, 319, 329, 339.
This allows the vacuum state to be maintained independently. In the n-layer film forming chamber 301, a substrate heating heater 304 is provided inside, and a substrate holder 303 acting as an anode electrode is provided.
And a cathode electrode 302 connected to a high frequency power supply 306 via a matching box 305. The n-layer deposition chamber 301 is also equipped with an exhaust pump via an exhaust pipe 307.
It is in communication with 308. The i-layer deposition chamber 311 and p
The same applies to the layer deposition chamber 321. n-layer deposition chamber 301,
The introduction of the source gas into the i-layer film forming chamber 311 and the p-layer film forming chamber 321 is carried out from the respective source gas cylinders 331, 341, 351, 361 via the source gas introducing pipe 370. Here, the pressure regulators 332, 342, 352, 362 and the valves 33 are provided between the source gas cylinders 331, 341, 351, 361 and the source gas introduction pipe 370.
4,344,354,364 and each mass flow controller 335,345,
355, 365 and valves 336, 346, 356, 366 are provided respectively.

Substrate 11 on which oxide semiconductor layer 13 is formed
Was placed on the substrate holder 303 in the n-layer film forming chamber 301.
After the vacuum pump 308 evacuates the inside of the n-layer deposition chamber 301 to a vacuum degree of 10 ⁻⁷ Torr, a substrate heater 304
The substrate holder 303 was heated to 250 ° C. After that, S filled in the raw material gas cylinder 331 at the left end in the figure
2 hours of iH ₄ gas by mass flow controller 335
The flow rate is controlled to be ccm, and PH ₃ gas, which is filled in the second source gas cylinder 341 from the left end in the figure and diluted to 1% with H ₂ gas, is controlled to have a flow rate of 2 sccm by the mass flow controller 345. Raw material gas inlet pipe 370
Each of them was introduced into the n-layer film forming chamber 301 via. After that, the pressure inside the n-layer deposition chamber 301 is maintained at 0.7 Torr,
After the flow of each source gas and the pressure in the n-layer film forming chamber 301 have stabilized, the matching box 305 minimizes the reflected power and the high frequency power source 306 outputs 2 W of n power.
It was put into the layer deposition chamber 301. In this state, film formation was performed for 3 minutes to form the n layer 14.

After the formation of the n-layer 14, the n-layer deposition chamber
After the discharge inside 301 was stopped and the supply of each source gas into the n-layer deposition chamber 301 was stopped, the vacuum degree was 10 ^-7 Torr.
The inside of the n-layer film forming chamber 301 was evacuated to r. Then the second
After the gate valve 319 is opened, the substrate 11 is transferred to the substrate holder 31 in the i-layer film forming chamber 311 by using a transfer means (not shown).
Moved to 3. After the temperature of the substrate 11 is set to 250 ° C. by the substrate heating heater 314, the source gas cylinder at the left end in the figure is
The SiH ₄ gas filled in 331 is controlled to a flow rate of 3 sccm by the mass flow controller 335, and
The H ₂ gas filled in the third source gas cylinder 351 from the left end in the figure is set to 3 by the mass flow controller 355.
The flow rate was controlled to 0 sccm, and each was introduced into the i-layer deposition chamber 311 via the source gas introduction pipe 370. Then i
After the pressure in the layer deposition chamber 311 was kept at 0.4 Torr and the flow of each raw material gas and the pressure in the i layer deposition chamber 311 were stabilized, the reflection power was minimized by the matching box 315 and the high frequency Power of 5 W was supplied from the power source 316 into the i-layer deposition chamber 311. By forming the film for 60 minutes in this state, the i layer 15 was formed.

After the formation of the i layer 15, the i layer deposition chamber
After the discharge in 311 was stopped and the supply of each source gas into the i-layer deposition chamber 311 was stopped, the vacuum degree was 10 ^-7 Torr.
The inside of the i-layer deposition chamber 311 was evacuated to r. Then the third
After the gate valve 329 is opened, the substrate 11 is transferred to the substrate holder 32 in the p-layer deposition chamber 321 using a transfer means (not shown).
Moved to 3. After the temperature of the substrate 11 is set to 250 ° C. by the substrate heater 324, the source gas cylinder at the left end in the figure is
The SiH ₄ gas filled in 331 is controlled to a flow rate of 2 sccm by a mass flow controller 335, and
H ₂ filled in the raw material gas cylinder 361 at the right end in the figure
The B ₂ H ₆ gas diluted to 2% with a gas was controlled to a flow rate of 3 sccm by the mass flow controller 365, and was introduced into the p-layer deposition chamber 321 via the source gas introduction pipe 370.
After that, the pressure in the p-layer film forming chamber 321 is maintained at 0.5 Torr, and after the flow of each raw material gas and the pressure in the p-layer film forming chamber 321 are stabilized, the reflection power is minimized by the matching box 325. As a result, a high frequency power source 326 of 5 W was introduced into the p-layer deposition chamber 321. In this state, film formation was performed for 1 minute to form the p layer 16.

When the formation of the p-layer 16 is completed, a p-layer film forming chamber is formed.
After stopping the discharge in 321 and also stopping the supply of each source gas into the p-layer deposition chamber 321, the degree of vacuum is 10 ^-7 Torr.
The inside of the p-layer deposition chamber 321 was evacuated to r. After that, the substrate 11 is left to stand until it reaches room temperature, and then the p-layer deposition chamber
The substrate 11 was taken out from 321.

Subsequently, the substrate 11 is set in a sputtering device (not shown) to form circular subcells having an effective area of 1 cm ² arranged in a lattice with a center-to-center distance of 1 cm. After the mask was placed on the p layer 16 of the substrate 11, the inside of the sputtering apparatus was evacuated to a vacuum degree of 10 ⁻⁷ Torr. After that, Ar gas was caused to flow so that the pressure in the sputtering device was 2 × 10 ⁻⁴ Torr, and DC sputtering was performed with a power of 50 W using an ITO target to form the upper electrode 17 of ITO. Further, by using an EB vapor deposition device (not shown), by stacking Cr having a thickness of 500Å and Ag having a thickness of 1000Å on the upper electrode 17 of the substrate 11,
The metal electrode 18 was formed.

Next, by changing the deposition conditions of ZnO, the height of the unevenness on the surface of the oxide semiconductor layer 13 is 500Å, 1000.
Å, 2000Å, 4000Å, 6000Å and 100
A 00Å amorphous silicon solar cell 10 was similarly prepared.

With the upper electrode 17 side of the amorphous silicon solar cell 10 formed as described above as the light receiving surface, A
While irradiating M-1 light (100 mW / cm ² ), the voltage applied between the substrate 11 and the metal electrode 18 is −0.5 V.
By sweeping in the range of up to +1.0 V, the voltage-current characteristics were measured to measure the photoelectric conversion efficiency of each sample. Further, the conventional amorphous silicon solar cell 50 shown in FIG. 5 was similarly prepared, and the photoelectric conversion efficiency was similarly measured. FIG. 4 shows an experimental result of examining the relationship between the height of the unevenness on the surface of the oxide semiconductor layer 13 and the photoelectric conversion efficiency (normalized) measured for each sample. From this result, the height of the unevenness on the surface of the oxide semiconductor 13 is 10
It was found that the photoelectric conversion efficiency was high from 00Å to 5000Å.

[0038]

Since the present invention is configured as described above, it has the following effects.

The height difference between the mountain and the valley is 1000Å to 500
By forming the unevenness of 0Å on the surface of the oxide semiconductor layer, the light can be effectively confined without forming the unevenness on the surface of the lower electrode, so that the incident light can be efficiently absorbed and the productivity can be improved. It can also be improved.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of an amorphous silicon solar cell showing an embodiment of the solar cell of the present invention.

FIG. 2 is a schematic configuration diagram of an oxide semiconductor deposition apparatus used for trial production of the amorphous silicon solar cell shown in FIG.

FIG. 3 is a schematic configuration diagram of a plasma CVD apparatus used for trial production of the amorphous silicon solar cell shown in FIG.

FIG. 4 is a graph showing the results of an experiment in which the relationship between the height of irregularities on the surface of the oxide semiconductor layer and the photoelectric conversion efficiency in each sample of amorphous silicon solar cells was investigated.

FIG. 5 is a schematic sectional view showing a conventional example of an amorphous silicon solar cell having a pin type element structure.

[Explanation of symbols]

10 Amorphous Silicon Solar Cell 11 Substrate 12 Lower Electrode 13 Oxide Semiconductor Layer 14 n Layer 15 i Layer 16 p Layer 17 Upper Electrode 18 Metal Electrode 200 Oxide Semiconductor Depositor 201 Microwave Oscillator 202 Waveguide 203 Power Monitor 204 Matcher 205 Microwave input window 206 Cavity resonator 207 Opening plate 208 Chamber 209,307,317,327 Exhaust pipe 210,308,318,328 Exhaust pump 211 Bubbling device 212 Oxygen gas cylinder 213 N ₂ gas cylinder 214,215,332,342,352,362 Pressure regulator 216,218,219,221,334,344,354,364,336,346,356,356
Valve 217,220,335,345,355,365 Mass flow controller 222,370 Raw material gas inlet pipe 223 Oxygen gas inlet pipe 225,303,313,323 Substrate holder 226,304,314,324 Substrate heating heater 300 Plasma CVD device 301 n-layer deposition chamber 302,312,322 Cathode electrode 305,315,325 Matching box 306,316,317 Valve 11 5 p-layer deposition chamber 331,341,351,361 Raw material gas cylinder

Claims (3)

[Claims] 1. A solar cell comprising an oxide semiconductor layer, a photovoltaic layer, an upper electrode and a metal electrode, which are sequentially stacked on a substrate, wherein the oxide semiconductor layer has irregularities formed on a surface thereof. Height difference between uneven peaks and valleys is 1000Å to 5000Å
A solar cell characterized by being. 2. The solar cell according to claim 1, wherein the oxide semiconductor layer is made of zinc oxide. 3. The solar cell according to claim 1, wherein the oxide semiconductor layer is formed by a coating method or a plasma CVD method.