JPH0611684A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To suppress the generation of crosstalk and the degradation of picture quality of a liquid crystal display panel by preventing the generation of a parasitic capacity. CONSTITUTION:Influence of the parasitic capacity can be eliminated by disposing grounded and shielded wirings 16a to 16e to a part or all of bus lines for input 2, 3, 4, 5, 6 of a data driver 30 and bus lines for display 10, 11 of the liquid crystal display panel 31. The light leakage caused by the distortion of an electric field distribution around the pixel electrode 14 is prevented by forming shielded wirings 16f, 16e so as to hold an interlayer insulating film therebetween to bus lines for displaying 10, 11 and the pixel electrode 14 therebetween and to be superposed thereon with >=1mum and <=10mum. Further, the generation of the crosstalk in a thin film transistor section can be prevented when thin film transistors 7, 12 are formed by using polycrystalline Si.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device comprising, for example, an active matrix type liquid crystal display panel and a data driver having a bus line for inputting analog data signals such as video signals to the liquid crystal display panel. .

[0002]

2. Description of the Related Art Conventionally, the above-mentioned liquid crystal display device having a structure as shown in FIG. 4 is known. The liquid crystal display device includes a liquid crystal display panel 31 and a data driver 30, and the data driver 30 includes a shift register circuit 1 and a plurality of shift register output bus lines 2 having one end connected to the shift register circuit 1. . A thin film transistor 7 which is an analog switch is connected to the other end of each shift register output bus line 2.

Each thin film transistor 7 is turned on / off between two terminals under the control of an output signal from the shift register circuit 1. One of the two terminals has R, G, B
Any one of the video signal input bus lines 3, 4, and 5 is connected via the analog switch input bus line 6, and the other terminal is connected to the sampling capacitor 8 and the display bus line 10 of the liquid crystal display panel 31. Are connected in parallel. The other end of the sampling capacitor 8 is connected to the common electrode 9. The thin film transistor 7 and the sampling capacitor 8 form a sample and hold circuit.

On the other hand, the liquid crystal display panel 31 is provided with the above-mentioned display bus line 10 and the scan-side display bus line 11 which is wired so as to intersect with the display bus line 10. A pixel electrode 14 is provided in a region surrounded by the display bus lines 10 and 11, and a thin film transistor 12 which is an analog switch is provided between the display bus lines 10 and 11 and the pixel electrode 14. A storage capacitor 1 is provided between the thin film transistor 12 and the common electrode 9.
3 is provided.

[0005]

In the conventional liquid crystal display device, the input bus lines 3, 4 and 5 are formed close to each other, so that the input bus lines 3 and 4 and 4 are formed. And 5 are parasitic capacitances 16 and 1, respectively.
6 results. Further, a parasitic capacitance 19 is generated between the shift register output bus line 2 and the analog switch input bus line 6. Further, between the picture element electrode 14 and the display bus line 10 which are close to each other, and the similar picture element electrode 1
4 and the scan-side display bus line 11 generate parasitic capacitances 21 and 22, respectively.

In addition, the shift register output bus line 2
And a wiring portion where the input bus lines 3, 4, and 5 intersect,
A wiring portion where the input bus line 5 and the analog switch input bus line 6 intersect, and the display bus line 10
In the wiring part where the display bus line 11 on the scan side and the scan side intersect, an interlayer insulating film is usually provided to perform multilayer wiring. However, when the interlayer insulating film is thin,
Parasitic capacitance, which cannot be ignored, also occurs in the above-mentioned intersecting wiring portions. Specifically, parasitic capacitances 17, 17, 17 are generated between the shift register output bus line 2 and the input bus lines 3, 4, 5, respectively, and the input bus line 5 and the analog switch input bus line 6 are Between the display bus line 10 and the display-side bus line 11 on the scan side, a parasitic capacitance 20 is generated.
Will occur.

Therefore, in the conventional liquid crystal display device, signals having different phases and amplitudes are input to the input bus line and the display bus line, despite the occurrence of the above-mentioned parasitic capacitance. As a result, there is a problem that crosstalk occurs in the analog data signal and the image quality on the liquid crystal display panel deteriorates.

The present invention has been made to solve the problems of the prior art, and prevents the occurrence of parasitic capacitance,
An object of the present invention is to provide a liquid crystal display device capable of suppressing occurrence of crosstalk and deterioration of image quality of a liquid crystal display panel.

[0009]

In the liquid crystal display device of the present invention, the pixel electrodes are arranged in a matrix, and
A liquid crystal display including an active matrix type liquid crystal display panel in which a display bus line is formed in a display area including the pixel electrode and a data driver having an input bus line for inputting an analog data signal to the liquid crystal display panel. In the device, grounded shield wiring is attached to a part or all of the input bus line of the data driver and the display bus line of the liquid crystal display panel, thereby achieving the above object. .

The shield wiring is attached to the display bus line and the picture element electrode, an interlayer insulating film is sandwiched between the display bus line and the picture element electrode, and 1 μm or more and 10 μm or more. You may form so that it may overlap below.

Further, a thin film transistor group is provided which is connected to the display bus line and the picture element electrode, and which constitutes a data driver for inputting analog data to the liquid crystal display panel, and the input bus. Another thin film transistor may be provided so as to be connected to the line and the display bus line, and each of the thin film transistor group forming the data driver and the thin film transistor and the other thin film transistor may be formed using polycrystalline Si.

[0012]

In the present invention, grounded shield wiring is attached to some or all of the input bus line of the data driver and the display bus line of the liquid crystal display panel. Therefore, it is possible to eliminate the influence of the parasitic capacitance and prevent the occurrence of crosstalk in the analog data signal.

Further, the shield wiring is sandwiched between the display bus line and the pixel electrode by an interlayer insulating film, and
If they are formed so as to overlap with each other in the range of μm or more and 10 μm or less, leakage of light caused by distortion of electric field distribution around the pixel electrode is prevented.

Furthermore, when a data driver for inputting analog data to a liquid crystal display panel is integrally formed on the same substrate by using polycrystalline Si, a control signal for operating the data driver and an output of the data driver are output. Although crosstalk occurs due to the influence of signals, etc., by forming the shield wiring between the data driver and the analog data signal line, it becomes possible to eliminate the influence of parasitic capacitance and prevent the occurrence of crosstalk. Will be possible.

[0015]

EXAMPLES Examples of the present invention will be specifically described below.

FIG. 1 is an equivalent circuit diagram showing the liquid crystal display device of this embodiment. This liquid crystal display device comprises a liquid crystal display panel 31 and a data driver 30 which are formed on the same substrate. The data driver 30 includes a shift register circuit 1 and a plurality of shift register circuits 1 whose one end is connected. The shift register output bus line 2 and the thin film transistor 7, which is an analog switch, is connected to the other end of each shift register output bus line 2.

Each thin film transistor 7 has a gate electrode formed on one side and a source electrode and a drain electrode formed on the other side with a semiconductor layer made of polycrystalline Si interposed therebetween. A shift register output bus line 2 is connected to the gate electrode, and an R, G, B video signal input bus line 3 is connected to the source electrode via an analog switch input bus line 6.
The sampling capacitor 8 and the display bus line 10 of the liquid crystal display panel 31 are connected in parallel to the drain electrode. The thin film transistor 7 is turned on / off between the two terminals of the source electrode and the drain electrode under the control of the output signal from the shift register circuit 1.

The other end of the sampling capacitor 8 is connected to the common electrode 9, and the thin film transistor 7 and the sampling capacitor 8 form a sample and hold circuit.

Shield wirings 16a and 16b are formed between the input bus lines 3, 4 and 5 as shown in FIG. 2, and shield wires 16a and 16b are similarly provided outside the input bus lines 3 and 5. Wirings 16c and 16d are formed,
An insulating film 17a is formed so as to cover the shield wirings 16a, 16b, 16c, 16d and the input bus lines 3, 4, 5. Further, as shown in FIG. 3, for the analog switch input bus line 6, a shield wiring 16f is formed over the entire length with the upper and lower portions sandwiched by interlayer insulating films 17a and 17b. Similarly, for the shift register output bus line 2, the shield wiring 16e is formed over the entire length by sandwiching the upper and lower portions with an interlayer insulating film (not shown). Shield wiring 16a, 16b, 16c, 16d, 1
The ends of 6f and 16e are grounded. The shield wirings 16f and 16e described above are always provided at the intersections of the input bus lines 3, 4, and 5, but may be omitted at other portions without any problem.

On the other hand, the liquid crystal display panel 31 includes the above-mentioned display bus line 10 and the scan-side display bus line 11 which is wired in a state intersecting with the display bus line 10. A pixel electrode 14 is provided in a region surrounded by the display bus lines 10 and 11, and a thin film transistor 12 which is an analog switch is connected to the display bus lines 10 and 11 and the pixel electrode 14. . The thin film transistor 12 has a structure in which a gate electrode is formed on one side and a source electrode and a drain electrode are formed on the other side with a semiconductor layer made of polycrystalline Si interposed therebetween, and the display bus line 11 is connected to the gate electrode. The display bus line 10 is connected to the source electrode, and the pixel electrode 14 is connected to the drain electrode. A storage capacitor 13 is provided between the thin film transistor 12 and the common electrode 9.

The shield wiring 16g is formed over the entire length of the display bus line 10 by sandwiching the upper and lower layers with an interlayer insulating film (not shown), and the pixel lines are arranged in a matrix on the display bus line 11 on the scan side. In the display area portion where the electrodes 14 are arranged, the shield wiring 16h is formed by sandwiching the upper and lower portions with an interlayer insulating film (not shown). The shield wirings 16g and 16h are grounded at their ends. The shield wiring 16g described above,
16h is always provided at a portion where the display bus line 10 and the scan-side display bus line 11 intersect with each other and a portion which passes in the vicinity of the pixel electrode 14, but may be omitted in other portions. There is no. However, in the portion passing near the pixel electrode 14, these shield wirings 16g, 16h
Is an interlayer insulating film sandwiched between the display bus lines 10 and 11 and the pixel electrode 14, and is 1 μm or more and 10 μm or more.
It is formed so as to overlap below.

Therefore, in the liquid crystal display device constructed as described above, the input bus lines 3, 4, 5 and the shift register output bus line 2 and the analog switch input bus line 6 are grounded as described above. Since the shield wirings 16a, 16b, 16c, 16d are provided, even if analog data signals having different phases and amplitudes are input, the input bus line 3,
No parasitic capacitance is formed between 4 and 5 and between the shift register output bus line 2 and the analog switch input bus line 6, and crosstalk does not occur.

Further, since the shield wirings 16g and 16h are provided between the display bus lines 10 and 11 and the picture element electrode 14, parasitic capacitance is generated in the vicinity of the display bus lines 10 and 11. Therefore, the occurrence of crosstalk can be prevented. In addition, shield wiring 16g, 16h
Are formed so as to overlap the display bus lines 10 and 11 and the picture element electrode 14 by 1 μm or more and 10 μm or less. Therefore, light leakage caused by distortion of the electric field distribution around the picture element electrode 14 is shielded. Prevented by the presence of 16g, 16h.

Furthermore, when a data driver for inputting analog data to the liquid crystal display panel is integrally formed on the same substrate using polycrystalline Si, a control signal for operating the data driver and an output of the data driver are output. Although crosstalk occurs due to the influence of signals, etc., by forming the shield wiring between the data driver and the analog data signal line, it becomes possible to eliminate the influence of parasitic capacitance and prevent the occurrence of crosstalk. Will be possible.

For the above reasons, in the case of the present invention,
Since it is possible to prevent the occurrence of crosstalk, it is possible to obtain a high quality display.

[0026]

As described above, in the case of the present invention, since the shield wiring is provided at the place where the parasitic capacitance may occur, it is possible to prevent the occurrence of crosstalk between analog data signals. The display quality can be high.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram showing a liquid crystal display device of this embodiment.

FIG. 2 is a cross-sectional view showing the vicinity of the input bus line of FIG.

FIG. 3 is a cross-sectional view showing the vicinity of an input bus line (including an analog switch input bus line) of FIG.

FIG. 4 is an equivalent circuit diagram showing a conventional liquid crystal display device.

[Explanation of symbols]

 1 shift register circuit 2 shift register output bus line 3 R video signal input bus line 4 G video signal input bus line 5 B video signal input bus line 6 analog switch input bus line 7 thin film transistor 8 sampling capacitor 9 common electrode 10 Display bus line 11 Scan side display bus line 12 Thin film transistor 13 Storage capacitance 14 Picture element electrode 16a Shield wiring 16b Shield wiring 16c Shield wiring 16d Shield wiring 16f Shield wiring 16e Shield wiring

Claims (3)

[Claims] 1. An active matrix type liquid crystal display panel in which picture element electrodes are arranged in a matrix and a display bus line is formed in a display area including the picture element electrodes, and an analog data signal is provided. In a liquid crystal display device including a data driver having an input bus line for inputting to a liquid crystal display panel, a part or all of the input bus line of the data driver and the display bus line of the liquid crystal display panel are grounded. Display device with attached shield wiring. 2. The shield wiring is provided for the display bus line and the pixel electrode, and an interlayer insulating film is sandwiched between the display bus line and the pixel electrode, and 1 μm or more and 10 μm or more. The liquid crystal display device according to claim 1, wherein the liquid crystal display devices are formed so as to overlap each other below. 3. A thin film transistor group, which is provided with a thin film transistor connected to the display bus line and the pixel electrode, and which constitutes a data driver for inputting analog data to a liquid crystal display panel, and the input device. Another thin film transistor is provided so as to be connected to the bus line and the display bus line, and each of the thin film transistor group forming the data driver and the thin film transistor and the other thin film transistor are formed using polycrystalline Si. 3. The liquid crystal display device according to 1 or 2.