JPH0574982A - Semiconductor package - Google Patents
Semiconductor packageInfo
- Publication number
- JPH0574982A JPH0574982A JP23632991A JP23632991A JPH0574982A JP H0574982 A JPH0574982 A JP H0574982A JP 23632991 A JP23632991 A JP 23632991A JP 23632991 A JP23632991 A JP 23632991A JP H0574982 A JPH0574982 A JP H0574982A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor package
- terminals
- fixing means
- terminal
- container
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 239000000565 sealant Substances 0.000 claims description 3
- 230000004308 accommodation Effects 0.000 abstract description 9
- 238000005452 bending Methods 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 5
- 239000003566 sealing material Substances 0.000 abstract description 4
- 229910000679 solder Inorganic materials 0.000 abstract description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000002950 deficient Effects 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】
【目的】半導体パッケージに於いて、ハンドリング用容
器での端子曲がりの発生を抑え、更に、基板実装の際、
半導体パッケージの基板への固定を確実にし、しかも端
子の基板パターンへの半田接続を確実に行う。
【構成】半導体パッケージの底面四隅に、端子先端５よ
りも適宜寸法長く、封止材２により半導体チップ６、ダ
イパッド７、端子３とともに、固定手段８を一体成形さ
せた半導体パッケージ。
【効果】固定手段は、型の部分修正だけで簡単に一体成
形出来、ハンドリング用の収容容器内では、収容ポケッ
トと半導体パッケージの端子が接触しないため、端子曲
がりの発生を抑えられる。叉、基板へ実装する際は、機
械的なはめ込みの固定手段より、工程が簡略化され、固
定が確実に行なえる。更に端子の矯正が行なわれること
により端子と基板パターンの半田接続不良が無くせる。
(57) [Abstract] [Purpose] In a semiconductor package, it suppresses the occurrence of terminal bending in the container for handling, and when mounting on a board,
The semiconductor package is securely fixed to the board, and the terminals are surely soldered to the board pattern. A semiconductor package in which fixing means 8 are integrally molded with a semiconductor chip 6, a die pad 7, and a terminal 3 by a sealing material 2 at four corners of a bottom surface of the semiconductor package, which are appropriately dimensioned longer than a terminal tip 5. [Effect] The fixing means can be easily integrally formed by only modifying the mold part. Since the accommodation pocket and the terminals of the semiconductor package do not come into contact with each other in the accommodation container for handling, the occurrence of terminal bending can be suppressed. Further, when mounting on a substrate, the process is simplified and the fixing can be surely performed by a mechanical fitting fixing means. Further, by correcting the terminals, the solder connection failure between the terminals and the board pattern can be eliminated.
Description
【０００１】[0001]
【産業上の利用分野】本発明は基板実装のための端子が
２方向もしくは４方向にあって、組立や電気特性測定な
どのハンドリングに於ける収容容器での保持や、基板実
装の際に固定が必要な半導体パッケージに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has terminals for mounting on a board in two directions or four directions, and is held in a container for handling during assembly and handling of electrical characteristics, and fixed during board mounting. Related to semiconductor packages that require
【０００２】[0002]
【従来の技術】従来の半導体パッケージでは、ハンドリ
ングに於ける収容容器での保持は、前記半導体パッケー
ジの端子や、封止材の端面、底面を利用していた。2. Description of the Related Art In a conventional semiconductor package, the terminal of the semiconductor package and the end face and the bottom face of a sealing material are used for holding in a container for handling.
【０００３】又、基板実装の際の固定は接着剤を用いて
いた。Further, an adhesive is used for fixing when mounting on a substrate.
【０００４】[0004]
【発明が解決しようとする課題】しかし、前述の従来技
術には以下に述べるような課題がある。即ち、ハンドリ
ング用の収容容器での半導体パッケージの保持は、前記
半導体パッケージの端子を利用しているため、端子を曲
げて外観不良が発生していた。However, the above-mentioned prior art has the following problems. That is, since the terminals of the semiconductor package are used to hold the semiconductor package in the container for handling, the terminals are bent to cause a defective appearance.
【０００５】基板への実装の際の固定は接着剤であるた
め、接着剤の塗布工程が必要で、塗布装置も必要とな
る。又、完全に固着するまでに時間がかかるためずれが
生じていた。更に、前記半導体パッケージの端子の微妙
な浮き沈みにより前記基板と前記端子の半田による固着
不良が発生していた。[0005] Since the adhesive is used for fixing on the substrate when mounting, an adhesive applying step is required and an applying apparatus is also required. In addition, since it takes time to completely fix the toner, there is a deviation. Further, due to the subtle ups and downs of the terminals of the semiconductor package, there is a defect in fixing the substrate and the terminals by soldering.
【０００６】本発明では以上のような問題点を解決する
ものであり、その目的とするところは、ハンドリング用
の収容容器での半導体パッケージの保持に前記半導体パ
ッケージの端子や、封止材の端面を使わないことによ
り、端子の曲がりの発生を押える。 又、基板実装の際
は基板への半導体パッケージの固着を確実に、しかも工
程を簡略化し、更に、前記基板と前記端子の半田固着不
良が抑えられるような半導体パッケージを提供すること
にある。The present invention has been made to solve the above problems, and an object of the present invention is to hold the semiconductor package in a container for handling and to provide the terminals of the semiconductor package and the end surface of the sealing material. By not using, the occurrence of terminal bending can be suppressed. Another object of the present invention is to provide a semiconductor package in which, when mounting on a substrate, the semiconductor package can be securely fixed to the substrate, the process can be simplified, and defective solder fixation between the substrate and the terminal can be suppressed.
【０００７】[0007]
【課題を解決するための手段】本発明の半導体パッケー
ジではハンドリング用の収容容器での保持と、基板実装
の際の基板への固定用の手段を、半導体チップの封止剤
により前記半導体パッケージの四隅に、前記半導体パッ
ケージの端子より適宜寸法下側に突き出させ一体成型す
ることを特徴とする。In the semiconductor package of the present invention, means for holding in a container for handling and fixing to a substrate at the time of mounting on the substrate is provided by a sealing agent for the semiconductor chip. It is characterized in that the four corners are appropriately molded below the terminals of the semiconductor package and are integrally molded.
【０００８】[0008]
【実施例】以下実施例に基づいて本発明を詳しく説明す
る。EXAMPLES The present invention will be described in detail based on the following examples.
【０００９】図１（ａ）は、本発明の正面図の断面図
で、図１（ｂ）は、裏面図を示したものである。図２
は、本発明の半導体パッケージをハンドリング時に用い
る収容容器に収容したときの収容容器の断面図と、前記
収容容器に収容された前記半導体パッケージの正面図で
ある。図３（ａ）は、本発明の半導体パッケージを実装
する基板上に載せた状態の正面図で、図３（ｂ）は、図
３（ａ）の状態から半導体パッケージを基板に押し込ん
で固定した状態の正面図である。FIG. 1 (a) is a sectional view of a front view of the present invention, and FIG. 1 (b) is a rear view. Figure 2
FIG. 4A is a cross-sectional view of a container when the semiconductor package of the present invention is housed in a container used for handling and a front view of the semiconductor package housed in the container. FIG. 3A is a front view of a state in which the semiconductor package of the present invention is mounted on a substrate, and FIG. 3B is a state in which the semiconductor package is pushed and fixed onto the substrate from the state of FIG. 3A. It is a front view of a state.
【００１０】まず、図１（ａ）、図１（ｂ）により本発
明の半導体パッケージの製造過程に沿って説明する。半
導体チップ６は、ダイパッド７と、端子３とともに、封
止剤２により、組立工程で封止される。このとき固定手
段８も同一の封止剤により、図１（ｂ）のように半導体
パッケージ１の四隅に一体成形される。次に端子３の曲
げ加工を行なうが、このとき端子曲げ部４は、半導体パ
ッケージ底面１０よりも適宜寸法高い位置で曲げ、端子
先端５は半導体パッケージ底面１０よりも適宜寸法低
く、且つ、固定手段底面９よりも適宜寸法高い位置に曲
げ加工される。First, the manufacturing process of the semiconductor package of the present invention will be described with reference to FIGS. 1 (a) and 1 (b). The semiconductor chip 6 is sealed together with the die pad 7 and the terminals 3 by the sealant 2 in the assembly process. At this time, the fixing means 8 is also integrally molded at the four corners of the semiconductor package 1 with the same sealant as shown in FIG. Next, the terminal 3 is bent. At this time, the terminal bent portion 4 is bent at a position higher than the semiconductor package bottom surface 10 by an appropriate size, and the terminal tip 5 is appropriately lower than the semiconductor package bottom surface 10 by a fixing means. Bending is performed to a position that is appropriately higher than the bottom surface 9.
【００１１】次に、図２により本発明の半導体パッケー
ジのハンドリング用の容器１１での半導体パッケージ１
の固定手段８を利用した実施例について説明する。ま
ず、容器の収容ポケット１３には、固定手段８の位置に
合わせて半導体パッケージ１の保持用に保持手段１６が
穴空け加工されている。この保持手段１６は、固定手段
８よりも太く、且つ、端子先端５が容器の収容ポケット
底面１４より十分高くなって接触しないような形状とな
っている。これにより、半導体パッケージ１は容器１１
に収容された際には端子３は容器の収容ポケット底面１
４や、収容ポケット側壁１５にはいっさい接触せず、端
子３の曲がりの発生を抑えることが出来る。Next, referring to FIG. 2, the semiconductor package 1 in the container 11 for handling the semiconductor package of the present invention.
An embodiment using the fixing means 8 will be described. First, a holding means 16 for holding the semiconductor package 1 is punched in the accommodation pocket 13 of the container in accordance with the position of the fixing means 8. The holding means 16 is thicker than the fixing means 8 and has a shape such that the terminal tip 5 is sufficiently higher than the container pocket bottom surface 14 and does not come into contact therewith. As a result, the semiconductor package 1 has the container 11
When the terminal 3 is accommodated in the
4 and the side wall 15 of the accommodation pocket are not in contact with each other, so that the bending of the terminal 3 can be suppressed.
【００１２】更に、図３により本発明の半導体パッケー
ジの基板実装に於ける、半導体パッケージの固定手段８
を利用した実施例について説明する。まず図３（ａ）の
ように半導体パッケージ１を基板１７の上に置いただけ
の状態では、端子３を正面から見た端子３ａ、３ｂ、３
ｃ、・・・、３ｎのように高さにばらつきがある。この
ため従来の半導体パッケージでは、基板パターン１８と
のギャップのばらつきにより半田固着不良が発生してい
た。そこで、図３（ａ）の状態から、半導体パッケージ
１を押しつけることにより、図３（ｂ）に示すように、
基板１７に固定手段８とほぼ同一寸法、同一形状に加工
された固定手段受け穴２０に固定手段８が、基板上面１
９と半導体パッケージ底面１０が接する位置まで押し込
まれると、半導体パッケージ１は基板１７に確実に固定
される。更に、半導体パッケージ１が、半導体パッケー
ジ底面１０と基板上面１９と接触する位置で固定される
ことにより、図３（ａ）にに示すような高さばらつきの
あった端子３や、正面からみた端子３ａ、３ｂ、３ｃ、
・・・、３ｎは、図３（ｂ）に示すように基板の上面１
９により上方向に矯正され、修正された端子３’、３
ａ’、３ｂ’、３ｃ’、・・・、３ｎ’のように高さの
揃った状態になり、且つ、基板パターン１８と必ず接触
するようになる。Further, referring to FIG. 3, a semiconductor package fixing means 8 for mounting a semiconductor package on a substrate according to the present invention.
An example using is described. First, in the state where the semiconductor package 1 is only placed on the substrate 17 as shown in FIG. 3A, the terminals 3a, 3b, 3 viewed from the front of the terminal 3 are shown.
There are variations in height, such as c, ..., 3n. For this reason, in the conventional semiconductor package, defective solder fixation occurs due to variation in the gap with the substrate pattern 18. Therefore, by pressing the semiconductor package 1 from the state of FIG. 3A, as shown in FIG.
The fixing means 8 is formed in the fixing means receiving hole 20 formed in the board 17 to have substantially the same size and shape as the fixing means 8, and the board upper surface 1
When the semiconductor package 1 is pushed to a position where the semiconductor package 9 and the bottom surface 10 of the semiconductor package are in contact with each other, the semiconductor package 1 is securely fixed to the substrate 17. Further, the semiconductor package 1 is fixed at a position where it contacts the bottom surface 10 of the semiconductor package and the top surface 19 of the substrate, so that the terminals 3 having height variations as shown in FIG. 3a, 3b, 3c,
3n is the upper surface 1 of the substrate as shown in FIG.
Corrected terminals 3 ', 3 corrected upward by 9
The heights are aligned like a ', 3b', 3c ', ..., 3n', and they are always in contact with the substrate pattern 18.
【００１３】[0013]
【発明の効果】本発明の半導体パッケージは、以上説明
したように、固定手段は、型の部分修正だけで簡単に一
体成形出来、ハンドリング用の収容容器に収容された状
態では、収容容器の収容ポケットと半導体パッケージの
端子が接触しないように保持されるため、端子曲がりの
発生を抑えることが出来る。As described above, in the semiconductor package of the present invention, the fixing means can be easily integrally formed by only partly modifying the mold, and in the state of being accommodated in the accommodation container for handling, the accommodation container is accommodated. Since the pocket and the terminal of the semiconductor package are held so as not to contact with each other, it is possible to prevent the terminal from bending.
【００１４】叉、基板へ実装する際は、機械的なはめ込
みの固定手段を用いることにより、接着剤による固定方
法に比べ、工程が簡略化されるとともに、固定が確実に
行なわれるようになる。更に端子の矯正が行なわれるこ
とにより端子と基板パターンの半田接続不良が無くせ
る。Further, when mounting on a substrate, by using a mechanical fixing means, the process can be simplified and the fixing can be surely performed as compared with the fixing method using an adhesive. Further, by correcting the terminals, the solder connection failure between the terminals and the board pattern can be eliminated.
【００１５】[0015]
【図１】（ａ）は本発明の正面図の断面図。（ｂ）は本
発明の裏面図。FIG. 1A is a sectional view of a front view of the present invention. (B) is a rear view of the present invention.
【図２】本発明のハンドリング用容器へ収容された状態
の正面図と容器の断面図。FIG. 2 is a front view and a sectional view of the container in a state of being accommodated in the handling container of the present invention.
【図３】（ａ）は本発明の半導体パッケージを実装基板
に乗せた状態の平面図。（ｂ）は図３（ａ）の状態から
半導体パッケージを基板に押し込んで固定した状態の平
面図。FIG. 3A is a plan view showing a state in which the semiconductor package of the present invention is placed on a mounting board. FIG. 3B is a plan view showing a state in which the semiconductor package is pressed and fixed onto the substrate from the state of FIG.
１・・・半導体パッケージ ２・・・封止材 ３・・・端子 ３ａ，３ｂ，３ｃ，３ｎ・・・正面からみた端子 ３’，３ａ’，３ｂ’，３ｃ’，３ｎ’・・・修正され
た端子 ４・・・端子曲げ部 ５・・・端子先端 ６・・・半導体チップ ７・・・ダイパッド ８・・・固定手段 ９・・・固定手段底面 １０・・半導体パッケージ底面 １１・・容器 １３・・収容ポケット １４・・収容ポケット底面 １５・・収容ポケット側壁 １６・・保持手段 １７・・基板 １８・・基板パターン １９・・基板上面 ２０・・固定手段受け穴1 ... Semiconductor package 2 ... Sealing material 3 ... Terminals 3a, 3b, 3c, 3n ... Terminals 3 ', 3a', 3b ', 3c', 3n '... viewed from the front Terminal 4 ... Bent terminal 5 ... Terminal tip 6 ... Semiconductor chip 7 ... Die pad 8 ... Fixing means 9 ... Fixing means bottom 10 ... Semiconductor package bottom 11 ... Container 13: accommodation pocket 14: accommodation pocket bottom 15: accommodation pocket side wall 16: holding means 17: substrate 18: substrate pattern 19: substrate top 20: fixing means receiving hole
Claims (1)
もしくは４方向に備えたリードフレームと、当該リード
フレームに実装された半導体チップを封止し、個別半導
体パッケージとなった後のハンドリング用の容器へ収容
時や、基板実装時に於ける固定手段を有した半導体パッ
ケージに於いて、前記固定手段は、半導体チップの封止
剤により一体成型され、パッケージの四隅から、前記端
子より適宜寸法突き出していることを特徴とする半導体
パッケージ。1. A lead frame having terminals for surface mounting on a substrate in two directions or four directions, and a semiconductor chip mounted on the lead frame is sealed for handling after forming an individual semiconductor package. In a semiconductor package that has a fixing means when it is housed in a container or mounted on a board, the fixing means is integrally molded with a sealant for a semiconductor chip, and the four dimensions of the package are appropriately protruded from the terminals. A semiconductor package characterized in that
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23632991A JPH0574982A (en) | 1991-09-17 | 1991-09-17 | Semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23632991A JPH0574982A (en) | 1991-09-17 | 1991-09-17 | Semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0574982A true JPH0574982A (en) | 1993-03-26 |
Family
ID=16999199
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23632991A Pending JPH0574982A (en) | 1991-09-17 | 1991-09-17 | Semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0574982A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6316967B1 (en) | 1999-10-27 | 2001-11-13 | Autonetworks Technologies, Ltd. | Current detector |
| US8701752B2 (en) | 2005-04-25 | 2014-04-22 | Be Intellectual Property, Inc. | Refrigerator-oven combination for an aircraft galley food service system |
-
1991
- 1991-09-17 JP JP23632991A patent/JPH0574982A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6316967B1 (en) | 1999-10-27 | 2001-11-13 | Autonetworks Technologies, Ltd. | Current detector |
| US8701752B2 (en) | 2005-04-25 | 2014-04-22 | Be Intellectual Property, Inc. | Refrigerator-oven combination for an aircraft galley food service system |
| US9664422B2 (en) | 2005-04-25 | 2017-05-30 | Be Intellectual Property, Inc. | Refrigerator-oven combination for an aircraft galley food service system |
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