JPH0555233A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0555233A JPH0555233A JP21570091A JP21570091A JPH0555233A JP H0555233 A JPH0555233 A JP H0555233A JP 21570091 A JP21570091 A JP 21570091A JP 21570091 A JP21570091 A JP 21570091A JP H0555233 A JPH0555233 A JP H0555233A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- oxygen
- oxygen concentration
- concentration region
- heat treatment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体基板の製造方法に
関し、特に半導体基板表面及びその近傍の酸素析出に起
因する結晶欠陥を低減することを目的に、半導体基板表
面近傍の酸素濃度を低減した半導体基板の製造方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor substrate, and more particularly to reducing the oxygen concentration near the surface of the semiconductor substrate for the purpose of reducing crystal defects caused by oxygen precipitation on the surface of the semiconductor substrate and in the vicinity thereof. The present invention relates to a method for manufacturing a semiconductor substrate.
【0002】[0002]
【従来の技術】通常チョクラルスキー法(CZ法)によ
って引き上げられるSi単結晶内には、適切な熱処理を
施すと酸素析出物を形成するのに十分な酸素を含有して
いる。CZ−Si単結晶で製造されるSi半導体基板に
半導体回路素子を形成すると、半導体基板内部には、回
路素子製造における熱処理によって酸素析出が生じる。
この酸素析出物は半導体回路素子特性を劣化させる重金
属等の汚染不純物を捕獲するゲッタリングの効果を持
つ。従って半導体素子を形成しない領域であるSi半導
体基板内部には多数の酸素析出物が存在したほうが良
い。一方、Si半導体基板表面及びその直下即ち半導体
回路素子活性領域の酸素析出は、転位,積層欠陥などを
誘発し、これらの欠陥、あるいは酸素析出自身が、リー
ク電流の増加や記憶保持時間の低下など、半導体回路素
子特性を劣化させる原因となる。2. Description of the Related Art An Si single crystal which is usually pulled by the Czochralski method (CZ method) contains sufficient oxygen to form an oxygen precipitate when subjected to an appropriate heat treatment. When a semiconductor circuit element is formed on a Si semiconductor substrate manufactured from CZ-Si single crystal, oxygen precipitation occurs inside the semiconductor substrate due to heat treatment in manufacturing the circuit element.
This oxygen precipitate has a gettering effect of capturing contaminant impurities such as heavy metals that deteriorate the characteristics of semiconductor circuit elements. Therefore, it is preferable that a large number of oxygen precipitates exist inside the Si semiconductor substrate, which is a region where no semiconductor element is formed. On the other hand, oxygen precipitation on the surface of the Si semiconductor substrate and immediately below it, that is, on the semiconductor circuit element active region, induces dislocations, stacking faults, etc., and these defects, or oxygen precipitation itself, increase leakage current, decrease memory retention time, etc. This causes deterioration of semiconductor circuit element characteristics.
【0003】そこで、図5(a)のように従来のSi半
導体基板31では、一主面を鏡面32に仕上げたSi半
導体基板31を1100℃以上の高温で数時間、非酸化
性雰囲気中で熱処理を行い、Si半導体基板31の表面
の酸素を外方拡散によって低減している。Si半導体基
板31には図5(b)のように表面近傍に表面に近づく
につれて酸素濃度が下がっていく低酸素濃度領域33
が、酸素濃度が均一で低酸素濃度領域より高い高酸素濃
度領域34が形成される。Si半導体基板表面近傍の酸
素濃度を低減させると、Si半導体基板表面や表面近傍
の酸素の析出物も低減する。例えば、図5(c)のよう
に700℃の窒素中で熱処理を16時間し、さらに10
00℃の窒素熱処理を8時間行った後も表面や表面近傍
すなわち半導体回路素子形成領域に酸素析出物を形成し
ない。一方Si半導体基板内部には酸素析出物35が形
成されている。Therefore, as shown in FIG. 5A, in the conventional Si semiconductor substrate 31, the Si semiconductor substrate 31 having one principal surface finished as a mirror surface 32 is heated at a high temperature of 1100 ° C. or higher for several hours in a non-oxidizing atmosphere. Heat treatment is performed to reduce oxygen on the surface of the Si semiconductor substrate 31 by outward diffusion. As shown in FIG. 5B, the Si semiconductor substrate 31 has a low oxygen concentration region 33 in which the oxygen concentration decreases near the surface as it approaches the surface.
However, a high oxygen concentration region 34 having a uniform oxygen concentration and higher than the low oxygen concentration region is formed. When the oxygen concentration near the surface of the Si semiconductor substrate is reduced, oxygen precipitates on the surface of the Si semiconductor substrate and near the surface are also reduced. For example, as shown in FIG. 5C, heat treatment is performed in nitrogen at 700 ° C. for 16 hours, and then 10 times.
Even after the nitrogen heat treatment at 00 ° C. is performed for 8 hours, oxygen precipitates are not formed on the surface or the vicinity of the surface, that is, the semiconductor circuit element formation region. On the other hand, oxygen precipitates 35 are formed inside the Si semiconductor substrate.
【0004】このようにSi半導体基板の表面近傍を低
酸素濃度化することによって、Si半導体基板内部にゲ
ッタリングに有効な酸素析出物35が多数発生していて
も、Si半導体基板表面や半導体回路素子活性領域は無
欠陥又は支障のない状態に保つことができる。By thus reducing the oxygen concentration near the surface of the Si semiconductor substrate, even if many oxygen precipitates 35 effective for gettering are generated inside the Si semiconductor substrate, the surface of the Si semiconductor substrate and the semiconductor circuit are The element active region can be kept defect-free or unhindered.
【0005】[0005]
【発明が解決しようとする課題】従来のSi半導体基板
では、Si半導体基板表面近傍に低酸素濃度領域を得る
ために1100℃以上の高温熱処理を数字間加えてい
る。この高温熱処理は、熱応力によるすべり(スリッ
プ)を生じたり、Si半導体基板表面が雰囲気ガスと反
応して結晶欠陥を生じやすくなるという欠点がある。ま
た高温熱処理は電熱炉によって行うのが一般的である
が、熱応力を低減するために入炉出炉を低速で行わなく
てはならず、高温熱処理に費やす総時間は非常に長時間
に及び生産性が悪い。さらに電熱炉からの重金属汚染
と、熱処理中にそれらがSi半導体基板全体に拡散して
しまうという問題点がある。In the conventional Si semiconductor substrate, a high temperature heat treatment of 1100 ° C. or higher is added for a number of times in order to obtain a low oxygen concentration region near the surface of the Si semiconductor substrate. This high-temperature heat treatment has a drawback that slippage (slip) due to thermal stress occurs, and the Si semiconductor substrate surface easily reacts with the atmospheric gas to cause crystal defects. In addition, high-temperature heat treatment is generally performed in an electric furnace, but in order to reduce thermal stress, the furnace entrance and exit must be performed at a low speed, and the total time spent for high-temperature heat treatment is extremely long and The sex is bad. Further, there are problems that heavy metals are contaminated from the electric heating furnace and that they are diffused throughout the Si semiconductor substrate during the heat treatment.
【0006】加えて、高温熱処理によって表面近傍の酸
素は外方拡散するが、同時にSi半導体基板内部の酸素
析出核(一般的に酸素や炭素の微小なクラスターと言わ
れている)をも分解してしまい、後工程における酸素析
出物の形成が減少するという問題点もある。また、酸素
析出物は小さいほうが二次欠陥が生じにくく、Si半導
体基板の塑性変形防止のために望ましいのだが、上記の
場合のように酸素析出物数が減少すると、個々の酸素析
出物のサイズが大きくなり、二次欠陥を生じ、Si半導
体基板の塑性変形を生じやすくなるという問題もある。In addition, oxygen near the surface is diffused outward by the high temperature heat treatment, but at the same time, oxygen precipitation nuclei (generally called fine clusters of oxygen and carbon) inside the Si semiconductor substrate are decomposed. There is also a problem that the formation of oxygen precipitates in the subsequent process is reduced. Also, smaller oxygen precipitates are less likely to cause secondary defects and are desirable for preventing plastic deformation of the Si semiconductor substrate. However, when the number of oxygen precipitates decreases as in the above case, the size of each oxygen precipitate is reduced. Is large, secondary defects are generated, and plastic deformation of the Si semiconductor substrate is likely to occur.
【0007】[0007]
【課題を解決するための手段】本発明の半導体基板の製
造方法は、CZ法によって引き上げられたSi単結晶イ
ンゴットより切り出し、研磨,エッチングの工程を経て
得られた、少なくとも片面は鏡面に仕上げたSi半導体
基板の鏡面上を10-6Torr以下の高真空中で波長1
〜0.2μmの光源を用いランプが加熱する工程を有す
る。この際、Si半導体基板表面は400℃〜800℃
に加熱する。According to the method of manufacturing a semiconductor substrate of the present invention, at least one surface obtained by cutting out from a Si single crystal ingot pulled up by the CZ method, polishing, and etching, and finishing at least one surface is a mirror surface. A wavelength of 1 on a mirror surface of a Si semiconductor substrate in a high vacuum of 10 -6 Torr or less.
The lamp has a step of heating with a light source of ˜0.2 μm. At this time, the surface of the Si semiconductor substrate is 400 ° C to 800 ° C.
Heat to.
【0008】[0008]
【作用】高真空下で加熱することによってSi半導体基
板内の酸素は比較的低温でも外方拡散する。また、波長
1〜0.3μmの範囲でランプ加熱を行うと、Si半導
体基板の表面近傍のみを加熱して酸素を外方拡散させる
ことができる。このように本発明の半導体基板の製造方
法の適用により、Si半導体基板表面近傍に低酸素濃度
領域を、低温熱処理によって形成することができる。By heating under high vacuum, oxygen in the Si semiconductor substrate diffuses outward even at a relatively low temperature. Further, when the lamp heating is performed in the wavelength range of 1 to 0.3 μm, only the surface vicinity of the Si semiconductor substrate is heated and oxygen can be diffused outward. As described above, by applying the semiconductor substrate manufacturing method of the present invention, the low oxygen concentration region can be formed near the surface of the Si semiconductor substrate by the low temperature heat treatment.
【0009】[0009]
【実施例】次に本発明について図面を参照して説明す
る。The present invention will be described below with reference to the drawings.
【0010】図1は本発明の半導体基板の製造方法の一
実施例の製造工程順断面図である。FIG. 1 is a cross-sectional view in order of manufacturing steps of an embodiment of a method for manufacturing a semiconductor substrate of the present invention.
【0011】まずCZ法によって引き上げた比抵抗10
〜20Ω・cm,酸素濃度1.6×1018個/cm
3 (OLD ASTM法による)のP型Si単結晶イン
ゴットから、図1(a)のような片面鏡面状態のSi半
導体基板1を切断,エッチング,研磨の工程を経て得
る。このSi半導体基板1の鏡面2に波長0.46μm
のレーザ光を照射し鏡面温度600℃のランプ加熱を1
×10-9Torrの真空下で10分間施し、Si半導体
基板の表裏両表面の酸素の外方拡散を行った。この鏡面
温度は赤外線温度計で測定した。この後1×10-9To
rrの圧力下でSi半導体基板を30分間除冷して、図
1(b)に示すような、表面近傍の酸素濃度が表面に近
づくほど少なくなる低酸素濃度領域3と酸素濃度が均一
な高酸素濃度領域4とを持つSi半導体基板1を得た。
これで一実施例の半導体基板が完成したわけである。First, the specific resistance 10 raised by the CZ method
~ 20 Ω · cm, oxygen concentration 1.6 × 10 18 pieces / cm
From a P-type Si single crystal ingot of 3 (OLD ASTM method), a single-sided mirror-like Si semiconductor substrate 1 as shown in FIG. 1A is cut, etched, and polished. A wavelength of 0.46 μm is applied to the mirror surface 2 of the Si semiconductor substrate 1.
Lamp light with a mirror surface temperature of 600 ° C
It was applied under a vacuum of × 10 -9 Torr for 10 minutes to outwardly diffuse oxygen on both front and back surfaces of the Si semiconductor substrate. The mirror surface temperature was measured with an infrared thermometer. After this 1 × 10 -9 To
The Si semiconductor substrate is cooled for 30 minutes under the pressure of rr, and the low oxygen concentration region 3 where the oxygen concentration near the surface decreases as it approaches the surface as shown in FIG. A Si semiconductor substrate 1 having an oxygen concentration region 4 was obtained.
This completes the semiconductor substrate of one embodiment.
【0012】次にこの基板を加熱した場合の酸素析出物
の分布を図2で説明する。このSi半導体基板1に熱処
理を700℃の窒素ガス中で16時間行った後、次の熱
処理を1,000℃で8時間の窒素ガス中で行うと、低
酸素濃度領域3の半導体回路素子活性化領域には酸素析
出物からなる結晶欠陥は発生せず、この領域から高酸素
濃度領域4に近づくにつれて酸素析出物が多くなる。高
酸素濃度領域4には1平方センチメートルあたり約5×
105 個の酸素析出物5が形成された。酸素析出物の濃
度が変化する低酸素濃度領域3の深さは鏡面2の例で表
面から約50μmであった。酸素析出物5の平均直径は
50nmであった。Next, the distribution of oxygen precipitates when this substrate is heated will be described with reference to FIG. This Si semiconductor substrate 1 is heat-treated in nitrogen gas at 700 ° C. for 16 hours, and then the next heat treatment is performed in nitrogen gas at 1,000 ° C. for 8 hours. Crystal defects composed of oxygen precipitates do not occur in the oxygenated region, and the amount of oxygen precipitates increases from this region toward the high oxygen concentration region 4. Approximately 5 × per square centimeter in the high oxygen concentration region 4.
10 5 oxygen precipitates 5 were formed. In the example of the mirror surface 2, the depth of the low oxygen concentration region 3 where the concentration of oxygen precipitates changes was about 50 μm from the surface. The average diameter of the oxygen precipitates 5 was 50 nm.
【0013】従来の製造方法では、図5で説明した方法
で鏡面32の表面低酸素濃度領域33を形成した。図5
(b)に示すような低酸素濃度領域33を50μm得る
ためには、電熱炉を用いてSi半導体基板31に120
0℃で2時間の窒素ガス中での熱処理を加え、酸素の外
方拡散を行う必要があった。次に700℃16時間,1
000℃8時間の窒息熱処理後、図5(c)のように高
酸素濃度領域34には約1×105 個/cm2 の酸素析
出物35が発生した。酸素析出物35の平均直径は70
nmである。In the conventional manufacturing method, the surface low oxygen concentration region 33 of the mirror surface 32 was formed by the method described with reference to FIG. Figure 5
In order to obtain the low oxygen concentration region 33 of 50 μm as shown in FIG.
It was necessary to perform a heat treatment in nitrogen gas at 0 ° C. for 2 hours to perform outward diffusion of oxygen. Next, 700 ℃ 16 hours, 1
After the suffocation heat treatment at 000 ° C. for 8 hours, about 1 × 10 5 / cm 2 of oxygen precipitates 35 were generated in the high oxygen concentration region 34 as shown in FIG. 5C. The average diameter of the oxygen precipitates 35 is 70
nm.
【0014】本発明の一実施例では鏡面2からの深さ約
50μmの低酸素濃度領域を得るために要した時間は、
加熱時間と冷却時間を合わせて40分間であった。従来
例では熱応力による塑性変形を抑制するため、電熱炉へ
の入炉または出炉にそれぞれ1時間を要したので、総時
間は4時間となる。本発明の適用により酸素の外方拡散
に要する時間を従来法の6分の1に短縮できた。また、
本発明の実施例では後工程の熱処理を加えた時にSi半
導体基板内部に従来例の約5倍の酸素析出物を得ること
ができた。その場合本発明の実施例の方が従来例よりも
酸素析出物のサイズは小さく、Si半導体基板の反りを
測定したところ本発明の実施例では平均15μm、従来
例では平均20μmと、本発明の適用によりSi半導体
基板の反りを抑制できた。In one embodiment of the present invention, the time required to obtain a low oxygen concentration region having a depth of about 50 μm from the mirror surface 2 is
The total heating time and cooling time was 40 minutes. In the conventional example, in order to suppress the plastic deformation due to thermal stress, it took one hour to enter or leave the electric heating furnace, so the total time is four hours. By applying the present invention, the time required for outward diffusion of oxygen can be shortened to 1/6 of that of the conventional method. Also,
In the example of the present invention, when the heat treatment of the subsequent step was applied, about 5 times as many oxygen precipitates as in the conventional example could be obtained inside the Si semiconductor substrate. In that case, the size of oxygen precipitates was smaller in the example of the present invention than in the conventional example, and when the warpage of the Si semiconductor substrate was measured, the average of 15 μm in the example of the present invention and the average of 20 μm in the conventional example. By applying it, the warpage of the Si semiconductor substrate could be suppressed.
【0015】本発明の実施例の図1(b)に示うSi半
導体基板と、従来例の図5(b)に示すSi半導体基板
をX線断層撮影(X−ray−tomography;
XRT)で観察したところ、従来例では20枚のうち1
枚に1〜2ケ所のすべり(スリップ)が観察されたが、
本発明の一実施例ではスリップが発生したものは無かっ
た。また各々のSi半導体基板に1.100℃の水素燃
焼酸化を2時間施した後、選択エッチングを行い鏡面上
を光学顕微鏡で観察した。従来例ではSi半導体基板面
上に1〜3個の積層欠陥が見られたが、本発明の一実施
例では表面上は無欠陥であった。以上のように本発明の
適用により、酸素の外方拡散処理時のダメージから発生
する結晶欠陥を低減することができる。The Si semiconductor substrate shown in FIG. 1 (b) of the embodiment of the present invention and the Si semiconductor substrate shown in FIG. 5 (b) of the conventional example are subjected to X-ray tomography (X-ray-tomography).
When observed with XRT), 1 out of 20 in the conventional example
Although one or two slips were observed on the sheet,
In one embodiment of the present invention, no slip occurred. Further, each of the Si semiconductor substrates was subjected to hydrogen combustion oxidation at 1.100 ° C. for 2 hours, then selectively etched, and the mirror surface was observed with an optical microscope. In the conventional example, one to three stacking faults were found on the surface of the Si semiconductor substrate, but in one example of the present invention, the surface was defect-free. As described above, by applying the present invention, it is possible to reduce crystal defects generated due to damage during outward diffusion of oxygen.
【0016】さらに本発明の実施例と従来例の各々のS
i半導体基板について沸酸,硝酸の混酸でエッチングし
た後少数キャリアのライフタイムを測定したところ、本
発明の実施例では100〜120μsec、従来例では
80〜90μsecであった。本発明の実施例ではガス
系を使用しないため電熱炉よりも重金属汚染が少ない上
に酸素の外方拡散中の重金属汚染が表面に残存しており
エッチングにより除去できたため相方の効果でライフタ
イムがのびたが従来例ではSi半導体基板内部に拡散し
ているため除去しきれずライフタイムが劣化したと考え
られる。Further, each S of the embodiment of the present invention and the conventional example
When the semiconductor substrate was etched with a mixed acid of hydrofluoric acid and nitric acid and the minority carrier lifetime was measured, it was 100 to 120 μsec in the example of the present invention and 80 to 90 μsec in the conventional example. In the example of the present invention, since no gas system is used, the heavy metal contamination is less than that of the electric heating furnace, and the heavy metal contamination during outward diffusion of oxygen remains on the surface and can be removed by etching. It is considered that in the conventional example, the extension has been diffused into the inside of the Si semiconductor substrate, so that it cannot be completely removed and the lifetime is deteriorated.
【0017】本発明の実施例について真空度,熱処理温
度,光源波長の条件を各々変えて本発明の効果を確認し
た。Si半導体基板表面近傍のみを加熱するには、Si
半導体基板への吸収を考慮すると波長1〜0.3μmが
適当と考えられる。また良好な半導体回路素子特性を安
定して得るためには深さ30μm以上の低酸素濃度領域
を形成する必要がある。真空度が10-6〜10-3Tor
rでは30μmの低酸素濃度領域を得るのに800℃で
1時間以上の長時間熱処理を要した。時間を短縮するた
めには800℃より高い温度での熱処理を行わなければ
ならない。しかし、Si半導体基板表面温度が800℃
より高くなると、Si半導体基板が熱応力により塑性変
形を起こしすべり(スリップ)が発生した。また冷却時
間も長くなる。一方400℃より低い温度では酸素の外
方拡散速度が小さく30μmの低酸素濃度領域は得られ
なかった。従って本発明の実施においては10-6Tor
r以下の真空下でSi半導体基板表面温度が400℃〜
800℃になるようなランプ加熱を行うことが適切であ
る。With respect to the examples of the present invention, the effect of the present invention was confirmed by changing the conditions of vacuum degree, heat treatment temperature, and light source wavelength. To heat only near the surface of the Si semiconductor substrate,
Considering absorption into the semiconductor substrate, a wavelength of 1 to 0.3 μm is considered appropriate. Further, in order to stably obtain good semiconductor circuit element characteristics, it is necessary to form a low oxygen concentration region having a depth of 30 μm or more. Vacuum degree is 10 -6 to 10 -3 Tor
For r, long-term heat treatment at 800 ° C. for 1 hour or more was required to obtain a low oxygen concentration region of 30 μm. In order to shorten the time, heat treatment at a temperature higher than 800 ° C must be performed. However, the surface temperature of the Si semiconductor substrate is 800 ° C.
When the height was higher, the Si semiconductor substrate was plastically deformed by thermal stress and slippage occurred. Also, the cooling time becomes longer. On the other hand, at a temperature lower than 400 ° C., the outward diffusion rate of oxygen was small and a low oxygen concentration region of 30 μm could not be obtained. Therefore, in the practice of the present invention, 10 -6 Tor
The surface temperature of the Si semiconductor substrate is 400 ° C under a vacuum of r or less.
It is appropriate to perform lamp heating such that the temperature reaches 800 ° C.
【0018】図3に本発明の他の実施例の断面図を示
す。FIG. 3 shows a sectional view of another embodiment of the present invention.
【0019】図3(a)に示すCZ−Si単結晶インゴ
ットから切り出し研磨,エッチング工程を経て得た、比
抵抗1×10-3Ω・cmのn型Si半導体基板21の鏡
面22上に、1×10-6Torrの圧力下で800℃の
ランプ加熱を波長1μmの赤外ランプで15分間行う。
加熱時に基板21の鏡面22の反対側の面は、基板保持
治具の表面などに接触させて温度上昇を少なくすると共
に真空中への酸素拡散を少なくする。この結果図3
(b)のように、少々低濃度領域が裏面にできるが存在
が無視できるような基板になる。(前述の一実施例でも
基板へ保持治具が当たる所は多少なりとも低濃度領域が
浅くなる)。なおランプ加熱の800℃は、基板鏡面を
赤外線温度計で測定した値である。基板21の鏡面22
の側には、酸素濃度が鏡面に近づくにつれて低くなる低
酸素濃度領域23が形成され、その下に酸素濃度がほぼ
均一(裏面の表面近くでは多少乱れがあるが無視でき
る)で低酸素濃度領域より酸素濃度の高い高酸素濃度領
域24が形成される。これにより本発明の他の実施例は
完成する。On the mirror surface 22 of the n-type Si semiconductor substrate 21 having a specific resistance of 1 × 10 −3 Ω · cm, which was obtained by cutting out from the CZ—Si single crystal ingot shown in FIG. Lamp heating at 800 ° C. under a pressure of 1 × 10 −6 Torr is performed for 15 minutes with an infrared lamp having a wavelength of 1 μm.
During heating, the surface of the substrate 21 opposite to the mirror surface 22 is brought into contact with the surface of the substrate holding jig or the like to reduce the temperature rise and oxygen diffusion into the vacuum. As a result of this, FIG.
As in (b), the substrate has a slightly low-concentration region on its back surface, but its existence can be ignored. (Even in the above-described embodiment, the low-concentration region becomes shallower where the holding jig comes into contact with the substrate). The lamp heating temperature of 800 ° C. is a value measured on the mirror surface of the substrate with an infrared thermometer. Mirror surface 22 of substrate 21
A low oxygen concentration region 23 in which the oxygen concentration decreases as it approaches the mirror surface is formed on the side of, and the oxygen concentration is substantially uniform under the low oxygen concentration region 23. A high oxygen concentration region 24 having a higher oxygen concentration is formed. This completes another embodiment of the present invention.
【0020】次にこの基板21の一使用例および効果を
図4を用いて説明する。図3(b)の基板21を図4
(a)のように650℃で10時間の窒素ガス中で熱処
理を加え高酸素濃度領域24内部に酸素析出核25を形
成した。図4(b)のように、Si半導体基板21上に
n- エピタキシャル層26を1050℃で50μm成長
させたところ、高酸素濃度領域24には酸素析出物27
が発生した。選択エッチング後、光学顕微鏡で観察した
が、n- エピタキシャル層26上には結晶欠陥は観察さ
れなかった。Si半導体基板内部には約3×105 個/
cm2 の酸素析出物が発生した。Next, an example of use and effect of the substrate 21 will be described with reference to FIG. The substrate 21 of FIG.
As shown in (a), heat treatment was performed in nitrogen gas at 650 ° C. for 10 hours to form oxygen precipitation nuclei 25 inside the high oxygen concentration region 24. As shown in FIG. 4B, when an n − epitaxial layer 26 was grown on the Si semiconductor substrate 21 at 1050 ° C. for 50 μm, oxygen precipitates 27 were formed in the high oxygen concentration region 24.
There has occurred. After selective etching, it was observed with an optical microscope, but no crystal defect was observed on the n − epitaxial layer 26. About 3 × 10 5 pieces /
cm 2 of oxygen precipitate was generated.
【0021】Si半導体基板に低酸素濃度領域を形成せ
ずに650℃10時間の窒素熱処理を加えた場合、n-
エピタキシャル層26成長後、約3×105 個/cm2
の酸素析出物27が発生したが、n- エピタキシャル上
に10〜15個の積層欠陥が発生した。Si半導体基板
表面の結晶欠陥がエピタキシャル成長に影響を与えたと
考えられる。Si半導体基板に何らの処理を加えずにエ
ピタキシャル成長を行うと、表面積層欠陥は1〜4個、
基板内部の酸素析出は約2×104 個であった。When the nitrogen heat treatment is applied to the Si semiconductor substrate at 650 ° C. for 10 hours without forming the low oxygen concentration region, n −
After growth of the epitaxial layer 26, about 3 × 10 5 pieces / cm 2
Although oxygen precipitates 27 were generated, 10 to 15 stacking faults were generated on the n − epitaxial layer. It is considered that crystal defects on the surface of the Si semiconductor substrate affected the epitaxial growth. When epitaxial growth is performed on the Si semiconductor substrate without any treatment, 1 to 4 surface stacking faults occur,
The oxygen precipitation inside the substrate was about 2 × 10 4 .
【0022】Si半導体基板内部の酸素析出物を増やし
ながら表面状態の良好なエピタキシャル基板を得るため
には、Si半導体基板表面近傍に低酸素濃度領域を形成
して、表面の結晶欠陥を低減する必要がある。一方図5
に見られるような従来の方法で低酸素濃度領域を形成し
た後、650℃10時間の窒素処理を加えてエピタキシ
ャル成長を行った場合には面の積層欠陥が1〜3個基板
内部の酸素析出物は約9×104 個/cm2 であった。
本発明の実施例では、Si半導体基板内部に従来の方法
によるよりも多数の酸素析出物を形成し、かつ表面欠陥
の少ないエピタキシャル基板を得ることができる。In order to obtain an epitaxial substrate having a good surface condition while increasing oxygen precipitates in the Si semiconductor substrate, it is necessary to form a low oxygen concentration region near the surface of the Si semiconductor substrate to reduce crystal defects on the surface. There is. Meanwhile, FIG.
When a low oxygen concentration region is formed by a conventional method as shown in Fig. 3, when epitaxial growth is performed by adding nitrogen treatment at 650 ° C for 10 hours, 1 to 3 stacking faults on the surface are oxygen precipitates in the substrate. Was about 9 × 10 4 pieces / cm 2 .
In the embodiment of the present invention, it is possible to obtain an epitaxial substrate in which a larger number of oxygen precipitates are formed inside the Si semiconductor substrate and the number of surface defects is smaller than in the conventional method.
【0023】[0023]
【発明の効果】以上説明したように本発明はSi半導体
基板の半導体回路素子形成面に10-6Torr以下の高
真空下で波長1μm〜0.2μの光源を用いてランプ加
熱を行うことによって、400℃〜800℃の低温で酸
素の外方拡散を生じさせ、半導体回路素子活性領域を含
む表面近傍を低酸素濃度化することができる。As described above, according to the present invention, the lamp is heated on the surface of the Si semiconductor substrate on which the semiconductor circuit elements are formed by using a light source having a wavelength of 1 μm to 0.2 μ under a high vacuum of 10 −6 Torr or less. It is possible to cause outward diffusion of oxygen at a low temperature of 400 ° C. to 800 ° C. and reduce the oxygen concentration near the surface including the semiconductor circuit element active region.
【0024】酸素の外方拡散処理の低温化により、熱応
力によるすべり(スリップ)を抑制し、入炉出炉に要す
る時間を短縮できるという効果がある。真空中で加熱す
るためSi半導体基板表面と雰囲気ガスが反応して結晶
欠陥を生じることもない。熱処理中の重金属汚染は低温
熱処理のためSi半導体基板内部には拡散せず表面に残
存するので、洗浄等の後工程で除去できる。さらに、高
温に加熱されるのはSi半導体基板表面近傍のみなの
で、Si半導体基板内部の酸素析出核は熱処理中に分解
消滅しない。従って後工程においてSi半導体基板内部
により多くの酸素析出物が形成され、同時に個々の酸素
析出物の成長は抑制され二次欠陥の発生によるSi半導
体基板の塑性変形が回避できるという効果を有する。By lowering the temperature of the outward diffusion process of oxygen, there is an effect that slippage (slip) due to thermal stress can be suppressed and the time required for entering and exiting the furnace can be shortened. Since heating is performed in a vacuum, the surface of the Si semiconductor substrate does not react with the atmospheric gas to cause crystal defects. Since the heavy metal contamination during the heat treatment does not diffuse inside the Si semiconductor substrate due to the low temperature heat treatment and remains on the surface, it can be removed in a subsequent step such as cleaning. Furthermore, since only the vicinity of the surface of the Si semiconductor substrate is heated to a high temperature, oxygen precipitation nuclei inside the Si semiconductor substrate do not decompose and disappear during the heat treatment. Therefore, a large amount of oxygen precipitates are formed inside the Si semiconductor substrate in the subsequent step, and at the same time, the growth of individual oxygen precipitates is suppressed and the plastic deformation of the Si semiconductor substrate due to the generation of secondary defects can be avoided.
【図1】本発明の一実施例を示す製造工程順断面図であ
る。FIG. 1 is a sectional view in order of manufacturing steps, showing an embodiment of the present invention.
【図2】本発明の一実施例の使用例を示す断面図であ
る。FIG. 2 is a sectional view showing a usage example of an embodiment of the present invention.
【図3】本発明の他の実施例を示す製造工程別断面図で
ある。FIG. 3 is a cross-sectional view for each manufacturing process showing another embodiment of the present invention.
【図4】本発明の他の実施例の使用例を示す断面図であ
る。FIG. 4 is a cross-sectional view showing a usage example of another embodiment of the present invention.
【図5】従来の製造方法を示す製造工程別断面図であ
る。FIG. 5 is a cross-sectional view of manufacturing steps showing a conventional manufacturing method.
1,21,31 Si半導体基板 2,22,32 鏡面 3,23,33 低酸素濃度領域 4,24,34 高酸素濃度領域 5,27,35 酸素析出物 25 酸素析出核 26 エピタキシャル層 1,21,31 Si semiconductor substrate 2,22,32 Mirror surface 3,23,33 Low oxygen concentration region 4,24,34 High oxygen concentration region 5,27,35 Oxygen precipitate 25 Oxygen precipitation nucleus 26 Epitaxial layer
Claims (3)
体基板の表面に低酸素濃度領域を形成する工程を有する
ことを特徴とする半導体基板の製造方法。1. A method of manufacturing a semiconductor substrate, comprising the step of heating the semiconductor substrate in a vacuum to form a low oxygen concentration region on the surface of the semiconductor substrate.
とを特徴とする請求項1の半導体基板記載の製造方法。2. The manufacturing method according to claim 1, wherein the vacuum is 10 −6 Torr or less.
以下であることを特徴とする請求項1記載の半導体基板
の製造方法。3. The heating temperature is 400 ° C. or higher and 800 ° C.
The method of manufacturing a semiconductor substrate according to claim 1, wherein:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21570091A JPH0555233A (en) | 1991-08-28 | 1991-08-28 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21570091A JPH0555233A (en) | 1991-08-28 | 1991-08-28 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0555233A true JPH0555233A (en) | 1993-03-05 |
Family
ID=16676715
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21570091A Pending JPH0555233A (en) | 1991-08-28 | 1991-08-28 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0555233A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0870009A (en) * | 1994-08-30 | 1996-03-12 | Shin Etsu Handotai Co Ltd | Manufacture of semiconductor silicon wafer |
JPH11145146A (en) * | 1997-11-10 | 1999-05-28 | Nec Corp | Semiconductor substrate and its manufacture |
WO2001082358A1 (en) * | 2000-04-24 | 2001-11-01 | Shin-Etsu Handotai Co.,Ltd. | Production method of silicon mirror wafer |
JP2003332344A (en) * | 2002-03-05 | 2003-11-21 | Sumitomo Mitsubishi Silicon Corp | Silicon single-crystal layer and manufacturing method thereof |
JP2006179592A (en) * | 2004-12-21 | 2006-07-06 | Fuji Film Microdevices Co Ltd | Substrate for forming solid-state image sensor, solid-state image sensor using it, and its manufacturing method |
JP2018098314A (en) * | 2016-12-12 | 2018-06-21 | 株式会社Screenホールディングス | Thermal treatment method of silicon substrate |
-
1991
- 1991-08-28 JP JP21570091A patent/JPH0555233A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0870009A (en) * | 1994-08-30 | 1996-03-12 | Shin Etsu Handotai Co Ltd | Manufacture of semiconductor silicon wafer |
JPH11145146A (en) * | 1997-11-10 | 1999-05-28 | Nec Corp | Semiconductor substrate and its manufacture |
WO2001082358A1 (en) * | 2000-04-24 | 2001-11-01 | Shin-Etsu Handotai Co.,Ltd. | Production method of silicon mirror wafer |
JP2003332344A (en) * | 2002-03-05 | 2003-11-21 | Sumitomo Mitsubishi Silicon Corp | Silicon single-crystal layer and manufacturing method thereof |
JP2006179592A (en) * | 2004-12-21 | 2006-07-06 | Fuji Film Microdevices Co Ltd | Substrate for forming solid-state image sensor, solid-state image sensor using it, and its manufacturing method |
JP2018098314A (en) * | 2016-12-12 | 2018-06-21 | 株式会社Screenホールディングス | Thermal treatment method of silicon substrate |
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