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JPH0555841A - Transistor high frequency amplifier circuit - Google Patents

Transistor high frequency amplifier circuit

Info

Publication number
JPH0555841A
JPH0555841A JP3216796A JP21679691A JPH0555841A JP H0555841 A JPH0555841 A JP H0555841A JP 3216796 A JP3216796 A JP 3216796A JP 21679691 A JP21679691 A JP 21679691A JP H0555841 A JPH0555841 A JP H0555841A
Authority
JP
Japan
Prior art keywords
high frequency
voltage
frequency signal
transistor
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3216796A
Other languages
Japanese (ja)
Inventor
Yuzo Yoneyama
祐三 米山
Masayoshi Yamashita
正義 山下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Saitama Ltd
Original Assignee
NEC Corp
NEC Saitama Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Saitama Ltd filed Critical NEC Corp
Priority to JP3216796A priority Critical patent/JPH0555841A/en
Publication of JPH0555841A publication Critical patent/JPH0555841A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To reduce the feedback capacity of a high frequency amplifying transistor(TR) and to reduce the leakage of a high frequency signal by impressing voltage to the collector electrode of the TR even when a high frequency output signal is OFF. CONSTITUTION:A high frequency signal inputted to an input terminal 1 is allowed to flow into the base of the high frequency signal amplifying TR 9 through a DC removing capacitor 2. Voltage is impressed from a DC power supply 8 to the collector terminal of the TR 9, and when a switch circuit 10 is closed, the base voltage of the TR 9 is impressed through a bias resistor 4 and the TR 9 executes amplifying operation and outputs the operated result to an output terminal 7. When the switch 10 is opened, the voltage of the power supply 8 is impressed to the collector of the TR 9. The collector voltage is set up to an area in which the base DC bias current of the TR 9 has no amplified gain by a resistor 5. By this constitution, the feedback capacity is reduced as compared with a case impressing no voltage between the base and collector of the TR 9 and the leakage of the high frequency signal can be reduced.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は高周波増幅回路に利用す
る。特に、高周波出力信号の断続に関する。
The present invention is used in a high frequency amplifier circuit. In particular, it relates to intermittent high frequency output signals.

【0002】[0002]

【従来の技術】従来のトランジスタ高周波増幅回路は高
周波出力信号が断のとき、トランジスタに印加されるす
べての電圧を断とするので、コレクタ端子とエミッタ端
子間の電位差はゼロとなる。
2. Description of the Related Art In a conventional transistor high frequency amplifier circuit, when a high frequency output signal is cut off, all the voltages applied to the transistors are cut off, so that the potential difference between the collector terminal and the emitter terminal becomes zero.

【0003】[0003]

【発明が解決しようとする課題】この状態ではコレクタ
とベース間の帰還容量が電圧印加状態の場合と比較して
上昇するため、出力端子に現れる高周波信号の漏れ電力
が大きくなる。
In this state, the feedback capacitance between the collector and the base rises as compared with the case where a voltage is applied, so that the leakage power of the high frequency signal appearing at the output terminal becomes large.

【0004】本発明はこのような背景に行われたもので
あり、トランジスタ高周波増幅回路において、高周波出
力信号が断のときの漏れ電力を低減させる回路の提供を
目的とする。
The present invention has been made in view of such a background, and an object thereof is to provide a circuit for reducing leakage power when a high frequency output signal is disconnected in a transistor high frequency amplifier circuit.

【0005】[0005]

【課題を解決するための手段】本発明は高周波出力信号
を断続させる回路手段を備えたトランジスタ高周波増幅
回路において前記回路手段は、トランジスタのコレクタ
電極に電圧を印加した状態で、そのトランジスタのベー
ス直流バイアス電流をそのトランジスタの増幅利得のな
い領域に設定するスイッチ回路を含むことを特徴とす
る。
According to the present invention, in a transistor high frequency amplifier circuit having circuit means for connecting and disconnecting a high frequency output signal, said circuit means is a base DC of the transistor in the state where a voltage is applied to the collector electrode of the transistor. It is characterized by including a switch circuit for setting a bias current in a region where there is no amplification gain of the transistor.

【0006】なお、前記スイッチ回路は半導体スイッチ
回路で構成することもできる。
The switch circuit may be a semiconductor switch circuit.

【0007】[0007]

【作用】高周波出力信号が断のときも高周波増幅用トラ
ンジスタのコレクタ電極に電圧を印加することで、トラ
ンジスタの帰還容量を低下させることができる。
The feedback capacitance of the transistor can be reduced by applying a voltage to the collector electrode of the transistor for high frequency amplification even when the high frequency output signal is cut off.

【0008】[0008]

【実施例】本発明実施例の構成を図1および図2を参照
して説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of an embodiment of the present invention will be described with reference to FIGS.

【0009】図1および図2は本発明実施例の構成図で
ある。本装置は高周波出力信号を断続させる回路手段を
備えたトランジスタ高周波増幅回路において前記回路手
段は、高周波信号増幅用トランジスタ9のコレクタ電極
に電圧を印加した状態で、その高周波信号増幅用トラン
ジスタ9のベース直流バイアス電流をその高周波信号増
幅用トランジスタ9の増幅利得のない領域に設定するス
イッチ回路10を含むことを特徴とする。
1 and 2 are block diagrams of an embodiment of the present invention. This device is a transistor high-frequency amplifier circuit provided with circuit means for connecting and disconnecting a high-frequency output signal, wherein the circuit means applies a voltage to the collector electrode of the high-frequency signal amplifying transistor 9, and the base of the high-frequency signal amplifying transistor 9 It is characterized by including a switch circuit 10 for setting a DC bias current in a region where there is no amplification gain of the high frequency signal amplifying transistor 9.

【0010】なお、図1に示す前記スイッチ回路10
は、図2に示すように半導体スイッチ回路14にするこ
ともできる。
The switch circuit 10 shown in FIG.
Can also be a semiconductor switch circuit 14 as shown in FIG.

【0011】次に本発明実施例の動作を図1および図2
を参照して説明する。
Next, the operation of the embodiment of the present invention will be described with reference to FIGS.
Will be described.

【0012】高周波信号入力端子1に入力された高周波
信号は、直流除去コンデンサ2を通り高周波信号増幅用
トランジスタ9のベースに流入する。また、直流電源8
からは高周波信号増幅用トランジスタ9のコレクタ端子
に電圧が印加され、スイッチ回路10が閉じたときバイ
アス抵抗4を介して高周波信号増幅用トランジスタ9の
ベースに電圧が印加され、高周波信号増幅用トランジス
タ9は増幅動作を行う。増幅された高周波信号は直流除
去コンデンサ3を通り高周波出力端子7に出力される。
次にスイッチ回路10が開いたときは高周波信号増幅用
トランジスタ9のベースに電圧が印加されないため、高
周波出力端子7に出力される高周波信号は高周波信号増
幅用トランジスタ9のベース・コレクタ間の帰還容量に
より決定される。高周波信号増幅用トランジスタ9には
スイッチ回路10が開いた後も、直流電源8の電圧がバ
イアス抵抗5を通り回路稼働中は常時高周波信号増幅用
トランジスタ9のコレクタ電極に印加されている。そこ
で、ベース・コレクタ間に電圧を印加しない場合の帰還
容量よりも電圧を印加した場合の帰還容量の方がより小
くなることから、高周波出力端子7に出力される高周波
信号の漏れを低減できる。
The high frequency signal input to the high frequency signal input terminal 1 passes through the direct current removing capacitor 2 and flows into the base of the high frequency signal amplifying transistor 9. DC power supply 8
Applies a voltage to the collector terminal of the high frequency signal amplifying transistor 9, and a voltage is applied to the base of the high frequency signal amplifying transistor 9 via the bias resistor 4 when the switch circuit 10 is closed. Performs an amplifying operation. The amplified high frequency signal passes through the direct current removing capacitor 3 and is output to the high frequency output terminal 7.
Next, when the switch circuit 10 is opened, no voltage is applied to the base of the high-frequency signal amplifying transistor 9, so that the high-frequency signal output to the high-frequency output terminal 7 has a feedback capacitance between the base and collector of the high-frequency signal amplifying transistor 9. Determined by Even after the switching circuit 10 is opened to the high frequency signal amplifying transistor 9, the voltage of the DC power supply 8 passes through the bias resistor 5 and is constantly applied to the collector electrode of the high frequency signal amplifying transistor 9 during circuit operation. Therefore, since the feedback capacitance when the voltage is applied is smaller than the feedback capacitance when the voltage is not applied between the base and the collector, the leakage of the high frequency signal output to the high frequency output terminal 7 can be reduced. .

【0013】本発明実施例では図2に示すように図1の
スイッチ回路10を半導体スイッチ回路14に置き換え
ている。半導体スイッチ回路制御信号入力端子13に入
力される制御信号をON・OFFすることより半導体ス
イッチ回路用トランジスタ11がON・OFFして半導
体スイッチ回路を構成する。
In the embodiment of the present invention, as shown in FIG. 2, the switch circuit 10 of FIG. 1 is replaced with a semiconductor switch circuit 14. By turning on / off the control signal input to the semiconductor switch circuit control signal input terminal 13, the semiconductor switch circuit transistor 11 is turned on / off to form a semiconductor switch circuit.

【0014】[0014]

【発明の効果】高周波増幅用トランジスタのコレクタ電
極に回路稼働中は常時電圧を印加することで高周波信号
出力が断のときのトランジスタの帰還容量を低下させ、
高周波信号の漏れを低減させることができる。
EFFECTS OF THE INVENTION By constantly applying a voltage to the collector electrode of a high frequency amplifying transistor during circuit operation, the feedback capacitance of the transistor when the high frequency signal output is cut off is reduced,
It is possible to reduce leakage of high frequency signals.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明実施例の構成図。FIG. 1 is a configuration diagram of an embodiment of the present invention.

【図2】本発明実施例のスイッチ回路を半導体スイッチ
回路で構成したときの構成図。
FIG. 2 is a configuration diagram when the switch circuit of the embodiment of the present invention is configured by a semiconductor switch circuit.

【符号の説明】[Explanation of symbols]

1 高周波信号入力端子 2〜3 直流除去コンデンサ 4〜6 バイアス抵抗 7 高周波出力端子 8 直流電源 9 高周波信号増幅用トランジスタ 10 スイッチ回路 11 半導体スイッチ回路用トランジスタ 12 バイパスコンデンサ 13 半導体スイッチ回路制御信号入力端子 14 半導体スイッチ回路 1 High Frequency Signal Input Terminal 2-3 DC Removal Capacitor 4-6 Bias Resistor 7 High Frequency Output Terminal 8 DC Power Supply 9 High Frequency Signal Amplifying Transistor 10 Switch Circuit 11 Semiconductor Switch Circuit Transistor 12 Bypass Capacitor 13 Semiconductor Switch Circuit Control Signal Input Terminal 14 Semiconductor switch circuit

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】高周波出力信号を断続させる回路手段を備
えたトランジスタ高周波増幅回路において、 前記回路手段は、トランジスタのコレクタ電極に電圧を
印加した状態でそのトランジスタのベース直流バイアス
電流をそのトランジスタの増幅利得のない領域に設定す
るスイッチ回路を含むことを特徴とするトランジスタ高
周波増幅回路。
1. A transistor high frequency amplifier circuit comprising circuit means for connecting and disconnecting a high frequency output signal, wherein the circuit means amplifies a base DC bias current of the transistor in a state where a voltage is applied to a collector electrode of the transistor. A transistor high-frequency amplifier circuit including a switch circuit for setting a gain-free region.
【請求項2】前記スイッチ回路は半導体スイッチ回路で
ある請求項1記載のトランジスタ高周波増幅回路。
2. The transistor high frequency amplifier circuit according to claim 1, wherein the switch circuit is a semiconductor switch circuit.
JP3216796A 1991-08-28 1991-08-28 Transistor high frequency amplifier circuit Pending JPH0555841A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3216796A JPH0555841A (en) 1991-08-28 1991-08-28 Transistor high frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3216796A JPH0555841A (en) 1991-08-28 1991-08-28 Transistor high frequency amplifier circuit

Publications (1)

Publication Number Publication Date
JPH0555841A true JPH0555841A (en) 1993-03-05

Family

ID=16694015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3216796A Pending JPH0555841A (en) 1991-08-28 1991-08-28 Transistor high frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JPH0555841A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10239854A1 (en) * 2002-08-29 2004-03-11 Infineon Technologies Ag Preamplifier circuit and receiving arrangement with the preamplifier circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01248706A (en) * 1988-03-30 1989-10-04 Anritsu Corp High frequency amplifier with switch

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01248706A (en) * 1988-03-30 1989-10-04 Anritsu Corp High frequency amplifier with switch

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10239854A1 (en) * 2002-08-29 2004-03-11 Infineon Technologies Ag Preamplifier circuit and receiving arrangement with the preamplifier circuit
US7643814B2 (en) 2002-08-29 2010-01-05 Infineon Technologies Ag Reception arrangement with preamplifier circuit

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