JPH05506740A - Circuits and methods for driving and controlling gas discharge lamps - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] BACKGROUND OF THE INVENTION Circuits and Methods for Driving and Controlling Gas Discharge Lamps Nowadays, they consume less energy than incandescent lamps to produce the same amount of light. Fluorescent lamps are gaining popularity. In many modern offices, incandescent lamps are It has been completely replaced by light lamps. However, in other applications, incandescent lamps are not being replaced to the same extent by energy-efficient fluorescent lamps. .

Since the advent of electric lighting, the light level of one lamp or group of lamps can be adjusted according to changes in activity. It is desirable to be able to change the file. Dimming circuits for incandescent lamps are well known. However, dimmer circuits for fluorescent lamps are difficult to construct. efficient fluorescent lamps Previous attempts to construct dimmer devices have not been completely successful. In particular, fireflies Difficulties in achieving a light lamp start and maintaining the best lamp life There was.

The dimmer circuit for fluorescent lamps must be compared to incandescent lamps in order to achieve the highest functionality. In case some inherent shortcomings of fluorescent lamps should be compensated. First, fluorescent lamp The screen must be "started" at full brightness. In general, under dimmed conditions, It doesn't start. In any case, a dim start will shorten the lamp life. . Second, fluorescent lamps produce a glow discharge as a result of continuous excitation. Excitation Although the bell can be reduced after the initial start, this level of low encouragement If there is even a momentary interruption in excitation during startup, the lamp will go out and restart with a higher excitation. You will have to start the process. Third, fluorescent lamps must be started outside the home. Since it requires a ballast circuit, the power consumption of this ballast circuit should be minimized and the lamp It is important to start the lamp so as not to shorten its life.

Finally, excitation of fluorescent lamps requires the accumulation of a potentially dangerous charge, so It becomes important to isolate the control circuit of the pump from the excitation circuit.

Additionally, an ideal fluorescent lamp dimming circuit provides safeguards against electric shock. We should be prepared. In particular, the output terminals of the inverter should be connected to or connected to ground. connected resistively or capacitively to the inverter case. Imba Depending on the output voltage, frequency, and amount of resistive or capacitive coupling of the A significant amount of high-frequency current may flow between the inverter output terminal and ground. There is. This can cause electrical shock and fire. Is this the reason? This prevents current that may flow between the inverter output terminal and ground. There is therefore a need for a fluorescent lamp dimmer circuit that reduces or suppresses fluorescent lamp dimmers.

Summary of the invention Therefore, the main objective of the present invention is to provides a resonant inverter circuit capable of starting a discharge lamp; The goal is to ensure that the maximum current rating of the inverter's power switch is not exceeded.

Another main object of the invention is to harmonic mode of gas discharge lamp to facilitate lighting. The aim is to realize the start of

Another main object of the invention is to control the power supply so that the power supply is responsive to a control voltage input. An object of the present invention is to realize a new and improved control method and control circuit.

Other main objectives of the invention are to maintain optimal lamp life and to of fluorescent lamps or high-intensity discharge lamps while ensuring lamp starting. The objective is to provide a new and improved system for

Yet another main object of the invention is to provide a solid state circuit for lamp stabilization. to provide a new and improved system for preventing electric shock in It's there.

A more specific object of the invention is to provide an initial blocking period for ramp starting. consists of pulses with a variable duty cycle that determines the lamp brightness. A new and improved method for dimming gas discharge lamps by generating pulse train signals. The objective is to provide an improved control system.

Another object of the present invention is to integrate a pulse train signal into a DC level signal, The level signal is applied as a control signal to the solid-state ballast for dimming. By generating a pulse train signal consisting of pulses with a variable duty cycle, , to provide a new and improved control system for dimming gas discharge lamps. It's there.

Yet another object of the invention is to start at full brightness and then reduce it to a desired level. Provides a new and improved control system for the dimming of luminous gas discharge lamps. There are many things.

Another object of the present invention is to detect the occurrence of a momentary power interruption that turns off the lamp, and A guide that restarts the lamp at high brightness and then dims the lamp to the desired level. to provide a new and improved control system for the dimming of flash discharge lamps. be.

Yet another object of the invention is to have a brightness control function that is adjustable by the user. Provides a new and improved control system for dimming gas discharge lamps and Avoid inadvertent damage to lamps and circuits and excessive reduction of light intensity through temperature control. The maximum amount of dimming is set by a control function separate from the brightness control to prevent There are many things.

A final object of the invention is to provide a low current electrically isolated ballast circuit that drives the lamp. A novel method for dimming gas discharge lamps with a solid-state control circuit for pressure The objective is to provide an improved control system.

Other objects of the invention will be apparent to those skilled in the art through the specification, claims and related drawings. That becomes clear.

The above purpose is to create a resonant circuit in which the lamp is driven by a resonant circuit of the fundamental frequency or harmonics. The solution is a solid-state ballast circuit for lamps using inverters.

The invention further provides that between ground and one of the two output terminals of the inverter voltage source, a sensing circuit connected thereto and a limiting circuit responsive to the sensing circuit; For example, the detection circuit is connected between one of the output terminals of the inverter and ground. to detect any high frequency current that may flow through the human body due to the It establishes a current path from the ground to the first output terminal of the voltage source so that The limiting circuit responds when the high frequency current flowing through the human body exceeds a predetermined limit. This limits the current flowing through the human body.

The present invention provides a method for controlling solid-state ballasts for lamps using inverters. The present invention also provides a control circuit and a control method for controlling the same. The control circuit is a dual A pulse train signal consisting of pulses with a variable cycle is generated. The pulse train signal is integrated into a DC signal, which the solid state ballast runs. This is used to control the degree of dimming of the drop. The duty cycle of the pulse is If it does, the level of the DC signal will drop and the ballast will dim the lamp. . Conversely, if the duty cycle of the pulse decreases, the brightness of the lamp decreases. Rise.

The control circuit includes a delay circuit that suppresses the output of the pulse at the time of power-up. , this results in the lamp starting at maximum brightness. After that, the lamp brightness reaches the desired level. A delay circuit adjusts the pulse signal so that it adjusts smoothly to the level.

In the event of a momentary power outage, instead of the lamp restarting from a lower brightness, the lamp will restart from maximum brightness and then smoothly dim to the desired brightness. A reset circuit resets the delay circuit. The brightness control circuit is controlled by the user. The adjustable pulse control circuit allows you to set the desired brightness restrictions. The overcurrent path is the Prohibit pulse output.

Brief description of the drawing Figure 1 is a block diagram of a resonant inverter according to the prior art, and Figure 2 is a gas discharge lamp. Figure 3 is a block diagram of a resonant inverter used in The equivalent circuit diagram with an electric lamp, Figure 4, shows the resonance mode at the fundamental frequency of the excitation signal. As with the start, parallel resonant mode operation at the fundamental frequency of the excitation signal is used. A circuit diagram showing a first example of a resonant inverter circuit of the present invention, FIG. 5 is a circuit diagram showing a first example of the current detection circuit used in the circuit of FIG. 4, and FIG. is a circuit diagram showing a second example of the current detection circuit used in the circuit of FIG. 4, and FIG. Resonance of the present invention using harmonic mode start and fundamental frequency resonance mode operation A circuit diagram showing another example of an inverter circuit, Figure 8, is a circuit diagram showing another example of an inverter circuit. A circuit showing another example of the resonant inverter circuit of the present invention using resonant mode operation 9 shows a resonant inverter circuit of the present invention using harmonic mode start. Schematic diagram showing other examples, Figure 10 shows the lighting of the gas discharge lamp that occurs at both ends of the lamp in the circuit of Figure 9. A graph of the ringing signal for producing the gas discharge lamp of FIG. 9, FIG. During operation, that is, after lighting the lamp according to the voltage waveform shown in FIG. A graph of the voltage generated, FIG. 12, shows the voltage generated across the gas discharge lamp in the circuit of FIG. The resonant inverter circuit of the present invention introduces an example of a detection circuit for detecting the voltage A circuit diagram showing other variations, FIG. 13 is a block diagram of an offline power inverter, and FIG. 14A is a block diagram of an offline power inverter. The circuit diagrams of full-wave rectifier circuits used in power inverters, Figures 14B and 14C are , voltage waveform diagrams at different points in the rectifier circuit of FIG. 14A, FIG. 15 shows the integrated control Block diagram of offline resonant inverter using circuit, Figure 16 shows that a person inadvertently touches one of the output terminals of an inverter and In response, the power inverter shown in Figure 13 Figure 17, a circuit diagram showing the current path formed in the motor, is a simplified version of the circuit in Figure 16. The circuit diagram shown in FIG. 18 corresponds to the circuit of FIG. 16 and is for a power inverter. Circuit diagram with output transformer, FIG. 19 is a simplified circuit diagram of the circuit in FIG. 18, and FIGS. A circuit diagram showing an example of a sensing circuit used in a flow limiting circuit, FIG. 22 shows an example of the connection between the detection circuit of FIG. 21 and the power inverter of FIG. Figure 23 is a block diagram showing a relay position that does not operate the inverter. , how the power inverter in Figure 13 can be used to drive a fluorescent lamp. Figure 24 is a circuit diagram illustrating how the output terminals of the inverter can be connected. 1 and earth, and the dangerous situation that occurs when the fluorescent lamp is disconnected. A circuit diagram corresponding to the example shown in FIG. 23, Figure 25 shows how to inhibit controller operation for the power inverter when necessary. A circuit diagram corresponding to FIG. 24 and FIG. 26 further illustrating a detection circuit for detecting a circuit diagram showing the direct connection of the control circuit of the present invention to a resonant inverter circuit of; Figure 27 shows how the control circuit of the present invention is connected to a resonant inverter circuit using a photocoupler. A circuit diagram corresponding to FIG. 26 showing a continued example, and FIG. 28 is a circuit diagram of the control circuit of the present invention. 29 shows the current detection of UC2843 by the circuit related to the control circuit of the present invention. It is a graph showing a waveform applied to a terminal.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The drawing shows the basic and high frequencies for starting and operating the gas discharge lamp. Circuits related to multiple embodiments using harmonic resonance modes are drawn, and the drawings are described below. refer. However, like reference numbers represent like circuit elements.

The invention consists of three main circuit parts. Follow this step by step with reference to related drawings. I will explain next. The three main circuit parts are (1) resonant inverter circuit, (2) current and (3) a control circuit.

resonant inverter circuit A block diagram of a resonant inverter using the 5G2525 integrated circuit (IC). Shown in Figure 1. The oscillation frequency of this IC is determined by the combination of Cr2 and RT2. It will be done. Typically, a resistor R4 is required between terminals P15 and PI3. Resistance R5 and The resistive voltage divider circuit consisting of Determine the magnitude of the DC voltage applied to the terminal (pin 2). This voltage eventually , duty cycle of the pulse output from pin 14 and pin 11 of 5G2525 The size of the wheel is set. Due to circuit requirements, the inverting terminal (pin 1) of 5G2525 ) and the compensation terminal (pin 9) to stabilize the loop of the IC. Z2 is required.

The output signals from pins 11 and 14 turn on Q2 and Q3 periodically and alternately. ・Turn off. In other words, when Q2 is on, Q3 is off, and when Q2 is off, Q3 is on. While Q2 is on, energy is transferred to Q2 and the resonant inductor. LR and charges the resonant capacitor CR. After this, Q2 is off and Q3 is off. When turned on, the energy stored in CR flows back through LR and Q3. . According to this configuration, the pulse repetition frequency is the resonance of the LC (LR and CR) circuit network. When the frequency is matched, the circuit can be called a resonant inverter.

An efficient and economical ballast configuration based on resonant inverter technology is shown in Figure 2. . In Figure 2, LR and CR constitute a resonant circuit, and lamp T1 acts as a load on CR. Become. FIG. 3 is an equivalent circuit diagram of the connection of LR, CR and T1 in FIG. 1 impedance is represented by RL. Each illustration of the circuit parameters in Figure 3 The impedance can be expressed as follows. In other words, the load is an impedance The impedance of the resonant capacitor is 1/jw (CR) -- jX (CR), the impedance of the resonant inductor is jW (LR) - jXLR be. Here, j is a complex number and is w-2(fr)-X. fr is the excitation frequency It is a number. At the resonance point, it is XCR-XLR. Furthermore, f r-1/w (L R, CR,) It is.

In the equivalent circuit shown in Figure 3, the voltage applied to CR or RL under resonance conditions is LR It also depends on the quality of CR or what is called the Q factor, and the value of RL.

In other words, at the resonance point, jXLR-jXCR-0, that is, the inductor and capacitor cancel out the impedance. In this example, RL is placed on lamp T1. Can be replaced. In the initial state before lamp T1 lights up, the impedance of the lamp is is infinite (i.e., no current flows), resulting in CR or Tl (Fig. 2) The voltage applied to 2) gradually increases. However, the voltage across T1 Once reaches the lamp lighting potential, the lamp T1 lights up and its impedance goes down. At this time, due to the characteristics of the lamp, the voltage across T1 is the normal voltage of the lamp. Clamp to the operating potential and maintain that potential. This point is important when starting fluorescent lamps. It is a convenient and reliable mechanism for operation and operation.

During normal operation, the current flowing through resonant inductor LR flows through resonant capacitor CR The vector sum of the current flowing through the load and the current flowing through the lamp T be equivalent to. During this normal operation, the lamp T can be considered almost as a resistive load. As a result, the current flowing through the capacitor CR is 900% of the lamp current. It has a phase difference of . Therefore, the current flowing through LR (total circuit current There is also. ) can be expressed as follows.

During normal operation, the voltage across the resonant capacitor is the voltage applied across the lamp, vla Equal to mp. Therefore, the current flowing through CR is iCR,runningjng- It becomes vlamp/XCR. During the start operation, that is, before the lamp lights up, the capacitor The current flowing through the capacitor CR is the lamp lighting potential with respect to the impedance of the CR. determined by the ratio of

That is, 'CR, firing 1amp, flrLng/XCR-■ It is.

Furthermore, the iCR4iring during the start operation is connected to the power switch Q2. Q3 equal to the full load current circulating between CR and LR through. For this reason, the lamp If the lighting potential is very high, depending on the XCR, a very large A large circulating current flows through Q2 and Q3. Large circulation during this start operation The current may exceed the maximum rated current of Q2 and Q3, in which case the current Q2 and Q3 are destroyed.

The new and improved resonant inverter circuit of the present invention will be described in detail below. . In the first embodiment shown in FIG. 4, (at the fundamental frequency (fr) of the excitation signal) The start of the resonant mode and the parallel resonant mode (also at the fundamental frequency f) operation is performed using two separate inputs connected to lamp T1 and capacitors C1 and C2. inductor Ll, L2 or one inductor consisting of two parts L1 and Ll This can be achieved by using . C1 is considerably smaller than C2. Further circuit The value of the element is selected to be (L1+L2)C1-Ll (C1+C2). Ru.

The excitation frequency (fr) is a combination of (L1+L2)C1-Ll (C1+C2) equal to the natural resonant frequency of the During normal operation (after the lamp lights up), switch S 1 and Sl are closed and the combination LL (C1+C2) is used. this In the case, as explained earlier, Since the combination is used, At the excitation frequency (f'), the impedance is considerably larger than the impedance of (c1 + C2). stomach.

As a result, during the start operation when Sl and Sl are open, the voltage across T1 is turned off. The current flowing through capacitor C1 is held down considerably until the lamp potential is reached. be able to. Therefore, during the start operation, power switches Q2 and Q3 ( The current circulating through the inverter circuit including The case is suppressed to a value F times.

After the lamp is lit, e.g. by detecting the current flowing through the lamp. Close switches S1 and Sl. Sl and a switch such as a relay to close Sl The sensor is operated by the detection signal. As shown in Figure 5, for lamp T1 It is convenient to perform the current detection by a sensing resistor (RS) inserted in series with be. The current flowing through T1 is passed through a conventional current transformer (C T) may be used for detection. Note that the detection circuits shown in FIGS. 5 and 6 are similar to those shown in FIGS. It can also be used in the examples.

As a specific example of this example, L1=1.8mH, Ll-3,6mH, C1-0°0 05uF, C2-0,01,uF, fr-30kHz. in this case, ( Ll + L2) CI combination or Ll (C1 + C2) combination fixed The resonant frequency is 30kHz. For an excitation frequency of M 30 kHz The impedance of C1 is 106Ω, and the impedance of C2 is 353Ω. Therefore, the starting current is certainly controlled to a value below the maximum constant voltage of Q2 and Q3 in Figure 2. It turns out that it can be limited.

In a second embodiment of the invention, also shown in FIG. The start of the harmonic mode (at the harmonic (fn)) and the start of the harmonic mode (at the fundamental frequency [r ) parallel resonance mode operation can be realized. In this case, start operation Inside, 1/2 (L1+L2) C1-fn is used. However, fn-nXfr It is. The values of (L1+L2) and C1 set the natural resonant frequency of the circuit to the excitation frequency. It can be equal to any harmonic frequency (fn) higher than the wave number (fr).

The voltage C1 applied across 01 during the start operation is (L1+L2) and the value of C1. and its quality. Therefore, it is necessary to select the appropriate value and quality. be. For example, polypropylene capacitors are preferred, as explained in further detail. Yes.

As a specific example of the second embodiment, L1=1.9mH, Ll-1, 2mH, C1- 0,001μF, C2-0,012μF, fr-30kHz. Therefore Therefore, the natural resonant frequency of the combination of (L1+L2)C1 is 9QkHz. other On the other hand, the natural resonant frequency of the combination of Ll (C1+C2) is 30 kHz.

The start of harmonic mode and operation of resonance (fundamental frequency) mode are as follows using the circuit shown in Figure 7. It is possible to achieve this by using In this third example, fn-1/2 (Ll, C 1) f r-1/2 (Ll (C1+C2)). However, Sl is the start It is open during operation and closed when the lamp is on.

As a fourth embodiment of the present invention, start of resonance mode and operation of series resonance mode is shown in FIG. In this case, C1 is much larger than C2 and directly When considering column-connected C1, the influence of C1 can be ignored. Did you do it? So, f　r-1/2　(L1+L2)　C2-1/2　(L　co,　C1).

During the start operation, inductors L1 and Ll resonate at the excitation frequency together with 02. form a resonant circuit. After the lamp starts, switch S1 closes and Ll and C1 forms a resonant circuit. The effect of C2 has been ignored and in this mode the lamp T1 is connected in series to C1 and Ll. Since C2 is considered to be a very small value, C2 is (and therefore the current flowing through power switches Q2 and Q3) flow) is limited to very small values. Furthermore, during the start operation [n] The high impedance of C2 means that the lighting voltage is large enough to light the lamp. is easily generated between both ends of the capacitor.

As a specific example of the fourth embodiment, LL-1,8mH, C1-0,015μF.

Let Ll-4,6mHSC2=0.005μF, fr-30kHz. C1 is It is 30 times larger than C2, and the series capacitance of ci and C2 is 0.00048 μF. 0 The natural resonance frequency of 0048 μF and (L1+L2) is 90 kHz. on the other hand , Ll and 01 have a natural resonant frequency of 30 kHz.

Depending on the goodness of Ll, Ll, C1 and C2 and their values, the configuration of FIG. mode start and non-resonant series operation, 2) harmonic mode start and series resonant mode start. 3) harmonic mode start and non-resonant series operation are also possible. Ru.

In the fifth and best embodiment of the present invention, the harmonic mode is stabilized as shown in FIG. This method utilizes the oscilloscope and non-resonant operation. In this example, fn-nXf r- 1/2 (Ll, C1).

For example, depending on the quality or Q factor of resonant inductor L1 and resonant capacitor C1. Therefore, select Ll and C1 with low loss, and set them at higher harmonics than the fundamental frequency. By resonating at the wave frequency, the voltage across C1 is kept very low during the start operation. can be raised to a high level. That is, the excitation frequency (fr) is fixed After that, we select a resonant circuit that resonates at the nth harmonic frequency (fn). For example, this embodiment can be applied to the circuit of FIG. Alternatively, the detection circuit of FIG. 6 becomes unnecessary. T1 is a commercially available 250 watt high pressure sodium Hlgh Pressure 5odlus (HP S)) lamp and do. This lamp typically requires a peak voltage of about 2,500V to start. child Once the lamp is turned on, the operating voltage across the lamp is only 100μ.

The waveforms of the lamp lighting voltage and operating voltage are shown in FIGS. 10 and 11, respectively.

However, the excitation frequency is set to fr-30,000HzSVin=360V. this When, LR-0.26mH.

If CR-0,0043μF, the resonance frequency is fn-1/2 (LR, CR) =150,000Hz. This is the fourth harmonic of the fundamental frequency of 30,000Hz. It's a wave.

As shown in FIG. 10, if the circuit of FIG. 9 is excited with the fundamental frequency signal fr, In this case, ringing occurs in the circuit, and the natural resonant frequency of the circuit, that is, the fourth The maximum peak occurs at the harmonics. The peak due to the third harmonic exceeds the lamp lighting potential. Even if the lamp does not turn on, the peak due to the fourth harmonic will occur as shown in Figure 10. The potential is exceeded and the lamp is of course lit.

As mentioned above, the start of harmonic mode means that the voltage is at the natural (or resonant) frequency of the circuit. It has the advantage of easily obtaining a voltage that exceeds the lamp lighting potential. Ru. Furthermore, at the start of harmonic mode, for example, the average value of the flowing power is Switch Q2. Select the circuit impedance so that it falls within the maximum rating of Q3. It is customary to do so.

Now, at a resonant frequency of the excitation signal of 30 kHz, the above example for the circuit of FIG. The impedance is 49Ω for Ll and 233Ω for Cl-1. Shigashinaga Therefore, at 150kHz, the impedance of both Ll and 01 is 245Ω. . In other words, between a 0.26mH inductor and a 0.0043μF capacitor, Since the natural resonant frequency of the combination is 150kHz, at this natural resonant frequency is the impedance of C1 so that the impedance of Ll cancels the impedance of C1. It should be equal to the pedance. For this reason, in this example, Ll and cl are 1 Excited by a power supply with a frequency that is an integer fraction of 50kHz, that is, a power supply of 30kHz In this case, for the excitation, various frequency components over one period of a frequency of 30 kHz are This results in the appearance of This situation is illustrated in FIG. In addition, the frequency is 30kHz One period of z is 1/f-33, 3 μs. Frequencies including 150kHz frequency The component has the largest amplitude. At 150kHz, the impedance of LR is equal to the impedance of CR. Since they have the same magnitude and opposite sign as the impedance, they cancel each other out. This is because a large current flows through the circuit. However, this current is As can be seen from the figure, it flows only during a part of one period of 33.3 μs. Therefore Therefore, the average value of flowing power becomes smaller.

The magnitude of the flowing current and the growth of the terminal voltage of 01 are determined by the conduction of the detection circuit shown in Figure 12. can be controlled by input. In other words, the high impedance connected across C1 - the resistor voltage divider circuit (R1 and R2) senses the voltage, and the sensed voltage is It is rectified by diode D1. This rectified signal produces fr It is used to interrupt the frequency generator (5G2525 in Figure 1).

Interrupts to the frequency generator through the soft start bin are provided by the power supply limiting circuit described below. This will be explained in the section below.

The Q factor or quality of inductors and capacitors is not limited to the embodiment of FIG. Even in embodiments that realize the start of other harmonic modes, the start of the harmonic mode is Must be good to be effective. The advantage of inductors is magnetic Depends on core material, winding resistance, skin effect depth associated with high frequency excitation, etc. Ru. Poorly designed high frequency inductors can cause core saturation and excessive heat dissipation . On the other hand, the merits of a capacitor depend on the frequency response characteristics of the dielectric film and the associated effective series resistance. (E!’Tective 5eries Re5istance (ER3) ), leakage current characteristics, high frequency ripple current performance, etc. dielectric The voltage that can be applied across a capacitor without destroying it varies with frequency.

In this respect, polypropylene capacitors, for example, are superior to polyester capacitors. ta is preferable.

As described above, the lamp is started (or lit) in harmonic mode.

The operation of the lamp in the embodiment of FIG. 9 (or FIG. 10) after lighting is performed in a non-resonant mode. be revealed. As soon as the lamp is lit, most of the current that was flowing through C1 This is because everything will flow through the lamp. At this point, the inverter The circuit consists essentially of switches Q2 and C3 and Ll and T1 connected in series. It is composed of

As mentioned above and according to FIG. 4, the pond embodiment of the present invention is capable of After that, unlike the non-resonant mode operation shown in Figure 9, it switches to resonant mode operation after lighting. Ru. According to these other embodiments of the present invention, the star of the harmonic mode in the case of FIG. The above advantages can be obtained by using

current limit circuit Hereinafter, the current limiting circuit of the present invention will be explained in detail with particular reference to FIGS. 13 to 25. Ru.

A block diagram of an offline power inverter circuit is shown in FIG. Sui Switch 17 is the AC power source. The power line protection circuit section 13 is a Equipped with The EMI section 19 prevents electromagnetic interference (EIelectro=Magr+etj Equipped with a circuit to suppress cInter "erence (EMI))" I can do it. Here, L3 is a common mode inductor, and L4a and L4b are differential mode inductors. The inductors, Yl and Yl, are keyed with equal values to limit leakage current to ground. It is chapasita. However, the value of Y is the high frequency EM generated by the inverter. A value is adopted that prevents low-frequency AC signals from being missed, while I is missed to ground. Ru.

The rectifier 20 includes a half-wave or full-wave rectifier circuit. The ripple voltage is 21 will be removed. The DC voltage thus obtained is indicated by 22 in the figure. It is converted to a high frequency by a high frequency inverter and control circuit. The isolation transformer section 23 , equipped with an isolation transformer for voltage isolation and step-up or step-down, the isolation transformer being Therefore, although it has a plurality of secondary voltage outputs, it is not necessary.

During operation, the potential difference between the neutral AC line (N) and earth (EG) is very small. stomach. However, the potential difference between the live AC line (L) and earth (EG) is Total AC voltage. The AC input is 120V and the rectifier is as shown in Figure 14A. In the case of full-wave rectification, the voltage between the (+) lead and ground and the (- ) The voltage between the lead wire and ground is as shown in Figure 14B and Figure 14C, respectively. becomes.

The high frequency power inverter circuit 22 is the same as described above with reference to FIGS. 1 to 12. It is preferable to use a resonant inverter circuit based on the 5G2525.

An offline resonant inverter using the 5G2525 integrated circuit (IC) A locking diagram is shown by way of example in FIG. However, here is the offline What is disclosed as a high frequency power inverter is the resonant inverter described above. It is not limited to those using circuits. Offline high frequency power inverter The converter is constructed using a power inverter form other than a resonant inverter form. It is also possible. For example, push-pull configuration, half-bridge configuration, etc. are adopted. It's okay.

In the circuit of Figure 15, a resistor Rp is connected between the inverter output terminal A or B and the ground. When connected, current flows through the resistor. The magnitude of this current is basically It depends on the quantity. That is, a) For earthing, the magnitude of the high frequency AC voltage appearing at terminal A or B, b) Value of the resistance (Rp) connected between A or B and ground C) High frequency circuit, wiring the amount of parasitic capacitive coupling between the line and the grounded case (in this regard, This will be explained later with reference to FIG. ), and cl) Capacitor in EMI section 19 It depends on the value of Y.

If the load is isolated by a transformer, the current is determined by the structure of the transformer.

For example, electrostatic shielding between the primary and secondary windings, capacitive coupling (CW) between the two windings, ) etc. are the main ones.

Possible current paths between terminals A or B and ground G are shown in Figures 16 and 18. Indicated. However, in the case of Figure 18, an isolation transformer is installed between the inverter output point and the load. It has been established. FIGS. 17 and 19 are simplified versions of FIGS. 16 and 18, respectively. This is an equivalent circuit. In the simplification, the effect of the voltage drop of the bridge rectifier diode is eliminated. I looked at it.

By connecting the resistor Rp, the high voltage generated between A and G or between B and G can be reduced. Frequency voltage affects between G and P (+) or between G and P (-) .

However, P (-) is the ground of the circuit. In other words, between G and P(+) Alternatively, by providing a detection circuit between G and P(-), the current flows through Rp. It is possible to detect the magnitude of the current.

In the case of the circuit of FIG. 13, a sensing circuit consisting of a simple resistor is not appropriate. G and P (+) or between G and P(-), there is constant pulsation D during normal operation. This is because a high voltage is generated. The frequency of the pulsating DC high voltage is as shown in FIG. 14B and 14C as previously described with reference to FIGS. 14B and 14C. Ru. However, if such pulsating voltages do not exist, a simple resistive circuit can be used. Appropriate.

On the other hand, detection of high frequency AC voltage requires a capacitor as shown in Figures 20 and 21. This can be realized by combining a shield and a resistor. The circuit in Figure 21 is a high frequency It converts wave AC signals into DC signals. In any case, the detection voltage VS The sizes are (1) inverter frequency (f i), (2) Rp, (3) CS, (4 ) R3I, and (5) R32. CS impedance (XC 3) is given by XC3-1/(2, fi, C3). - As an example, f i-30゜000Hz, input line frequency fac-60HzSC9-0,003 It is set to 3 μF. In this case, the inverter frequency is XC5-1607Ω. death However, at the input AC frequency, it becomes XC5-803,500Ω, which is 500 times more It gets expensive.

As a result, the 60Hz AC human input signal is attenuated and reduced by 500 times to 30,0 CIOH. 2 AC signal. Therefore, according to the circuits of FIGS. 20 and 21, G and P( +) or between G and P(-). Even if such a high frequency signal is generated, the high frequency signal can be easily detected.

The high frequency signal detected by the circuits of Figures 20 and 21 is at the end of the power inverter. When a resistor Rp is connected between the terminal and the ground, the current flows between the terminal and the ground. It is a function of high frequency current. The sensing signal may e.g. relay to temporarily or permanently inhibit the power inverter's output. Or it can be used to turn on other switches (Figure 22). However, this The relay contacts can be placed between any part of the circuit, i.e., as indicated by an X in the diagram. It can be provided at any position.

In another preferred embodiment of the current limiting circuit of the present invention, capacitor Y1 or For example, replacing either Y2 with one of the detection circuits in FIGS. 20 and 21 I can do it. However, replacing capacitor Y2 with one of both detection circuits is preferred. When replacing the capacitor Y2, C8 in FIG. 20 or 21 It is desirable that the value of Y1 exactly match the value of the remaining capacitor Y1. Especially capacitor Y When replacing 2 with the detection circuit shown in Fig. 20, the ground position of the circuit shown in Fig. 20 is 20 corresponds to the ground position of the circuit in FIG. 3, while terminal 24 in FIG. corresponds to In this way, the detection circuit of this embodiment has not only the above detection function but also the key function. It also achieves the EMI suppression function that was achieved with the capacitor Y1.

Furthermore, the signal sensed through the circuits of Figures 20 and 21 is the output of the inverter. When the point and ground are short-circuited or connected through a resistor, the output point and It can also be used to regulate or limit the current flowing between Ru. - As an example, refer to the resonant inverter of FIG. 15. The resonant inverter is As described above, loads such as the fluorescent lamp T1 can be driven. Illustrated in Figure 23 . When attaching or detaching the lamp, make sure that a person connects terminal A to the grounded inverter case. Sometimes you touch it by mistake. When analyzing this situation, as shown in Figure 24, Well, this person can be replaced with an equivalent resistance of 500Ω. U.S. Underla Iters Laboratories, Inc. (Underwriters) [, aboratorles 1ie1. USA) safety standard UL935 20 ．． According to Chapter 5, if a 500Ω resistor is connected between terminal A and ground, , through the 500Ω resistor when the inverter frequency is 10.000Hz or higher. The maximum allowable peak current that flows is 43°45mA. This is the 500Ω corresponds to a maximum peak voltage of 21.7V across the resistor. Detection in Figures 20 and 21 Using circuits, this goal can be easily achieved.

Figure 25 shows one sensing circuit connected to the resonant inverter circuit described above. . The values of C35RSI and R52 in FIG. 25 are such that the peak voltage across Rp is 21°. As soon as it reaches 7V, the voltage applied between the base and emitter of transistor Q4 is chosen to be large enough to turn on the transistor. just A soft-start capacitor 24 is connected between the collector and emitter of Q4. It is. When Q4 turns on, soft start of 5G2525 which is IC Bin 8 is pulled down. Then, the drive output from pin 11 and pin 14 The output pulses will stop immediately and power inverter switches Q2 and Q3 will stop functioning. Stop. At this time, no current flows through Rp, and Q4 turns off.

However, when Q4 turns off, the 5G2525 resumes operation and and turn on Q3. Current begins to flow through Rp and the voltage across Rp becomes As soon as 21.7V is reached, Q4 turns on again and repeats the cycle. vinegar. In addition, to stop the output of the 5G2525 IC, use the shunt c instead of pin 8. The same can be achieved by applying a signal to the cut-down pin 10. Ru.

control circuit Hereinafter, the control circuit of the present invention will be explained in detail with particular reference to FIGS. 26 to 29.

Generally speaking, the control circuit referred to here is the variable control circuit shown in FIGS. 2, 15, etc. A preferred alternative to the above method for controlling the brightness of the load TI by adjusting the resistor R6 This provides a new method.

First, the interface between the control circuit of the present invention and the resonant inverter ballast described above is explained. Let me explain about Ace. In Figure 26, a new and improved pulse generation circuit (this The circuit will be explained in detail later. ) is generally designated 42.

The output point 43 of this circuit is connected to the base of an output transistor 44. Applicable The collector of the output transistor 44 is connected to the non-inverting input NI ( pin 2), while the emitter of the output transistor 44 is connected to ground. It is connected to the. An integrating capacitor 4 is connected between the non-inverting input Nl and ground. 6 is connected. The pulse generation circuit 42 preferably has a duty cycle A rectangular wave pulse train having a variable and fixed frequency of 1 kHz or more is generated.

The output pulse at output point 43 controls the charging of integration capacitor 46 . Pal When the pulse generation circuit 42 generates a pulse at the output point 43, the base of the transistor 44 The voltage applied to turns on the transistor 44, causing the transistor 44 to turn on. Current flows from the collector to the emitter. collector of the transistor 44 is connected to the capacitor 46 and the non-inverting input NI, and Since the emitter of resistor 44 is connected to ground, pulse generation circuit 42 The pulses output from the integrating capacitor 46 are applied to the integrating capacitor 46 so as to advance the discharge of the integrating capacitor 46. To effectively ground the terminal 46. If no pulse is generated at output point 43, the The resistor 44 is turned off, and the integrating capacitor 46 is connected to the resistor R5 and the variable resistor R6. The level of voltage drop across variable resistor R6 determined by the voltage divider circuit consisting of The battery attempts to charge up to

The voltage at non-inverting input NI (pin 2) is the duty sensor of the pulse at output point 43. It changes depending on the cycle. A series of pulses are output at high frequency from the output point 43. The pulse periodically pulls up the DC level across the integrating capacitor 46. be pulled up or pulled down. Integrating capacitor 46 is connected to the pulse of output point 43. The shift in DC level caused by the current is integrated over time. As a result, the pulse Depending on the duty cycle, a continuous R C voltage is applied to the non-inverting input NI ( Appears on pin 2). The DC voltage at the non-inverting input Nl (pin 2) is: and changes depending on the duty cycle of the pulse at the output point 43. In other words, de As the utility cycle increases, capacitor 46 is connected for a relatively longer period of time. The voltage at the non-inverting input Nl (pin 2) becomes low. Conversely, the output As the duty cycle of the pulse at point 43 becomes smaller, the non-inverting input The voltage at NI (pin 2) becomes high.

The voltage level of this non-inverting input Nl (pin 2) controls the apparent brightness of load T1. Therefore, one skilled in the art can change the duty cycle of the pulse at output point 43. It can be immediately understood that the optical output of the load T1 can be adjusted by Probably. This can be done without changing the duty cycle of the pulse input. and a new and unique way to control solid-state ballasts for dimming. It has been disclosed.

FIG. 27 shows a preferred embodiment of the circuit of FIG. The star 44 is replaced with a conventional opto-isolator 48. The corresponding o The photoisolator 48 includes a light emitting diode (LED) 50 and a phototransistor. 52. The light emitting diode 50 is connected between the output point 43 and ground. has been done. The collector of the phototransistor 52 has a non-inverting input NI (pin 2). and the emitter is connected to ground. Phototransistor 52 is the light emitted from the LED 50 which is activated in response to a pulse from the output point 43. Turn on accordingly. The operation mode of this embodiment is substantially the same as that of the embodiment shown in FIG. , but the opto-isolator 48 connects the resonant inverter circuit to the pulse generation circuit. The difference is that it is electrically isolated from the path 42. Resonant inverter circuits require high voltages and large currents. It is expected that the pulse generation circuit 42 will be controlled and operated manually. be done. Therefore, the electrical insulation described above does not provide a substantial safety benefit. be.

The circuit configuration and operation of the new pulse generation circuit 42 will be explained in detail below. do. As shown in FIG. 28, the pulse generation circuit 42 includes a power supply section 54, a reset section 56, delay section 58, overcurrent section 60, pulse control section 62, brightness control section 64, and A frequency source 65 with a variable duty cycle is provided.

The variable duty cycle frequency source 65 is an integrated circuit U manufactured by Motorola. Preferably, C2843 is used. However, other integrated circuits may be used and Any circuit configured to realize a certain function may be used. The operation of the frequency source 65 is , detailed information in Motorola publications that are familiar and available to those skilled in the art. It has been described. However, the functions of the pins used in this circuit can be determined by those skilled in the art. The circuits are described in Table 1 in sufficient detail to enable one to understand and practice the disclosed invention. Ta.

(Hereafter, extra white) Bin connection of frequency source UC2843 Pin name description I COMP (compensation) Apply voltage externally to change the duty cycle of the pulse. Apply from

2 1NV (input) Not used (connect to ground) 3CS (current detection) Pulse output is prohibited when a voltage of 1 V or more is applied from the outside.

4 05C (Oscillation) Outputs a sawtooth wave with a frequency depending on the external circuit.

5 GND Connected to the ground.

6 0UT (output) Dual frequency according to the external circuit connected to the OSC terminal Outputs pulses with variable cycle times. The duty cycle is sent to the COMP terminal. varies depending on the applied voltage.

7 Vcc power supply (+12V DC) 8 Vref Reference voltage output (5, IV DC) Table 1 Referring again to FIG. 28, the power supply unit 54 includes a transformer 66, a full-wave bridge rectifier 68, A capacitor IJJ separation diode 70 and a smoothing capacitor 72 are provided.

The power supply section 54 includes a conventional three-terminal 12V voltage regulator 84 and a conventional three-terminal 12V voltage regulator 84. It is preferable to further include a connected capacitor 86. The voltage regulator 84 has an input terminal 88, an output terminal 90, and a ground terminal 92.

An alternating current input from AC power supply 74 is applied to the primary winding of transformer 66 . the transformer The turns ratio of 66 is such that the AC power supply 74 is such that a 12V AC voltage is induced in the secondary winding. The voltage is selected according to the voltage. The full-wave bridge rectifier 68 is conventional. Ru. The rectifier 68 has two input terminals 75 and 78 and two output terminals 80 and 78. 82. The two terminals of the secondary winding of transformer 66 are each connected to the input of rectifier 68. Connected to terminals 75 and 78. Output terminal 80 of rectifier 58 is connected to circuit ground and and ground, while output terminal 82 is connected to the anode of isolation diode 70. the diode to provide a 12V rectified DC output to the diode. diode 70 The cathode of is connected to the input terminal 88 of the regulator 84 and the smoothing capacitor. It is also connected to the positive voltage terminal of the pacitor 72. The negative voltage terminal of the smoothing capacitor 72 is , connected to circuit ground and earth.

The regulator 84 has an output terminal 90 connected to a frequency source 65 having a variable duty cycle. Vcc (pin 7), and the ground terminal 92 is connected to the ground. That Le A capacitor 86 is connected between the output terminal 92 of the regulator 84 and the ground. be done. This voltage regulator 84 compensates for voltage fluctuations in the AC power supply 74. where a 12V regulated DC power supply is supplied to the integrated circuit of the frequency source 65. Ru. A stable voltage supply to the frequency source 65 is provided at the output point 43 of the frequency source 65. This is necessary to prevent fluctuations in the pulse signal output.

The 12V DC regulated output at output terminal 90 of regulator 84 is pulsed. Also as a DC power supply 24 connected to Vcc of the width modulator 4 (as shown in Figure 26). It is preferable to use In this case, the entire circuit consists of one power switch (not shown) It can be controlled by The switch may be any conventional switch; It can be introduced into the power supply circuit in various ways. This point is obvious to those skilled in the art. Probably.

The brightness control section 64 includes a variable resistor 94 and a voltage dividing resistor 96. Variable resistor 94 (Yo) , is connected between the compensation bin (pin 1) at frequency tA65 and ground. partial pressure Resistor 96 connects Vref (pin 8) of frequency source 65 and compensation pin of frequency source 65. (pin 1). Vref (pin 8) of frequency source 65 is 5. Outputs a constant 1v DC signal. In other words, the variable resistor 94 and the voltage dividing resistor 96 are Configure the circuit and adjust the compensation pin (pin 1) of the frequency source 65 according to the adjustment of the variable resistor 94. The applied voltage changes. As shown in the table of FIG. The voltage on pin (pin 1) generates a Norculus duty sensor at output point 43. cycle force (controlled; the duty cycle is as previously described with reference to FIG. 26). The brightness of the load T1 is determined as shown in FIG.

The above power switch is integrated with variable resistors 9 and 4 using a conventionally known method. can be done.

The delay section 58 includes a PNP l-transistor 98, a resistor 100, and a canopy resistor 102. , and a resistor 104. The emitter of transistor 98 is connected to the frequency source 65. While connected to the compensation pin (pin 1), the collector of the transistor 98 is connected to the connected to the sound. The base of the transistor 98 is connected to one end of the resistor 104. The other end of the resistor 104 is connected to the output terminal 82 of the bridge rectifier 68. tree While the positive voltage terminal of the output terminal 102 is connected to the base of the transistor 98, , the negative voltage terminal of the capacitor 102 is connected to ground. The resistance 100 is Connected between the base of transistor 98 and ground.

According to the delay unit 58, an operation with new and unique advantages can be realized. I understand. During operation, the delay section 58 suppresses transmission of the dimming signal 43 at power-up. This is because it will stop. When the dimming signal is suppressed by the delay unit 58, the load TI (Fig. 2 6) starts at maximum brightness. The maximum brightness start is the following two Very important for a reason. First, starting at the highest brightness increases the lifespan of fluorescent tubes. Ru. Second, fluorescent tubes will not light unless they are supplied with the highest duty cycle power. That's because there isn't.

Here, the operation of the delay section 58 that suppresses the dimming signal 43 will be explained in detail. AC power supply If no power is supplied to circuit 42 from 74, transistor 98 is conductive. therefore, the compensation pin (pin 1) of frequency source 65 is effectively grounded. Ru. When the compensation terminal is grounded in this way, the duty cycle is applied to the output point 43. 0 is selected. As explained earlier, the brightness of the load TI (shown in Figure 26) The degree changes in the opposite direction to the duty cycle of the pulse at output point 43. Output point 4 If the duty cycle of pulse 3 is 0, the load Tl (shown in Figure 26) The brightness of the object) becomes maximum. Therefore, transistor 98 becomes conductive. If the brightness remains unchanged, the load T1 will have the highest brightness.

When circuit 42 is powered, capacitor 102 connects with resistors 100 and 104. It is charged according to a time constant determined by the value of capacitor 102. capacitor 1 As 02 charges up, transistor 98 can no longer maintain conduction; Eventually, the transistor 98 will cease to conduct. Transistor 98 becomes non-conductive. Then, the delay section 58 affects the voltage at the compensation bin (pin 1) of the frequency source 65. It will no longer affect you. At this time, the voltage at the compensation bin (pin 1) of the frequency source 65 will be controlled only by the brightness control section 64.

As described above, the solid-state stable circuit ( When power is supplied to the circuit (shown in FIG. 2), the delay section 58 initially Prohibits dimming of load TI (shown in Figure 2) regardless of setting 4 (brightness control) do. The load T1 starts at maximum brightness. After a short time, the delay section 58 dims. load T1 is dimmed to the level set by variable resistor 94. It will be done. Initially, the fluorescent lamp T1 starts at the highest brightness, and then the fluorescent lamp suddenly decreases. An important feature of the present invention is that it is rapidly attenuated. That is, capacitor 1゜2 As the capacitor is charged, the voltage across the capacitor gradually increases; Since the conductance of transistor 98 becomes smaller gradually and in a short time, be. Therefore, the voltage at the compensation pin (pin 1) of frequency source 65 varies from 0 to It gradually rises to a level determined by the setting of variable resistor 94. As a result, fireflies Light lamp T1 starts at maximum brightness and then smoothly ramps down to the preset level. The light is attenuated in a desirable manner.

The delay provided by the delay section 58 corresponds to the resistance according to the well-known time constant principle. Adjustable by changing the armor of resistors 100 and 104 and capacitor 102 Of course.

During a power outage, the fluorescent lamp T1 is turned off. If the power outage is short, capacitor 10 2 maintains its own charge, the delay section 58 maintains the desired maximum brightness level. start and transition to the set dimming level. explained before As shown, the lamp T1 will not start at low brightness settings, and even if the lamp T1 is Even if it does start, the lamp life will be shortened due to the low brightness start. reset The delay unit 56 is configured to stop the delay unit 58 so that the delay unit 58 operates properly when power is restored to the circuit. The reset operation for the delay section 58 is executed during the power supply.

The reset section 56 includes a diode 106, a resistor 108, and a PNP transistor 11. 0, a filter capacitor 112, and voltage dividing resistors 114 and 116.

The anode of the diode 106 is connected to the base of the transistor 98 of the delay section, The cathode of the diode 106 is connected to one end of a resistor 108. The resistor 108 The other end is connected to the emitter of transistor 110. As this resistor 108 is preferably a small value in the range of 5 to 7Ω. collector of transistor 110 The terminal is connected to ground. The positive voltage terminal of filter capacitor 112 is while the negative voltage terminal of the capacitor 112 is connected to the base of the transistor 110. is connected to ground. One end of the resistor 114 is the output of the full-wave bridge rectifier 68. terminal 82 while the other end of the resistor 114 is connected to the base of transistor 110. connected to the Resistor 116 connects the base of transistor 110 to ground. connected between.

Resistors 114 and 116 are used to determine the voltage at the base of transistor 110. Configure a voltage divider circuit. The values of both these resistors 114 and 116 are determined by the AC power supply 74 A resistor is used to prevent transistor 110 from conducting while supplying power to line 42. It is selected according to the values of 100 and 104. The value of capacitor 112 is When power is lost, capacitor 112 discharges through resistor 116 in about 1 ms. is selected depending on the values of resistors 114 and 116.

When the power supply to the AC power line 74 is cut off, the reset unit 56 performs the following operation. Execute. First, the base voltage of the transistor 110 is 16 and decreases to 0 in 1 ms. Capacitor in delay section Since 102 remains charged, the emitter voltage of transistor 110 is 0. considerably larger than Therefore, transistor 110 begins to conduct and the transistor 110 begins to conduct. This effectively shorts and discharges the star delay section capacitor 102. like this Then, the reset unit 56 automatically starts the fluorescent tube T1 at maximum brightness as described above. The preparation of the delay section 58 is rapidly advanced so that the

A dowel is connected to the power supply section 54 to separate the reset section 56 from the filter capacitor 72. It should be noted that a diode 70 is provided. This allows the filter The capacitor 72 is not discharged through the reset unit 56 during a power outage and is This does not interfere with the normal operation of the reset section 56.

The pulse control unit 62 determines the frequency of the pulse at the output point 43 and controls the output pulse. limits the maximum duty cycle of the device. This pulse control section 62 is NPN transistor 118, frequency setting capacitor 120, frequency setting resistor It includes a resistor 122, a resistor 124, a variable resistor 126, and a resistor 128. transition The base of star 118 is connected to the oscillation terminal (pin 4) of frequency source 65. The corresponding g The collector of transistor 118 is connected to Vref (pin 8) of frequency source 65. The emitter of the transistor 118 is connected to one of the two terminals of the resistor 124. be done. The other terminal of the resistor 124 is connected to one of the two terminals of the variable resistor 126. Continued. The other terminal of the variable resistor 126 is connected to the current detection terminal (pin) of the frequency source 65. 3). A resistor 128 is connected to the current sensing terminal (pin 3) of the frequency source 65. Connected to ground. The frequency setting resistor 122 is connected to the frequency setting resistor 122 Connected between the swing terminal (pin 4) and the Vref (pin 8) of the same frequency source 65 . The frequency setting capacitor 120 is connected to the oscillation terminal (pin 4) of the frequency source 65 and the graph. connected between the

The oscillation terminal (pin 4) of frequency source 65 is connected to a progressive signal (sawtooth) with DC offset. wave), and the frequency of the gradually increasing signal is determined by the frequency setting resistor 122. It depends on the time constant determined by the value of the frequency setting capacitor 120. . These resistors 122 and capacitors 120 are arranged so that the frequency of the increasing signal is 1kHz2. It is preferable to select it so that it is equal to or more than that.

The increasing signal output from the oscillation terminal (pin 4) of the frequency source 65 is 118, a voltage dividing circuit made up of resistors 124 and 128 and variable resistor 126. transmitted to the road. Due to the operation of these voltage dividing resistors, the current detection terminal of the frequency source 65 The signal on (pin 3) is the voltage variation at the oscillation terminal (pin 4) of the same frequency source 65. will always be proportional to. The voltage appearing at the current sensing terminal (pin 3) of frequency source 65 The ratio or proportion of the voltage to the oscillation terminal output is determined by the setting of the variable resistor 126. determined. The voltage output peak of the oscillation terminal (pin 4) of the integrated circuit UC2843 The voltage is approximately 2.8V. The minimum voltage (DC offset) of the output is 1°2 It is v. The resistors 124 and 128 and the setting variable resistor 126 are connected to the frequency source 65. Select so that the peak voltage applied to the oscillation terminal (pin 4) of the It is preferable to

Frequency source 65 is configured to operate when the voltage applied to the current sense terminal (pin 3) exceeds approximately IV. The generation of a pulse signal at output point 43 is inhibited whenever this occurs. That is, the current The effect of applying a high frequency incremental signal to the detection terminal (pin 3) is to The purpose of this is to suppress pulse generation in a part of the cycle.

Now, FIG. 29 shows a typical example applied to the current sensing terminal (pin 3) of the frequency source 65. A portion of an incremental signal 131 is shown. The peak voltage of the gradual increase signal 131 is Vm It is ax. As previously explained, the voltage divider consisting of resistors 124, 126 and 128 Due to the operation of the circuit, Vmax is gradually increased at the oscillator terminal (pin 4) of frequency source 65. This is a fraction of the peak voltage of the boost signal. As mentioned above, Vmax is about 1.4■ This is a desirable value. As shown, one escalation cycle 129 includes a first time period 130 and a second period 132. In the first period 130 , the voltage of the increasing signal increases from 0.6v to IV. During this period 130, The wave number source 65 is not prohibited from outputting pulses to the output point 43. Frequency source 65? whether one pulse is output from the output pulse and the actual on-period of any output pulse. The brightness control section 64, the delay section 58, and the reset section 56 control the time as described above. Of course, it is determined by In the second period 132, the current sensing terminal ( When the voltage of the increasing signal 131 applied to pin 3) exceeds 1v, the frequency source 65 Generation of any signal at point of emphasis 43 is prohibited. In this way, the current detection terminal ( The application of an incremental signal 131 to pin 3) increases the maximum pulse density at output point 43. Utility cycle is limited. In the above preferred embodiment, Vmax=1° 4V, and a voltage exceeding 180V is present at the current sensing terminal (pin 3) of frequency source 65. When the output of the output point 43 is prohibited when the voltage is applied, the output of the output point 43 is The maximum duty cycle of Luss is 50%. Referring again to Figure 27, the output By limiting the pulse output at point 43 to a duty cycle of 50%, load T1 It is clear that a certain upper limit will be set on the amount of light attenuation. This limit is desirable for load T1. This is because the load T1 is dimmed too much. Then, if this load T1 is a fluorescent tube, the life of the load T1 will be shortened, and in some cases This is because an unpleasant flickering phenomenon may occur in some cases.

Referring to FIG. 28, the maximum duty cycle of the pulse at output point 43 is values other than 50%, depending on the design parameters of the data ballast (as shown in Figure 27). It can also be set to .

The overcurrent unit 60 is configured to control the output point 43 when an excessive current is drawn from the output point 43. This is a protection circuit to prohibit pulse output. This overcurrent section 60 includes a resistor 13 4 and a diode 136. The anode of the diode 136 is connected to the output point 43 is connected to an output reference point 45 which serves as a ground reference point for the output signal of . The cathode of the diode 136 is connected to the current sensing terminal (pin 3) of the frequency source 65. connected to. A resistor 134 is connected between the anode of the diode 136 and ground. connected to. This diode 136 is a ramp at the current sense terminal (pin 3). This prevents the signal from moving to the output reference point 45.

As previously explained, the output point 43 of the frequency source 65 is connected to the current sense terminal (pin 3). Pulse output is prohibited when the applied voltage exceeds 1V. diode 136 The voltage drop is approximately 0.6V. Therefore, the output point 43 is connected to the diode 13 Pulse output is prohibited when the anode voltage of 6 exceeds 1.6V. . This condition is met when the voltage drop across resistor 134 is greater than 1.6v.

The resistor 134 closes when m current of 0.34 A or more is drawn from the output point 43. The voltage drop across resistor 134 exceeds 1.6V and pulse output at output point 43 is prohibited. Therefore, it is preferable to set the resistance value to 4.7Ω. The overcurrent section 60 is the circuit of the present invention. Damage is thus prevented.

There is a practical limit to the number of resonant inverter circuits that can be controlled by a single pulse generating circuit 42. Of course, there are limitations. Each resonance connected to the pulse generation circuit 42 This is because each inverter ballast draws current. Pulse disclosed here The generation circuit operates as long as the current drawn from the output point 43 does not exceed 0.34A. It drives approximately 16 ballasts. However, a single pulse generation circuit If you want to use circuit 42 to control 16 or more ballasts, NPN power transistors may be used to increase the power output capability. The power - the base of the transistor is connected to the output point 43, while the power transistor The collector of the converter is connected to the Vcc (pin 7) of the frequency source 65 and becomes the C power supply. Connected. At this time, the pulse signal output to the stabilizer is output from the emitter of the power transistor. Take it from tta. The fan-out capability of the circuit 42 can be reduced using most known techniques. It can be augmented to allow control of any number of ballasts.

=go=3 Figure & FiKure 7 Fl Otsu, entry 0 Fl(,,λl taba Shibashi i book + (gon r3) r) 4 names international investigation report 111--＾帥kahaa　m、KgokuS Snuff 798

Claims (56)

[Claims] 1. Operation begins in response to the voltage across the gas discharge lamp exceeding a predetermined value. a circuit for starting and operating the gas discharge lamp as described above; , an oscillation source of an excitation signal operating at a predetermined fundamental frequency for exciting the lamp; a reactance hand having inductive means and capacitive means circuit connected to said lamp; step by step Equipped with The natural resonant frequency of the reactance means is a harmonic of the fundamental frequency of the excitation signal. One of the circuits. 2. A circuit according to claim 1, wherein the capacitive means is connected in parallel with the lamp. circuit. 3. 3. The circuit of claim 2, wherein said inductive means is connected in series with said lamp. circuit. 4. The circuit according to claim 2, a voltage detection means for detecting a voltage across the lamp; and a voltage detection means for detecting a voltage across the lamp; said detection means for at least temporarily inhibiting said circuit in response to exceeding said detection means; threshold setting means responsive to the step. 5. Operation begins in response to the voltage across the gas discharge lamp exceeding a predetermined value. a circuit for starting and operating the gas discharge lamp as described above; , an excitation signal source operating at a predetermined fundamental frequency for exciting the lamp; reactance means circuit-connected to the pump and responsive to the excitation signal; a detection means for detecting the start of operation of the lamp; and a detection means for detecting the start of operation of the lamp; In response to detection of the start of operation of the reactance means, the impedance of the reactance means is changed to a first value. switching means for changing the value to the second value; circuit with. 6. The circuit according to claim 5, power switching means responsive to the excitation signal and circuit connected to the lamp; said switching means for influencing the excitation of said lamp; and a drawer means; A current flows through the power switching means prior to the start of operation of the lamp. In order to limit the flow, the first value of the impedance of the reactance means is A circuit whose impedance is greater than said second value. 7. The circuit according to claim 5, Said reactance means comprises capacitive means and inductive means, said capacitive means and inductive means. The conductive means, in combination, are capable of generating electricity prior to operation of said switching means. a first natural resonance frequency generated by the switching means, and a second natural resonance frequency generated by the operation of the switching means. A circuit having a natural resonant frequency. 8. 8. The circuit of claim 7, wherein the first and second natural resonant frequencies are A circuit that matches the fundamental frequency of the signal. 9. 8. The circuit of claim 7, wherein the first natural resonance of the reactance means a circuit whose frequency corresponds to one of the harmonics with respect to the fundamental frequency of said excitation signal; . 10. 10. The circuit according to claim 9, wherein said second characteristic common of said reactance means A circuit whose oscillation frequency matches the fundamental frequency of the excitation signal. 11. 6. The circuit of claim 5, wherein said reactive means comprises capacitive means and inductive means. A circuit with sexual means. 12. 12. The circuit of claim 11, wherein the inductive means and the capacitive means have an inherent common The oscillation frequency is aligned with the fundamental frequency of the excitation signal prior to starting operation of the lamp. The corresponding circuit. 13. 13. The circuit of claim 12, wherein the inductive means and the capacitive means have an inherent common The oscillation frequency is set relative to the fundamental frequency of the excitation signal prior to the start of operation of the lamp. A circuit that matches one of the harmonics. 14. A circuit for limiting high-frequency current flowing through a load, which includes at least has two output terminals, a first of which has a DC voltage; and a second of the output terminals is connected to a DC voltage source connected to circuit ground. , at least two output terminals, one of the output terminals being connected to the circuit ground. an inverter for converting the DC voltage into the high frequency current, connected to the step by step, equipped with the voltage source and the inverter means and different from the circuit ground. a chassis connected to ground, which is at a potential of one of the output terminals, from the ground to the one output of the voltage source. establishing a current path to the terminal and connecting one of the output terminals of said inverter means to said terminal; a detection hand for detecting high frequency current flowing through a resistor connected between the the high frequency current flowing through the resistor when the current exceeds a predetermined limit; and limiting means responsive to said sensing means for limiting in response to said detecting means. Road. 15. 15. The circuit according to claim 14, wherein said resistor is connected to said one of said inverter means. A circuit in which the resistance of the human body is in contact with two output terminals and the ground at the same time. 16. 15. The circuit of claim 14, wherein the DC voltage source is an input source of an AC signal. , a rectifier for converting the AC signal to the DC voltage. 17. 17. The circuit according to claim 15 or 16, wherein the input source of the AC signal and the a high frequency electromagnetic wave connected between the DC voltage source and generated by the inverter means; A suppression means for suppressing interference is provided, the suppression means being connected to the input source of the AC signal. comprising at least one capacitor connected between the ground; The impedance of the capacitor is such that the high frequency electromagnetic interference is missed to ground, while and the frequency of the AC signal is equal to the high frequency signal output of the inverter means. A circuit whose impedance is so low that it cannot be missed. 18. 18. The circuit of claim 17, wherein the sensing means comprises the suppressing means; The capacitor of the suppressing means simultaneously passes the high frequency current through the resistor. the low frequency current so that the high frequency current flowing through the resistor is accurately detected; A circuit that suppresses AC signals. 19. 19. The circuit of claim 18, wherein the AC signal input source includes a live line and a neutral line. The suppressing means has at least two capacitors, and the suppressing means has at least two capacitors, and the suppressing means has at least two capacitors. a first capacitor of the capacitors is connected between the neutral wire and the ground; A second capacitor is a circuit connected between the live wire and the ground. 20. 20. The circuit of claim 19, wherein the one capacitor is the first capacitor. A circuit that is pacita. 21. 20. The circuit of claim 19, wherein the one capacitor is connected to the second capacitor. A circuit that is pacita. 22. 15. The circuit of claim 14, wherein the inverter means is a resonant inverter. A certain circuit. 23. 15. The circuit of claim 14, wherein said inverter means is a push-pull inverter. A circuit selected from the group consisting of an inverter and a half-bridge inverter. 24. 15. The circuit of claim 14, wherein said sensing means is capable of flowing through said resistor. circuit comprising threshold means for setting a predetermined limit on the current flowing through the circuit; 25. 25. The circuit of claim 24, wherein the threshold means comprises: (a) between one of the two output terminals of the inverter and the ground; with a connected resistor, (b) disconnected from at least one of the output terminals of said inverter means; load and a circuit for setting the predetermined limit on the current flowing through the resistor based on Road. 26. 26. The circuit according to claim 25, wherein the threshold means is a circuit comprising a voltage dividing circuit. Road. 27. The circuit according to claim 24 or 25, wherein the load is a fluorescent lamp. circuit. 28. 15. The circuit of claim 14, wherein said inverter means comprises an output transformer. circuit. 29. 15. The circuit according to claim 14, wherein the inverter means comprising control means for switching from one state to another, The control means has prohibition means for prohibiting the operation of the inverter means, and The stopping means prohibits the operation of the inverter and limits the current flowing through the resistor to the predetermined amount. A circuit responsive to said sensing means to limit to a value less than the limit. 30. 15. The circuit of claim 14, wherein the limiting means is configured to connect the DC voltage source and the switching means connected to the inverter means; The switching means is configured such that the current flowing through the resistor exceeds the predetermined limit. A circuit that inhibits the operation of the latter means in response to turning. 31. 31. The circuit of claim 30, wherein the switching means comprises at least one A circuit with a relay. 32. Powering a Fluorescent Lamp Load with One Control Input Point and Variable Intensity The operation of the fluorescent lamp power circuit is controlled depending on the control voltage applied to the control input point. A method for controlling the brightness of a load to vary, the method comprising: a. Brightness control adjustment variable duty cycle relative to the desired brightness of the load specified by the generating a series of control pulses, b. the output voltage to generate the control voltage. a step of integrating the pulse over time; c. the control voltage to control the brightness of the load; applying it to a control input point of the power circuit; A method with 33. 33. The method of claim 32, wherein the power circuit is configured to AC power with a variable duty cycle is supplied to the fluorescent lamp, and the control panel A method in which the duty cycle of the pulse is inversely proportional to the desired brightness of the load. 34. 34. The method according to claim 33, wherein during a starting operation of the fluorescent lamp, the A method in which said control pulses are inhibited to start the lamp at maximum power. 35. 34. The method of claim 33, wherein the ballast is a solid ballast using a resonant inverter. How to be a destate stabilizer. 36. Variable power depending on the level of variable control input voltage applied to the control input point A control circuit for controlling a power circuit that supplies a fluorescent lamp to a fluorescent lamp load. control pulse generation means for generating a control pulse with a variable cycle; connected to said control pulse generating means for setting the desired brightness of said load. brightness control means; for time-integrating the control pulse to generate the variable control input voltage; integral means and Equipped with The integrating means is connected to a control input point of the power circuit and is connected to the control pulse generating means. is connected to the integrating means, and the control pulse generating means is connected to the setting of the brightness controlling means. a control circuit for varying the duty cycle of said control pulses accordingly; 37. 37. The control circuit of claim 36, wherein the power circuit is connected to the variable control input. Supplying AC power with a variable duty cycle depending on the voltage to the fluorescent lamp and the duty cycle of the control pulse is selected by the brightness control means. A control circuit that is inversely proportional to the brightness level. 38. 38. The control circuit according to claim 37, wherein the ballast is a solubilizer using a resonant inverter. Control circuit that is a lid state ballast. 39. 38. The control circuit according to claim 37, during a starting operation of the fluorescent lamp. further comprising delay means for providing a blocking period; During the blocking period, the delay means prevents transmission of control pulses to the integrating means. After this, the delay means causes the brightness of the lamp to reach the brightness control. a control for transmitting said control pulses so as to be set at a selected level by said means; circuit. 40. 40. The control circuit according to claim 39, at the end of the blocking period. Therefore, the delay means is configured to delay the lamp brightness level selected by the brightness control means before the lamp brightness level selected by the brightness control means. of the control pulse until brought about by the duty cycle of the control pulse. A control circuit that operates to progressively increase the duty cycle. 41. 40. The control circuit of claim 39, responsive to loss of power to the control circuit. further comprising reset means, the reset means being configured to Resetting the delay means so that the delay means operates according to its function. A control circuit that performs an operation. 42. 40. The control circuit according to claim 39, wherein the maximum duty cycle of the control pulse is A control circuit further comprising a limiting means for limiting the cycle. 43. 43. The control circuit according to claim 42, wherein the limiting means controls the control pulse. Control circuit with adjustment means to allow modification of maximum duty cycle. 44. 37. The control circuit according to claim 36, wherein the control circuit is electrically connected to the power circuit. the control circuit further comprising isolation means for insulating the control circuit. 45. 37. The control circuit according to claim 36, wherein the output point of the control pulse generating means A current is provided to prohibit the operation of the control pulse generating means when an overcurrent is drawn from the control pulse generating means. A control circuit further comprising flow restriction means. 46. Power that supplies variable power to a fluorescent lamp load depending on the signal to the control input point A control circuit for controlling a dimming circuit that represents a desired load brightness level. a dimming signal generating hand connected to a control input point of said power circuit for generating a signal; and a step connected to said dimming signal generating means for setting said desired load brightness level. a brightness control means connected to the and a delay means for providing a start period during the start operation of the load, During the start period, the delay means is set to the level selected by the brightness control means. is not sufficient to start the load, the dimming signal generating means A dimming signal representing sufficient brightness to start the load is generated, and then The delay means causes the load brightness level to reach the level selected by the brightness control means. A control circuit that causes the dimming signal to be generated as configured. 47. 47. The control circuit according to claim 46, at the end of the start period. The delay means is configured to cause the load brightness level selected by the brightness control means to reach the dimming level. a control operative to gradually change the dimming signal until brought about by the signal; control circuit. 48. 48. The control circuit of claim 47, responsive to loss of power to the control circuit. further comprising reset means, the reset means being configured to Resetting the delay means so that the delay means operates according to its function. A control circuit that performs an operation. 49. 47. The control circuit according to claim 46, wherein the maximum selectable by the dimming signal is A control circuit further comprising limiting means for limiting a low load brightness level. 50. 50. The control circuit according to claim 49, wherein the limiting means is configured to with adjustment means to allow changes in the minimum load brightness level that can be selected. control circuit. 51. 47. The control circuit according to claim 46, from the output point of the dimming signal generating means. Prohibits operation of the dimming signal generation means when a current exceeding a certain set value is drawn. A control circuit further comprising current limiting means for. 52. Controls a fluorescent lamp power circuit that supplies power to a variable brightness fluorescent lamp load. A circuit for a brightness provided in the power circuit for setting a desired brightness of the lamp load; control means; and a delay means for providing a start period during the start operation of the load, During the scud period, the delay means adjusts the brightness to the level selected by the brightness control means. Provides sufficient power to the power circuit to start the load regardless of the load. After that, the delay means adjusts the brightness level selected by the brightness control means. A circuit that causes the power circuit to supply power to the load so as to realize a power supply voltage. 53. 53. The circuit of claim 52, wherein at the end of the start period, the The power circuit operates until the load brightness matches the level selected by the brightness control means. and a circuit for gradually changing the brightness of the lamp load. 54. 54. The circuit of claim 53, responsive to a loss of power to the power circuit. further comprising a reset means, the reset means being configured to: upon restoration of power to the power circuit; a reset for said delay means so that said delay means operates according to its function; A control circuit that performs control operations. 55. 53. The circuit of claim 52, wherein the load brightness level is below a specific level. in order to limit the setting of the minimum power level provided by said power circuit so that The circuit further comprises limiting means. 56. 56. The circuit according to claim 55, further comprising adjustment for changing the setting of the limiting means. A circuit further comprising adjustment means.