JPH0534679A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To improve the picture quality by increasing an area per one picture element by enlarging a numerical aperture of a black mask part, and suppressing the influence of a signal line electric field. CONSTITUTION:The liquid crystal display device consists of a first substrate and a second substrate opposed to each other, a liquid crystal layer filled between these substrates, a picture element electrode 51 arranged like a matrix on a first substrate, and thin film transistors TFT5-7 and 9 connected to this picture element electrode 51, and in the peripheral part of the picture element electrode 51, a metallic layer 14 which is connected electrically to the picture element electrode 51, and also, does not allow light to pass through is provided, and on the side for filling the liquid crystal layer of a second substrate, a color filter layer having three primary color filter parts and a black mask part having an opening part 41C provided in a boundary of these filter parts is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an active matrix liquid crystal display device.

[0002]

2. Description of the Related Art Active matrix liquid crystal display devices are
As shown in the equivalent circuit diagram of a part thereof in FIG. 4, each liquid crystal pixel 62 is driven by the switching elements 61 arranged in a matrix.

In FIG. 4, 63 is the vertical scanning circuit,
Reference numeral 64 represents a video signal sample hold circuit.

In this structure, after the switching element 61 is sequentially turned on and the potential is written in the liquid crystal pixel 62, it is necessary to maintain the potential for a predetermined period. In reality, however, the transistor as the switching element 61 is turned off. Since a leak current also exists, an additional capacitance Cs that compensates for the leak current is provided for each pixel.

Such an active matrix liquid crystal display device is remarkably popular because the problem of crosstalk between pixels is improved and a fine image can be displayed.

This type of liquid crystal display device is generally constructed by filling a liquid crystal layer between transparent first and second substrates when a transmissive type is adopted. Then, the above-described switching element 61 is formed on one of the first substrates, for example, and the three primary color filter portions are provided on the other second substrate, and a black mask portion that partitions each liquid crystal pixel 62 is provided.

FIG. 5 is a schematic enlarged plan view of a main part of an example of such a liquid crystal display device. In FIG. 5, 12 is Al
4 is a signal line from the video signal sample and hold circuit in FIG. 4, and 4 is a semiconductor layer forming a thin film transistor TFT as the switching element 61 in FIG. The resistance is reduced by the source / drain (S /
D) Regions 5 and 6 and channel forming region 7 are formed.
Then, these S / D regions 5 and 6, and the channel formation region 7
The gate electrode 9 is formed on the upper surface of the wiring layer 12 so as to extend in a direction orthogonal to the wiring layer 12 with an insulating layer interposed therebetween. This gate electrode 9 becomes a wiring from the vertical scanning circuit 63 to the switching element 61 in FIG.

On the other hand, an additional capacitance Cs is formed in the extension of the semiconductor layer 4, and, for example, a part of the semiconductor layer 4 is made low in resistance to form a first electrode 21, and a dielectric layer (not shown) is formed. A second electrode 23 is deposited thereover by the same constituent layer as the above-mentioned gate electrode 9. The second electrode 23 extends in a direction orthogonal to the wiring layer 12 and serves as, for example, a ground line similarly to the gate electrode 9, for example.

Then, an image is displayed in a region surrounded by the gate electrode 9 of these thin film transistors TFT, the wiring layer 12 on the additional capacitance Cs, and the second electrode 23.
A pixel electrode 51 made of a transparent conductive layer such as ITO (mixed oxide of In and Sn) whose outline is indicated by a broken line I is deposited.

Each of the above-described elements is formed on one substrate, for example, a first substrate (not shown), while black is provided on the other, for example, a second substrate (not shown). A mask portion 41 is provided to shield unnecessary portions such as the above-mentioned elements from light.

That is, since the liquid crystal layer responds to the potential difference applied to it, for example, in the so-called normally white state in which there is no voltage and is transparent, the pixel electrode 5 on the first substrate side is formed.
In the portion where 1 is not provided, light leakage occurs and the contrast cannot be obtained. In addition, also in the portion where the pixel electrode 51 is provided, light is partially blocked by, for example, the additional capacitance Cs, and unevenness occurs. Therefore, as described above, the black mask portion 41 is provided on the side of the second substrate 2 that faces the black mask portion 41 to block light from this portion, and the liquid crystal pixel 62 in FIG. 4 described above is configured with a clear contour. To do so.

Reference numeral 41C denotes an opening of the black mask portion, which is provided so that the inner edge of the opening is located inside the outer edge of the pixel electrode 51 in consideration of the alignment margin. In this case, on the additional capacitance Cs, the distance d ₁ on the plane between the second electrode 23 and the pixel electrode 51 is about 2 μm,
The distance d ₂ on the plane between the wiring layer 12 and the pixel electrode 51 is about 5 μm for the reason described later.

FIG. 6 shows a schematic enlarged cross-sectional view of the portion on the line AA in FIG. 5, that is, the portion forming the thin film transistor TFT and the additional capacitor Cs.

In FIG. 6, 1 is one of the substrates, for example, the first substrate.
The semiconductor layer 4 is formed on the inner surface of the substrate,
The body layer 4 has a thin film that becomes the switching element 61 of each pixel.
S / D regions 5 and 6 forming a transistor TFT,
The channel forming region 7 is formed between them. See also
SiO is formed on the channel forming region 7 of the body layer 4.₂, Si ₃
N_FourA gate insulating layer 8 made of
For example, a gate electrode 9 made of a semiconductor layer is deposited and formed.
It

On the other hand, an additional capacitor Cs is formed on the other portion of the substrate 1 at the same time as the manufacturing of the TFT thin film transistor in the same step. That is, the additional capacitance Cs forms a low specific resistance region in a part of the semiconductor layer 4 formed on the substrate 1, and one of the first electrodes 21 constituting the additional capacitance Cs forms the low specific resistance region.
Then, the gate insulating layer 8 of the thin film transistor TFT is configured as a dielectric layer 23 forming the additional capacitance Cs, and the second electrode 22 forming the additional capacitance Cs on the dielectric layer 23 is the same as the gate electrode 9. Is formed in the process of.

And these thin film transistors TFT,
An interlayer insulating layer 11 made of, for example, PSG (phosphosilicate glass) is deposited so as to cover the additional capacitance Cs, and an opening 12C is formed in a required portion so as to reach one S / D region 5 of the thin film transistor TFT. This opening 1
The wiring layer 12 made of Al or the like is embedded in the 2C layer as shown in FIG.
The signal line is formed as a signal line from the video signal sample hold circuit described in the above.

An interlayer insulating layer 13 made of PSG or the like is entirely deposited on this, and the other S / D region 6 of the thin film transistor TFT is spread over the insulating layers 13 and 11.
The opening 51C is formed so as to reach. Then, a pixel electrode 51 made of a transparent conductive layer such as ITO is deposited and patterned so as to fill the opening 51C.

Then, S for improving the film quality of the semiconductor layer 4 so as to cover the upper portion of the thin film transistor TFT, for example.
An insulating layer 15 made of iN or the like is deposited, and the insulating layer 15,
An alignment layer 16 made of polyimide or the like is deposited over the entire surface of the pixel electrode 51 to form the first substrate 1.

On the other hand, a black mask portion 41 is formed on the second substrate 2 in a desired pattern, and three primary color filter portions 42 are patterned on the black mask portion 41 to form a color filter layer 40. Insulating layer 43 made of PSG or the like, IT entirely covering them
The transparent substrate 52 made of O or the like and the alignment layer 44 made of polyimide or the like are applied to form the second substrate 2. 41C
Is an opening of the black mask portion 41, and 3 is a liquid crystal layer filled between the first and second substrates 1 and 2.

Further, FIG. 7 shows an enlarged schematic sectional view taken along the line BB in FIG. In FIG. 7, parts corresponding to those in FIG. In this case, a wiring layer 12 made of Al or the like is formed on the first substrate 1, and a pixel electrode 51 made of ITO or the like is patterned so as to cover the wiring layer 12 via an interlayer insulating layer 13 such as PSG. An alignment layer 16 made of polyimide or the like is deposited on this.

On the other second substrate 2, a black mask portion 41 is applied in a desired pattern, and three primary color filter portions 42 are provided so as to partially overlap the black mask portion 41 to form a color filter layer 40. Consists of Then, an insulating layer 43 made of PSG or the like is applied over the entire surface of the color filter layer 40, a transparent electrode 52 made of ITO or the like is applied, and an alignment layer 44 made of polyimide or the like is applied. Two substrates 2 are constructed.

In this case, the pixel electrode 51 and the wiring layer 12 are
Distance d to ensure electrical isolation_AIIs 2 μm or more
Must be, as mentioned further above, black mask
In order to surely block the leaked light by the portion 41, the first
The combination of the pixel electrode 51 on the substrate 1 and the black mask portion 41
Considering the margin, the opening 41C of the black mask portion 41
Need to be set. That is, in this case, each substrate 1 and 2
The alignment margin is 1.5 μm, and the black mask portion 41 itself
The body alignment tolerance is 1 μm, and on the side of the first substrate 1
As the alignment margin between the wiring layer 12 and the pixel electrode 51 of
0.5 μm spacing is required for each, and these must be combined.
Therefore, the end of the pixel electrode 51 and the opening of the black mask portion 41 are formed.
Distance d on the plane with the edge_IBIs about 3 μm. That is, the above
This spacing, together with the spacing for electrical isolation of
Distance d between the line layer 12 and the pixel electrode 51 ₂As mentioned above
It is necessary to take about 5 μm.

Therefore, the current aperture ratio of the entire black mask portion 41 is about 35% or less, and it is desired to increase the aperture ratio. Especially when producing a high-definition display, that is, a small-pixel display, the area per pixel is small, so the screen brightness is impaired.
It is desired to increase the aperture ratio.

Further, in such an active matrix type liquid crystal display device, image disturbance due to an electric field from the wiring layer 12 serving as a signal line, that is, a signal electric field in this portion affects the electric field held by the pixel electrode 51. Exert
There is a problem in that the alignment of the liquid crystal layer 3 in the opening 41C, that is, in the image region is disturbed and the image quality is deteriorated.

On the other hand, in order to increase the aperture ratio as described above, in the "Monthly Semiconductor World", July 1991 issue, pages 179 to 182, the light shielding layer is provided on the substrate side where the thin film transistor TFT is provided. A structure to be formed in is proposed. In this example, a light-shielding layer is directly provided on a substrate, a thin film transistor is formed on the light-shielding layer, and then a pixel electrode is formed by deposition. However, in this case, the deterioration of the image quality due to the disorder of the alignment of the liquid crystal layer 3 due to the signal electric field of the wiring layer 12 as described above is not considered.

[0026]

As described above, the present invention increases the aperture ratio of the black mask portion of the liquid crystal display device to increase the area per pixel and, at the same time, increases the area of one pixel of the liquid crystal layer by the electric field of the wiring layer. Distortion of orientation is suppressed to improve image quality.

[0027]

FIG. 1 is a schematic enlarged plan view of a main part of an example of a liquid crystal display device according to the present invention. The present invention, as shown in FIG. 1, includes a first substrate and a second substrate facing each other, a liquid crystal layer filled between the substrates, and a first substrate and a second substrate.
Pixel electrodes 51 arranged in a matrix on the substrate
And a thin film transistor T connected to the pixel electrode 51.
A liquid crystal display device comprising an FT, wherein a metal layer 14 electrically connected to the pixel electrode 51 and impermeable to light is provided around the pixel electrode 51, and a side for filling the liquid crystal layer of the second substrate. And a color filter layer having a three-primary-color filter section and a black mask section provided at the boundary of these filter sections.

[0028]

As described above, in the liquid crystal display device of the present invention, the metal layer 14 which does not transmit light is provided in the peripheral portion of the pixel electrode 51 on the first substrate 1. By providing the metal layer 14 for masking light on the substrate 1 side of the substrate, the mask layer can be aligned on the same substrate with respect to a region where the pixel electrode 51 is not provided, that is, a portion where light should be blocked. Therefore, the alignment margin can be reduced.

Therefore, the aperture ratio of the black mask portion 41 can be increased and the brightness of the liquid crystal display device can be improved.

In the present invention, the metal layer 14 is electrically connected to the pixel electrode 51. With this structure, the image quality of the entire pixel region can be improved. It was This will be explained.

That is, in the portion where the pixel electrode 51 is not provided, the wiring layer 12 which becomes the signal line in the conventional device.
The liquid crystal layer 3 in the vicinity of the wiring layer 12 may be affected by the signal electric field applied to the liquid crystal layer 12 and disturb the pixel region. However, according to the configuration of the present invention, the electric field of the wiring layer 12 is weakened by the electric field of the metal layer 14 electrically connected to the pixel electrode 51, and the metal layer 14 itself prevents the liquid crystal layer 3 in the periphery from being weakened. It has the advantage that it can be oriented.

Therefore, by providing the metal layer 14, the portion where the pixel electrode 51 is not provided is shielded from light, the disturbance of the liquid crystal layer 3 due to the electric field due to the wiring layer 12 is suppressed, and the liquid crystal layer at the peripheral portion of the pixel region is further suppressed. 3 can be reliably oriented with the potential of the pixel electrode 51, and the disturbance of the peripheral portion can be avoided. As a result, the image quality can be improved.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the plan view of FIG. 1 and the schematic enlarged sectional views of FIGS. Figure 1
3, parts corresponding to those in FIGS. 5 to 7 are designated by the same reference numerals. Also in this example, a case where a transmissive structure is adopted in the example of the active matrix type liquid crystal display device described in the circuit diagram of FIG.
And the second substrates 1 and 2 are provided, and the liquid crystal layer 3 is filled between them.

That is, also in this case, as shown in FIG. 1, the wiring layer 12 made of Al or the like is formed as a signal line from the video signal sample hold circuit in FIG. Reference numeral 4 denotes a semiconductor layer that constitutes the thin film transistor TFT as the switching element 61 in FIG. 4, and the resistance is reduced to a part of the semiconductor layer 4 by impurity implantation or the like so that the S / D regions 5 and 6 and the channel formation region 7 are formed. It is formed. Then, a gate electrode 9 is formed on the S / D regions 5 and 6 and the channel formation region 7 with a gate insulating layer (not shown) interposed therebetween so as to extend in a direction orthogonal to the wiring layer 12, for example. This gate electrode 9 becomes a wiring from the vertical scanning circuit 63 to the switching element 61 in FIG.

On the other hand, an additional capacitance Cs is formed in the extension of the semiconductor layer 4, and for example, a part of the semiconductor layer 4 is made low in resistance to form the first electrode 21. The second electrode 23 is deposited on the dielectric layer formed of at least a part of the same constituent layer as the above-mentioned constituent layer of the gate electrode 9. The second electrode 23 extends in a direction orthogonal to the wiring layer 12 and serves as, for example, a ground line similarly to the gate electrode 9, for example.

Then, in a region surrounded by the gate electrode 9 of the thin film transistor TFT, the wiring layer 12 on the additional capacitance Cs, and the second electrode 23, the thin film transistor TF is formed.
A metal layer 14 made of Ti or the like which does not transmit light is applied in a frame shape as shown by hatching in FIG. 1 so as to cover a part of T and the additional capacitance Cs, and further this metal layer. A pixel electrode 51 made of a transparent conductive layer such as ITO is adhered and formed on the region surrounded by 14 as indicated by a broken line I. At this time, the pixel electrode 51 is partially formed on the metal layer 14.
To directly contact the metal layer 14 and the pixel electrode 51.
And to be electrically connected.

Then, on the other substrate (not shown) provided so as to face one substrate (not shown) on which each of these elements is formed, the black mask portion 41 has unnecessary portions such as the above-mentioned elements and the like. It is provided to block light.

Reference numeral 41C denotes an opening of the black mask portion, which is provided so that the inner edge of the opening is located inside the outer edge of the pixel electrode 51 in consideration of the alignment margin. In this case, on the additional capacitance Cs, the distance d ₁ on the plane between the second electrode 23 and the pixel electrode 51 is about 2 μm,
Further, the distance d ₂ on the plane between the wiring layer 12 and the pixel electrode 51 can be set to about 3.5 μm for the reason described later.

FIG. 2 shows an enlarged schematic cross-sectional view of a portion on the line CC in FIG. 1, that is, a portion forming the thin film transistor TFT and the additional capacitor Cs.

In FIG. 2, reference numeral 1 is one of, for example, the first substrate 1 on which a semiconductor layer 4 is formed, and in this semiconductor layer 4, a thin film transistor TFT which becomes a switching element 61 of each pixel is formed. The / D regions 5 and 6 and the channel forming region 7 are formed therebetween. On the channel formation region 7 of the semiconductor layer 4, SiO ₂ , Si ₃ N
_A gate insulating layer 8 made of ₄ or the like is formed, and a gate electrode 9 made of, for example, a semiconductor layer is deposited on the gate insulating layer 8.

On the other hand, an additional capacitor Cs is formed in the other part of the substrate 1 at the same time as the manufacturing of the TFT thin film transistor in the same process. That is, a low resistivity region is formed in a part of the semiconductor layer 4 formed on the substrate 1 to form the first electrode 21 on one side, and a dielectric layer is formed on the low resistivity region by the same step as the gate insulating layer 8 of the thin film transistor TFT. The layer 23 is formed, and the second electrode 22 is formed on the dielectric layer 23 in the same step as the gate electrode 9 to form the additional capacitance Cs.

Then, with these thin film transistors TFT,
An interlayer insulating layer 11 made of, for example, PSG is deposited so as to cover the additional capacitance Cs, and an opening 12C is formed in a required portion so as to reach one S / D region 5 of the thin film transistor TFT. Al so as to fill the inside of 12C
A wiring layer 12 made of the same material is deposited and formed as a signal line from the video signal sample hold circuit described in FIG.

An interlayer insulating layer 13 made of PSG or the like is entirely deposited on this, and the other S / D region 6 of the thin film transistor TFT is spread over the insulating layers 13 and 11.
The opening 51C is formed so as to reach. Then, a metal layer 14 made of Ti or the like which does not transmit light is deposited so as to fill the inside of the opening 51C and patterned into a desired pattern. In this case, the distance d ₁ = from the end of the first electrode 21 by covering the additional capacitance Cs from inside the opening 51C.
It is formed as an overlapping pattern with a thickness of about 2 μm. Then, ITO is directly formed on the metal layer 14.
A pixel electrode 51 made of a transparent conductive layer such as is deposited and patterned.

Then, for example, S for improving the film quality of the semiconductor layer 4 so as to cover the upper portion of the thin film transistor TFT.
An insulating layer 15 made of iN or the like is deposited, and the insulating layer 15,
An alignment layer 16 made of polyimide or the like is deposited over the entire surface of the pixel electrode 51 to form the first substrate 1.

On the other hand, a black mask portion 41 is formed on the second substrate 2 in a desired pattern, and three primary color filter portions 42 are patterned on the black mask portion 41 to form a color filter layer 40. Insulating layer 43 made of PSG or the like, IT entirely covering them
The transparent substrate 52 made of O or the like and the alignment layer 44 made of polyimide or the like are applied to form the second substrate 2. 41C
Is an opening of the black mask portion 41, and 3 is a liquid crystal layer filled between the first and second substrates 1 and 2.

Further, FIG. 3 shows a schematic enlarged cross-sectional view taken along the line DD in FIG. In FIG. 3, the portions corresponding to those in FIG. In this case, a wiring layer 12 made of Al or the like is formed on the first substrate 1, and an interlayer insulating layer 13 made of PSG or the like is deposited so as to cover the wiring layer 12, and a required width, for example, a width w of 2 μm is formed thereon. _{With T}
Further, a metal layer 14 made of Ti or the like is deposited so as to maintain a required space described later between the metal layer 14 and another portion, and I is further deposited on the metal layer 14.
A pixel electrode 51 made of TO or the like is patterned, and an alignment layer 16 made of polyimide or the like is further deposited thereon.

On the other second substrate 2, a black mask portion 41 is applied in a desired pattern, and three primary color filter portions 42 are provided so as to partially overlap with the black mask portion 41 to form a color filter layer 40. Consists of Then, a transparent electrode 52 made of ITO or the like is deposited over the entire surface of the color filter layer 40 through an insulating layer 43 made of PSG or the like, and an alignment layer 44 made of polyimide or the like is deposited so as to form a second layer. The substrate 2 is constructed.

In this case, since the metal layer 14 serving as the photomask is provided on the first substrate 1 as described above, the alignment margin can be reduced and the wiring layer 12 can be reduced.
The distance between the black mask portion 41 and the opening 41C of the black mask portion 41 can be made smaller than in the conventional case. That is, in this case, the wiring layer 1
The distance d _AT on the plane between 2 and the metal layer 14 is, for example, 1 μm,
As described above, the width w _T of the metal layer 14 is, for example, 2 μm, and the plane distance d _TB between the metal layer 14 and the end of the opening 41C of the black mask portion 41 is, for example, 0.5 μm. The distance d ₂ from the end of the opening 41C is 3.5 μ.
It can be about m.

That is, the distance between the wiring layer 12 and the opening 41C of the black mask portion 41 is reduced while maintaining the distance of 2 μm in order to reliably electrically separate the pixel electrode 51 and the wiring layer 12. You can

As described above, according to the present invention, the distance of the opening 41C from the wiring layer 12 can be reduced by 1.5 μm as compared with the conventional liquid crystal display device as compared with the conventional 5 μm. The aperture ratio could be increased by about 8 to 10%.

Further, particularly in the present invention, the metal layer 14 which shields this unnecessary portion is provided to be electrically connected to the pixel electrode 51. Therefore, due to the electric field of the wiring layer 12 on the metal layer 14, the liquid crystal is formed. The oriented portion of the layer 3 can be shielded, and the signal line electric field from the wiring layer 12 can be weakened by the metal layer 14 itself.
Disturbance of the liquid crystal layer 3 can be suppressed.

Moreover, since the liquid crystal layer 3 can be oriented by the electric field of the metal layer 14 which has the same potential as that of the pixel electrode 51, the region to be oriented by the pixel electrode 51 can be substantially expanded. Therefore, in the configuration of the present invention, the disturbance due to the wiring layer 12 which has been generated in the peripheral portion of the pixel region in the related art can be surely suppressed, and pixels having uniform image quality including the peripheral portion can be obtained, and the entire liquid crystal display device can be obtained. The image quality of can be improved.

Further, in the above example, the metal layer 14 is formed of the pixel electrode 51 made of ITO or the like and the thin film transistor TF.
It is arranged to intervene in the connecting portion with the S / D region 6 made of T polycrystal Si semiconductor layer or the like. Conventionally like this
When the pixel electrode 51 is composed of TO, the opening 5
Although the coverage in 1C was not sufficient, which could cause poor contact, according to the above-described embodiment, the coverage is compensated by both the metal layer 14 made of Ti or the like and the pixel electrode 51. As a result, it is possible to reduce the occurrence of defective products, and in particular, as described above, the S / D region 6 made of polycrystalline Si or the like and the pixel electrode 51 made of ITO or the like.
When the above-mentioned configuration is applied to and, the electric resistance thereof can be remarkably reduced, and the contact in this portion can be improved.

The present invention is not limited to the above-mentioned embodiments, but can be applied to various other liquid crystal display devices.

[0055]

As described above, according to the liquid crystal display device of the present invention, since the metal layer 14 which does not transmit light is provided around the pixel electrode 51 on the first substrate 1, the first substrate is provided. Positioned by the metal layer 14 provided on the same substrate 1 with respect to a portion where light is to be masked, such as a region on which the pixel electrode 51 is not formed and the first electrode 21 of the additional electrode Cs that causes light unevenness. Since the alignment can be performed, the alignment margin can be reduced.

Therefore, the opening portion 41C of the black mask portion 41 and the wiring layer 1 provided on the side of the second substrate 2 facing the wiring substrate 1
It is possible to reduce the distance from 2 to 3.5 μm,
The aperture ratio of the black mask portion 41 can be increased.

In particular, by applying the present invention to a high-definition or small-pixel liquid crystal display device, the brightness of the screen can be improved by enlarging the opening.

Further, the electric field of the wiring layer 12 is applied to the pixel electrode 5
1 can be weakened by the electric field of the metal layer 14 electrically connected to the liquid crystal layer 1, and the influence of the signal line electric field on the liquid crystal layer 3 in this portion can be reduced.
The peripheral liquid crystal layer 3 can be aligned by 4 itself. That is, the metal layer 14 shields the portion where the pixel electrode 51 is not provided from light, suppresses the disturbance of the liquid crystal layer 3 due to the electric field due to the wiring layer 12, and further ensures that the liquid crystal layer 3 at the peripheral portion of the pixel region is covered with the pixel electrode 51. The orientation can be performed with an electric potential, and the disturbance of the peripheral portion can be avoided. As a result, the image quality can be improved.

Further, as described above, the pixel electrode 51 and the S /
When the structure in which the metal layer 14 is interposed in the opening 51C with the D region 6 is adopted, the coverage can be compensated by both the metal layer 14 and the pixel electrode 51, and the generation of defective products can be reduced. In addition, the electrical resistance between the S / D region 6 made of polycrystalline Si or the like and the pixel electrode 51 made of ITO or the like can be significantly reduced, and the contact in this portion can be improved. can do.

[Brief description of drawings]

FIG. 1 is an enlarged schematic plan view of a main part of an example of a liquid crystal display device of the present invention.

FIG. 2 is an enlarged schematic cross-sectional view of a main part of an example of the liquid crystal display device of the present invention.

FIG. 3 is a schematic linear enlarged cross-sectional view of a main part of an example of the liquid crystal display device of the present invention.

FIG. 4 is an equivalent circuit diagram of a main part of an example of a liquid crystal display device.

FIG. 5 is a schematic enlarged plan view of a main part of an example of a conventional liquid crystal display device.

FIG. 6 is an enlarged schematic cross-sectional view of a main part of an example of a conventional liquid crystal display device.

FIG. 7 is a schematic linear enlarged cross-sectional view of a main part of an example of a conventional liquid crystal display device.

[Explanation of symbols]

 1 First Substrate 2 Second Substrate 3 Liquid Crystal Layer 4 Semiconductor Layer 5 S / D Region 6 S / D Region 7 Channel Forming Layer 8 Gate Insulating Layer 9 Gate Electrode 11 Insulating Layer 12 Wiring Layer 13 Insulating Layer 14 Metal Layer 15 Insulating layer 16 Protective layer 21 First electrode 22 Dielectric layer 23 Second electrode 40 Color filter layer 41 Black mask part 42 Three primary color filter part 43 Insulating layer 44 Protective layer 51 Pixel electrode 52 Transparent electrode

Claims (1)

1. A first substrate and a second substrate facing each other, a liquid crystal layer filled between these substrates, and a matrix arrayed on the first substrate. A liquid crystal display device comprising a pixel electrode and a thin film transistor connected to the pixel electrode, wherein a metal layer electrically connected to the pixel electrode and impermeable to light is provided around the pixel electrode, 2. A liquid crystal display device, wherein a color filter layer having three primary color filter portions and a black mask portion provided at a boundary between these filter portions is provided on a side of the second substrate which is filled with the liquid crystal layer.