JPH05283722A - Solar battery and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a method to obtain a thin film crystal solar battery by exfoliating the epitaxial layer grown on an Si wafer. CONSTITUTION:A porous Si layer 303 is formed on an Si wafer 301 by anodic formation, a patterned insulating layer 302 is provided thereon, and an epitaxial Si layer 304 is grown by a selective epitaxial growth method. After the insulating layer 302 has been removed through a void 305, the epitaxial Si layer 304 is separated from the wafer 301 by selectively etching the porous Si layer 303 only. The separated Si 304 is fixed to a metal substrate, and a solar battery is formed. As a result, a thin film crystal solar battery of high quality can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a solar cell and a solar cell. In particular, the present invention relates to a solar cell manufacturing method and a solar cell having good energy conversion efficiency.

[0002]

2. Description of the Related Art In various devices, solar cells are used as a driving energy source.

A solar cell uses a pn junction in its functional portion, and silicon is generally used as a semiconductor forming the pn junction. The forms of silicon used as a semiconductor include single crystal, polycrystalline and amorphous.
Amorphous silicon is considered to be advantageous from the viewpoints of large area and cost reduction, but it is preferable to use single crystal silicon from the viewpoint of efficiency and stability of converting light energy into electromotive force.

In recent years, the use of polycrystalline silicon has been studied for the purpose of obtaining a low cost like amorphous silicon and a high energy conversion efficiency like single crystal silicon. However, in the method proposed hitherto, it is difficult to reduce the thickness to 0.3 mm or less by slicing a lump polycrystal into a plate-like body, just as in the case of single-crystal silicon. Therefore, the thickness is more than necessary to sufficiently absorb the amount of light, and the effective use of the material was not sufficient in this respect. That is, it is necessary to sufficiently reduce the thickness in order to reduce the cost. Recently, a method of forming a silicon sheet by a method of pouring molten silicon droplets into a mold has been proposed, but the thickness is at least 0.1 mm.
The thickness is about 0.2 mm, and the thickness is still insufficient as compared with the film thickness (20 to 50 μm) necessary for absorbing light as crystalline silicon.

[0005]

Therefore, more importantly, by separating (peeling) a thin film epitaxial layer grown on a single crystal silicon substrate from the substrate and using it for a solar cell, high energy conversion efficiency and cost reduction can be achieved. Attempts to achieve have been proposed (Milnes, AG and Fe.
ucht, D.M. L. , "Peel-ed Film T"
technology Solar Cells ", IEEE
E Photo-voltaic Specialis
t Conference, p. 338, 1975).

However, according to the above method, SiGe is formed between the single crystal silicon serving as the substrate and the growth epitaxial layer.
It is necessary to insert the intermediate layer of No. 2 for heteroepitaxial growth and then selectively melt the intermediate layer to peel off the grown layer. Generally, when heteroepitaxial growth is performed, defects are likely to be induced at the growth interface because the lattice constants are different. Also, in terms of using different materials,
It cannot be said that there is a cost advantage.

On the other hand, U.S.P. S. Pat. No. 4,81
No. 6,420, that is, a sheet-shaped crystal is formed on a crystal substrate through a mask material by selective epitaxial growth and lateral growth, and then separated from the substrate. It was shown that a thin crystalline solar cell can be obtained by the manufacturing method.

However, in the above method, the opening provided in the mask material is line-shaped, and in order to separate the sheet-shaped crystal grown by selective epitaxial growth and lateral growth from this line seed, the crystal of the crystal is separated. Since mechanical peeling is performed by utilizing the opening, if the shape of the line seed is larger than a certain size, the area of contact with the substrate is large, so that the sheet-like crystal is damaged during peeling. Especially when increasing the area of a solar cell, no matter how narrow the line width is (actually around 1 μm), the line length is several meters.
If the size is from m to several cm or more, it becomes a fatal problem.

In the above method, S is used as a mask material.
An example of growing a silicon thin film by selective epitaxial growth and lateral growth at a substrate temperature of 1000 ° C. using iO ₂ is shown. However, at such a high temperature, the reaction between the growing silicon layer and SiO ₂ causes Substantial stacking faults (plane defects) may be introduced on the silicon layer side near the silicon layer / SiO ₂ interface. Such defects have a great adverse effect on the characteristics of the solar cell.

The method of the present invention eliminates the above-mentioned drawbacks of the prior art and provides a method for producing a high quality thin film single crystal solar cell.

An object of the present invention is to provide a high quality solar cell by using a single crystal semiconductor.

Another object of the present invention is to provide an inexpensive solar cell by transferring an epitaxial layer formed on a silicon wafer onto a substrate such as a SUS substrate.

[0013]

The present invention has been completed as a result of earnest research by the present inventors in order to solve the above problems in the prior art and achieve the above object. That is, the method for producing a solar cell of the present invention is the method for producing a solar cell using an epitaxial film grown on a silicon wafer, comprising the steps of i) forming a porous layer on one surface of the wafer by anodization. , Ii)
Forming an insulating layer on the porous layer, and patterning the insulating layer to leave only a part of the insulating layer to produce a substrate;
ii) growing a silicon layer on the substrate by a selective epitaxial growth method other than the insulating layer, iv) forming a semiconductor junction on the surface of the silicon layer, and v) forming a semiconductor junction on the insulating layer. And a step of removing the insulating layer and the porous layer by etching through the formed voids to separate the silicon layer from the substrate.

In the solar cell of the present invention, i) a step of forming a porous layer on one surface of a silicon wafer by anodization, and ii) forming an insulating layer on the porous layer and patterning the insulating layer. A step of forming a substrate leaving only a part thereof; iii) a step of growing a silicon layer on a porous layer other than the insulating layer of the substrate by a selective epitaxial growth method; and iv) a semiconductor junction on the surface of the silicon layer. And the step of v) removing the insulating layer and the porous layer by etching through the voids formed on the insulating layer to separate the silicon layer from the substrate. To do.

As shown in FIG. 3, the main technique of the present invention is to make the surface of a silicon wafer porous by anodization in a HF solution, and to form a non-nucleated surface and a porous surface partially formed on the surface. This is to form a single crystal silicon thin film by stacking silicon layers by selective epitaxial growth performed using the porous layer and selectively removing the porous layer through the voids on the non-nucleation surface by selective etching.

Here, the general principle of the selective epitaxial growth method will be briefly described. The selective epitaxial growth method means that when an epitaxial growth is performed by using a vapor phase growth method or the like, as shown in FIGS. 2A and 2B, an insulating layer such as an oxide film formed on a silicon wafer is formed. Is a selective crystal growth method in which an exposed silicon surface other than the insulating layer is used as a seed crystal for epitaxial growth under conditions where nucleation does not occur.

The formation of porous silicon by anodization requires holes for the anodic reaction, so that it is said that the p-type silicon in which holes are mainly present is used to make the porous (T. Unagami, J. Electrochem.
Soc. , Vol. 127, 476 (1980)).

On the other hand, however, there is also a report that low resistance n-type silicon is made porous (RP Holm.
strom and J. Y. Chi, Appl. P
hys. Lett. , Vol. 42, 386 (198
3)), regardless of whether it is p-type or n-type, low resistance silicon can be used to make it porous. Porous silicon obtained by anodizing single crystal silicon has pores with a diameter of about several hundred liters observed by a transmission electron microscope, and the density thereof is less than half that of single crystal silicon. Nevertheless, single crystallinity is maintained, and it is generally well known that an epitaxial layer grows on porous silicon by the LPCVD method or the like. Furthermore, since porous silicon has a large amount of voids inside it as described above, and the surface area increases dramatically compared to the volume, its chemical etching rate is significantly higher than that of ordinary single crystal silicon. Be speeded up.

Further, only a conventional NaOH aqueous solution has been used as a selective etching solution for ordinary crystalline silicon and porous silicon, and in the selective etching of porous silicon using this NaOH aqueous solution, Na ions are adsorbed on the etching surface. Therefore, there is a problem of causing impurity contamination.

The inventors of the present invention have conducted repeated experiments to form an insulating layer that partially serves as a non-nucleating surface on the upper surface of the porous silicon layer to form a porous surface by selective epitaxial growth using the insulating layer and the porous surface. A single crystal silicon layer can be formed only on the top, and a porous silicon layer is selected with a mixed solution of hydrofluoric acid, alcohol, and hydrogen peroxide solution that does not have an etching effect on crystalline silicon through the voids in the insulating layer. Found that it can be etched selectively.
As a result, the inventors have found that a good quality thin film single crystal silicon layer can be transferred onto a non-single crystal substrate such as a metal substrate, and have completed the present invention. The experiment conducted by the present inventors will be described in detail below.

(Experiment 1) Formation of porous silicon p having a specific resistance of 0.01 Ω · cm and a thickness of 500 μm
A mold (100) single crystal silicon wafer was anodized in an aqueous HF solution. Table 1 shows anodization conditions.

Observation of the surface of the obtained porous silicon layer with a transmission electron microscope revealed that pores having an average diameter of about 600 Å were formed. Also, when the cross section of the porous silicon layer was observed with a high resolution scanning electron microscope, it was confirmed that minute holes were similarly formed in the direction perpendicular to the substrate. Further, when the anodization time was increased under the conditions of Table 1 to increase the thickness of the porous silicon layer and the density was measured,
It was found that the density of the porous silicon layer was 1.1 g / cm ³ , which was about half that of single crystal silicon.

[0023]

[Table 1] (Experiment 2) Selective epitaxy using porous silicon
As shown in FIG. 3A, a thermal oxide film is formed as an insulating layer 302 on the surface of the porous silicon layer formed on the wafer in Experiment 1 of growth method, and etching is performed by using photolithography. It was patterned into a square of a = 70 μm and provided at intervals of b = 400 μm. Next, selective epitaxial growth was performed by a normal low pressure CVD method (LPCVD method). SiH ₂ Cl ₂ was used as a raw material, H ₂ was added as a carrier gas, and HCl was added to suppress the generation of nuclei on the oxide film of the insulating layer. Table 2 shows the growth conditions at this time.

When the state of the crystal growth surface after the growth was observed with an optical microscope and a scanning electron microscope, it was confirmed that it was as shown in FIG. 3 (b).

[0025]

[Table 2] Here, a flat surface was obtained, and when the cross section of the growth layer was observed by a transmission electron microscope, it was confirmed that it was a single crystal epitaxial layer having good crystallinity. Further, FIGS. 4 (a) and 4 (b) show the states of the substrate before and after growth as seen from above. Since the epitaxial layer is overgrown on the insulating layer, the size of the void is smaller than that of the insulating layer.

(Experiment 3) Selective etching of porous silicon
The etching of porous silicon prepared under the same conditions as in Experiment 1 by a mixed solution of hydrofluoric acid, alcohol, and hydrogen peroxide solution was investigated.

FIG. 5 shows porous silicon and single crystal silicon in 49% hydrofluoric acid, 100% ethyl alcohol and 30%.
The time dependence of the thickness of the etched porous silicon and the single crystal silicon when infiltrated in a mixed solution (10: 6: 50) with hydrogen peroxide solution without stirring is shown. The thicknesses of the porous silicon and the single crystal silicon before the start of etching were 300 μm and 500 μm, respectively.

Porous silicon and single crystal silicon were infiltrated into the above mixture at room temperature to measure the reduction in thickness.
Porous silicon is rapidly etched and takes about 1 minute in 40 minutes.
07 μm and 244 μm were also etched after 80 minutes. Despite such a high etching rate, the surface after etching was very flat. In contrast,
The thickness of the single crystal silicon etched after 120 minutes was 50 Å or less, and it was revealed that the silicon was hardly etched.

(Experiment 4) By removing the insulating layer and the porous layer
The epitaxial film 305 on the porous silicon 304 obtained in the separation experiment 2 of the epitaxial film was immersed in an HF aqueous solution, and the oxide film 302 as the insulating layer was removed by etching through the void 303 (see FIG. c)). Next, when the wafer was soaked in the same mixed etching solution as described above and left to stand, voids 3
Only the porous silicon was selectively etched through 03, and the epitaxial film 305 was separated from the wafer (FIG. 3D). Observation of the epitaxial surface (on the side facing the porous layer) after washing / drying with a high resolution scanning electron microscope revealed that a single crystal silicon layer with a very flat surface was formed with a thickness of about 13 μm. Was there. Also, when the surface of the wafer (the side facing the porous layer) was observed in the same manner, it was also very flat.

(Experiment 5) Formation of Solar Cell A solar cell was prepared based on the results of Experiments 1 to 4. As in Experiment 1, a porous silicon layer was formed on the silicon wafer under the conditions shown in Table 1. A thermal oxide film of 3000 Å is formed as an insulating layer on the surface of porous silicon, and a side is a = 70.
It was patterned into squares of μm and provided at intervals of b = 400 μm. Next, selective epitaxial growth was performed under the conditions shown in Table 2 using a normal LPCVD apparatus. In the same manner as in Experiment 4, the wafer was dipped in an HF aqueous solution to remove the oxide film through the voids, and then dipped in a mixed solution of hydrofluoric acid / ethyl alcohol / hydrogen peroxide water to selectively etch the porous silicon. And the epitaxial film was separated. After the separated epitaxial thin film is washed / dried, it is placed on a metal substrate (Cr substrate) and annealed at 600 ° C. in N ₂ to form a silicide layer at the interface between the metal (Cr) and the epitaxial layer to form a metal substrate. The epitaxial layer was fixed on top.

Next, the surface of the epitaxial layer and the surface of the metal (Cr) exposed in the voids of the epitaxial layer were simultaneously oxidized by keeping at 900 ° C. in an O ₂ atmosphere. H
Only the oxide film on the surface of the epitaxial layer was etched with an aqueous solution of F to expose the silicon surface.

Next, 50K of P is applied to the surface of the epitaxial layer.
Ion implantation at eV, 1 × 10 ¹⁵ cm ^-2 , 55
0 ℃, 1hour / 800 ℃, 30min / 550 ℃,
Continuous annealing was carried out under the condition of 1 hour to activate the impurities and recover the damage due to the ion implantation to form a junction. Finally, a transparent conductive film and a collecting electrode were vacuum-deposited on the surface of the epitaxial layer to manufacture a solar cell.

The solar cell formed by separating the epitaxial thin film thus grown on the porous substrate from the wafer was subjected to AM1.5 (100 mW / cm ² ) light irradiation and the current-voltage characteristic (IV characteristic). ), A cell area of 6 cm ² , an open circuit voltage of 0.56 V, a short circuit photocurrent of 30 mA / cm ² , a fill factor of 0.74, and a conversion efficiency of 1
It was 2.4%, and a good crystalline solar cell was obtained.

The feature of the present invention is that the wafer forming the porous layer can be reused, which is advantageous in terms of cost.

A hydrofluoric acid solution is used in the anodization method for forming the porous silicon layer used in the present invention.
When the F concentration is 10% or more, it can be made porous. The amount of current passed during anodization is appropriately determined depending on the HF concentration, the desired thickness of the porous layer, etc., but is generally several mA /
cm ² - several ten mA / cm ² range are suitable. Also HF
By adding an alcohol such as ethyl alcohol to the solution, the bubbles of the reaction product gas generated during the anodization can be removed from the reaction surface without instantaneous stirring, and the porous silicon can be uniformly and efficiently formed. .. The amount of alcohol to be added is appropriately determined according to the HF concentration and the desired thickness of the porous layer, and it is necessary to carefully determine so that the HF concentration does not become too low.

As the porous silicon selective etching solution used in the present invention, a mixed solution of hydrofluoric acid, alcohol and hydrogen peroxide solution is used. In particular, the addition of hydrogen peroxide solution accelerates the oxidation of silicon, and therefore the reaction rate can be increased compared to that without addition, and the reaction rate can be controlled by changing the ratio of hydrogen peroxide solution. can do. Further, by adding alcohol such as ethyl alcohol, bubbles of the reaction product gas due to etching can be instantly removed from the etching surface without stirring, and the porous silicon can be uniformly and efficiently etched. The conditions of the concentration of each solution of the etching solution and the temperature at the time of etching are such that the etching rate of the porous silicon and the etching selection ratio between the porous silicon and the normal single crystal silicon are practically acceptable in the manufacturing process, and the above. It is appropriately determined as long as the effect of alcohol is not impaired.

In the present invention, as the material of the insulating layer which is the non-nucleation surface provided on the porous silicon, the nucleation density on the surface is considerably higher than that of silicon from the viewpoint of suppressing nucleation during epitaxial layer growth. A small material is used. For example, SiO ₂ and Si ₃ N ₄ are typically used. The thickness of the insulating layer is not particularly limited, but it is suitable to be in the range of 0.1 to 1 μm.

The shape of the non-nucleation surface provided on the porous silicon according to the present invention is not particularly limited and may be any shape, but in the case of a square, the side length is the thickness of the epitaxial layer to be grown. Depending on the size, a = 30 to 300 μm is suitable. The arrangement of the non-nucleation surface is not particularly limited, but a typical one is a lattice point. The interval (period) for arranging the non-nucleation surface is appropriately determined depending on the thickness of the insulating layer and the thickness of the epitaxial layer which will be the non-nucleation surface, but is generally b.
= 50 μm to 5 mm is appropriate.

Examples of the method for forming the insulating layer to be the non-nucleation surface include thermal oxidation method and atmospheric pressure CVD method for SiO ₂ , LPCVD method and plasma C for Si ₃ N _4.
The VD method or the like is used.

The selective epitaxial growth method used in the present invention includes LPCVD method, sputtering method and plasma CVD method.
Method, optical CVD method or liquid phase growth method. For example, L
SiH ₂ is used as a source gas in the case of vapor phase growth method such as PCVD method, plasma CVD method or photo CVD method.
Cl ₂ , SiCl ₄ , SiHCl ₃ , SiH ₄ , Si ₂ H ₆ ,
Silanes such as SiH ₂ F ₂ and Si ₂ F ₆ and halogenated silanes are representative. Further, H ₂ is added as a carrier gas or in addition to the above-mentioned raw material gas for the purpose of obtaining a reducing atmosphere for promoting crystal growth.
The ratio of the amounts of the raw material gas and hydrogen is appropriately determined according to the formation method, the type of the raw material gas, and the formation conditions, and preferably 1:10 or more and 1: 1000 or less (introduction flow rate ratio). Preferably 1:20
It is desirable that the ratio is 1: 800 or less.

In the vapor phase growth method, HCl is used for the purpose of suppressing the generation of nuclei on the insulating layer. The amount of HCl added to the source gas depends on the forming method, the type of source gas and the material of the insulating layer. Further, it is determined according to the desired conditions depending on the forming conditions, but is generally 1: 0.1 or more and 1:10.
It is preferably 0 or less, more preferably 1: 0.2 or more and 1:80 or less.

When the liquid phase growth method is used, Si is dissolved in a solvent such as Ga, In, Sb, Bi and Sn in an atmosphere of H ₂ or N ₂ to slowly cool the solvent or to make a temperature difference in the solvent. Epitaxial growth is performed by turning on. When Sn is used as the solvent, the obtained crystal is electrically neutral, and the conductivity type can be determined at a desired doping concentration by appropriately adding a desired impurity after or during the growth.

The temperature and pressure in the selective epitaxial growth method used in the present invention vary depending on the forming method, the type of the raw material gas used, the flow rate ratio of the raw material gas and H _2, and the like. Is, for example, approximately 600 ° C. or higher and 1250 in the ordinary LPCVD method.
℃ or less is suitable, more preferably 650 ℃ or more 12
It is desirable to control the temperature below 00 ° C. In the case of the liquid phase growth method, it depends on the kind of the solvent, but when Sn is used, it is 850
It is desirable that the temperature is controlled to be above 1050C and below 1050C. In a low temperature process such as plasma CVD, a temperature of 200 ° C or higher and 600 ° C or lower is suitable, and more preferably 200 ° C.
It is desirable that the temperature is controlled above 500 ° C.

Similarly, the pressure is about 10 ^-2 Torr.
〜760 Torr is suitable, more preferably 10 ^-1
A range of Torr to 760 Torr is desirable.

In the solar cell manufacturing method of the present invention, as the metal substrate material to which the epitaxial film is transferred, any metal that has good conductivity and forms a compound such as silicon and silicide is used. Mo, C
r and the like. Of course, any other material may be used as long as the metal having the above-mentioned properties is attached to the surface thereof, and thus an inexpensive substrate other than the metal can be used. The thickness of the silicide layer is not particularly limited, but is preferably 0.01 to 0.1 μm.

The depth of the junction formed in the method for producing a solar cell of the present invention depends on the amount of impurities introduced, but is preferably in the range of 0.05 to 3 μm, and preferably 0. It is desirable that the thickness is 1 to 1 μm.

[0047]

The present invention will be described in more detail below with reference to specific examples, but the present invention is not limited to these examples.

Example 1 As described above, an epitaxial silicon thin film solar cell was produced by the process shown in FIG. 1 in the same manner as in Experiments 1-5.

A 500 μm thick p-type (100) silicon wafer 101 (ρ = 0.01 Ω · cm) was anodized in an HF aqueous solution under the conditions shown in Table 3 to make the wafer 101 porous and to form a porous silicon layer 103. Formed (Fig. 1
(A)).

On the surface of the porous silicon layer 103, 4000 Å of SiO ₂ was deposited as an insulating layer by a normal atmospheric pressure CVD apparatus, and wet etching was performed to make a side of a = 120.
Patterning was performed into a square having a size of μm, and insulating layers 102 were provided in a lattice point shape at intervals of b = 600 μm (FIG. 1A).

[0051]

[Table 3]

Selective epitaxial growth was performed by the LPCVD apparatus under the formation conditions shown in Table 4 to form an epitaxial silicon layer 104 with a film thickness of about 50 μm (FIG. 1 (b)).

[0053]

[Table 4]

In the same manner as in Experiments 4 and 5, the wafer was immersed in an HF aqueous solution to remove the SiO ₂ insulating layer 102 through the voids,
Further, the porous layer 103 was selectively etched by immersing it in a mixed solution (10: 6: 50) of 49% hydrofluoric acid, 100% alcohol, and 30% hydrogen peroxide solution (FIG. 1).
(C)). The separated epitaxial layer 104 was placed on the Cr-deposited SUS substrate 101, and a silicide layer 107 was formed at the interface between the Cr surface and the epitaxial layer by the same annealing treatment as in Experiment 5 to fix the epitaxial layer 104 to the substrate ( FIG. 1D). Next, thermal diffusion of P is performed on the surface of the epitaxial layer 104 at a temperature of 900 ° C. using POCl 3 as a diffusion source to form the n ⁺ layer 108, and 0.5
A junction depth of about μm was obtained (FIG. 1 (e)). The formed dead layer on the surface of the n ⁺ layer 108 was wet-oxidized and then removed by etching to obtain a junction depth having an appropriate surface concentration of about 0.2 μm. In the wet oxidation step at this time, the surface of Cr exposed in the voids of the epitaxial layer is also oxidized and the insulating layer 109 is formed (FIG. 1F).

Finally, EB (Electron Bean)
m) ITO transparent conductive film (820Å) / collector electrode (Cr / Ag / Cr (200Å / 1 μm / 400) by vapor deposition
Å)) was formed on the n ⁺ layer ((h) in the figure).

The thin-film crystalline silicon solar cell thus obtained was measured for IV characteristics under AM1.5 (100 mW / cm ² ) light irradiation. As a result, an open circuit voltage of 0.58 V was obtained at a cell area of 6 cm ² . Short circuit photocurrent 32mA
/ Cm ² , the fill factor was 0.75, and the energy conversion efficiency was 13.9%. Thus, a thin film crystal solar cell exhibiting excellent characteristics could be manufactured by using the epitaxial layer separated (peeled) from the wafer.

Example 2 A p ⁺ n thin crystalline solar cell was prepared in the same manner as in Example 1. 500 μm thick n-type (100) silicon wafer 10
1 (ρ = 0.01 Ω · cm) was anodized in a HF aqueous solution under the conditions shown in Table 1 to form a porous silicon layer 103 on the wafer 101.

Si ₃ N ₄ was added to 300 by using LPCVD equipment.
0 Å deposited, RIE (Reactive Ion Et
ching) apparatus and a = 1 in the same manner as in Example 1.
The Si ₃ N ₄ layer 102 was patterned with 00 μm and b = 500 μm.

Selective epitaxial growth was performed by the LPCVD apparatus under the forming conditions shown in Table 4 to form an epitaxial layer 104 having a film thickness of about 50 μm.

The wafer was immersed in a hot phosphoric acid solution at 180 ° C. to remove Si ₃ N ₄ through the voids, and then a mixed solution of 49% hydrofluoric acid, 100% alcohol and 30% hydrogen peroxide solution (10: 6: 50). Then, the porous layer 103 was selectively etched.

The epitaxial layer 104 separated from the wafer is placed on a Mo substrate 101 having a thickness of 0.9 mm and the temperature is 550 ° C.
Then, the silicide layer 107 was formed by annealing. Then, BCl ₃ was thermally diffused on the surface of the epitaxial layer 104 at a temperature of 950 ° C. using BCl ₃ as a diffusion source to form the p ⁺ layer 108, and a junction depth of about 0.5 μm was obtained. P formed
The dead layer on the ⁺ layer surface was wet-oxidized and then removed by etching to obtain a junction depth with an appropriate surface concentration of about 0.2 μm. In the wet oxidation step at this time, the surface of Mo exposed in the voids of the epitaxial layer is also oxidized and insulated.

Finally, the ITO transparent conductive film (820Å) / collector electrode (Cr / Ag / Cr (200Å) was deposited by EB deposition.
/ 1 μm / 400 Å)) was formed on the p ⁺ layer.

The thin film crystalline silicon solar cell thus obtained was measured for IV characteristics under irradiation with AM1.5 (100 mW / cm ² ) light, and an open circuit voltage of 0.57 V was obtained at a cell area of 6 cm ² . Short circuit photocurrent 31.5
It became mA / cm ² and a fill factor of 0.77, and an energy conversion efficiency of 13.8% was obtained.

Example 3 A p ⁺ μc-Si / crystalline silicon hetero solar cell was prepared. 6 (a) to 6 (g) show the process of the produced hetero solar cell. A porous silicon layer 603 having a thickness of 1 μm was formed on a wafer 601 by the same process as in Examples 1 and 2, and a SiO ₂ film was deposited on the porous silicon layer 603, and a = 120 μm, b =
The insulating layer 602 was formed by patterning with a thickness of 600 μm. Selective epitaxial growth was performed by the LPCVD method under the conditions shown in Table 4 to stack the epitaxial layer 104.

The wafer is dipped in an HF aqueous solution and passed through the voids for S
After removing iO ₂ , a mixed solution of 49% hydrofluoric acid, 100% alcohol, and 30% hydrogen peroxide solution (10: 6: 5)
0) and the porous layer 603 was selectively etched.

The separated epitaxial layer 604 is placed on the Cr-deposited SUS substrate 606, and the silicide layer 6 is formed on the interface between the Cr surface and the epitaxial layer by annealing.
07 was formed to fix the epitaxial layer 604 to the substrate 606. Further, the surface of Cr exposed in the voids of the epitaxial layer was oxidized by annealing in an O ₂ atmosphere for oxidation. S formed on the surface of the epitaxial layer
After removing the SiO ₂ by etching, the epitaxial layer 6
The p-type μc-Si layer 609 was deposited on the sample No. 04 by 200 Å by a normal plasma CVD apparatus under the conditions shown in Table 5. At this time, the dark conductivity of the μc-Si film is -10 ¹ S · c.
It was m ^-1 .

[0067]

[Table 5]

After forming the hetero-type pn junction in this way, about 85% of ITO is formed thereon as a transparent conductive film 610.
0 Å Electron beam evaporation and collecting electrode (Cr / Ag /
Cr (200Å / 1 μm / 400Å) 611 was formed.

The thus obtained p ⁺ μc-Si /
When the IV characteristics of the crystalline silicon hetero solar cell were measured under AM1.5 light irradiation (cell area 6c
m ² ), open-circuit voltage 0.60 V, short-circuit photocurrent 32 mA / c
m ² , the fill factor was 0.73, and a high conversion efficiency of 14% was obtained. By using the heterojunction in this way, a higher open circuit voltage can be obtained.

Example 4 An n ⁺ p type polycrystalline solar cell as shown in FIG. 1 was produced by the liquid phase epitaxy method. In the same manner as in Example 1, a 500 μm thick p-type (100) silicon wafer (ρ = 0.01 Ω · c)
m) 101 was anodized in an HF aqueous solution under the conditions shown in Table 3 to form a porous silicon layer 103 on the wafer 101. The surface of this porous silicon is thermally oxidized to form SiO ₂
Is formed in a thickness of 3000 Å, and wet etching is performed to form a square with a side of a = 120 μm, and b = 6.
The insulating layer 102 was provided in a lattice point shape at intervals of 00 μm.

[0071]

[Table 6]

Selective epitaxial growth was performed under the conditions shown in Table 6 by the liquid phase epitaxy method to form the epitaxial layer 104 to about 4 times.
It was grown to 5 μm. At this time, Sn was used as a solvent, and Si was previously dissolved in Sn to saturate before growth, and then slow cooling was started. When a certain degree of supersaturation was reached, the surface of the porous layer of the wafer was Sn solution. It was soaked in and grown for a predetermined time. Since Sn has poor wettability with respect to SiO ₂ , Si does not precipitate on SiO ₂ and extremely high selective growth property is maintained.

The wafer is dipped in an HF aqueous solution and passed through the voids for S
After removing iO ₂ , a mixed solution of 49% hydrofluoric acid, 100% alcohol, and 30% hydrogen peroxide solution (10: 6: 5)
0) and the porous layer 103 was selectively etched. The separated epitaxial layer 104 is placed on the Cr-deposited SUS substrate 101 and annealed to form the silicide layer 10 at the interface between the Cr surface and the epitaxial layer.
7 was formed to fix the epitaxial layer to the substrate. Next, POCl ₃ is used as a diffusion source on the surface of the epitaxial layer.
Thermal diffusion of P was performed at a temperature of 00 ° C. to form the n ⁺ layer 108, and a junction depth of about 0.5 μm was obtained. N ⁺ formed
The dead layer on the layer surface was wet-oxidized and then removed by etching to obtain a junction depth having an appropriate surface concentration of about 0.2 μm. In the wet oxidation step at this time, the surface of Cr exposed in the voids of the epitaxial layer is also oxidized and insulated.

Finally, EB (Electron Bean)
m) ITO transparent conductive film (820Å) 110 /
Current collecting electrode (Cr / Ag / Cr (200Å / 1μm / 40
0Å)) 111 was formed on the n ⁺ layer 108.

The thin film crystalline silicon solar cell thus obtained was measured for IV characteristics under AM1.5 (100 mW / cm ² ) light irradiation, and an open circuit voltage of 0.58 V was obtained at a cell area of 4 cm ² . Short circuit photocurrent 31mA
/ Cm ² , the fill factor was 0.75, and the energy conversion efficiency was 13.5%.

According to the present invention, a good-quality epitaxial silicon layer grown on porous silicon formed on a wafer can be transferred onto a non-single-crystal substrate, whereby a solar cell of higher quality and lower cost than ever before can be obtained. Can be manufactured.

[0077]

As described above, according to the present invention, it is possible to form a crystalline thin film solar cell having excellent characteristics on a non-single crystalline substrate such as a metal substrate. This allows
It is possible to provide a mass-produced, inexpensive, high-quality thin solar cell to the market.

[Brief description of drawings]

FIG. 1 is a schematic diagram for explaining a manufacturing process of a solar cell of the present invention.

FIG. 2 is a schematic diagram for explaining a selective epitaxial growth method.

FIG. 3 is a schematic diagram illustrating how a thin layer of epitaxial silicon is separated from a wafer by the method of the present invention.

FIG. 4 is a schematic diagram illustrating how a thin layer of epitaxial silicon is separated from a wafer by the method of the present invention.

FIG. 5 is a graph showing the time dependence of the thickness of porous silicon and single crystal silicon etched by a selective etching solution.

FIG. 6 shows p ⁺ μc-Si / produced by the method of the present invention.
It is a schematic diagram for demonstrating the manufacturing process of a crystalline silicon hetero solar cell.

[Explanation of symbols]

101, 202, 301, 601 Si wafer 106, 606 Substrate 102, 302, 602 Insulating layer 103, 303, 603 Porous silicon layer 104, 203, 304, 604 Epitaxial silicon layer 108 p ⁺ layer (n ⁺ layer) 609 p ⁺ μc-Si layer 110,610 Transparent conductive layer 111,611 Current collecting electrode 105,305,605 Void 107,607 Metal 109,608 Oxide layer 201 Non-nucleation surface

Claims (8)

[Claims] 1. A method of manufacturing a solar cell using an epitaxial film grown on a silicon wafer, comprising: i) forming a porous layer on one surface of the wafer by anodization; and ii) the porous layer. Forming an insulating layer on the substrate and patterning the substrate to leave only a part of the insulating layer, and iii) growing a silicon layer on the substrate other than the insulating layer by a selective epitaxial growth method. Iv) forming a semiconductor junction on the surface of the silicon layer, and v) etching the insulating layer and the porous layer through voids formed on the insulating layer to form a substrate on the silicon layer. A method of manufacturing a solar cell, comprising a step of further separating. 2. The method for manufacturing a solar cell according to claim 1, wherein the semiconductor junction is formed by introducing impurities. 3. The method for manufacturing a solar cell according to claim 1, wherein the impurity introduction is performed by using ion implantation or thermal diffusion. 4. The method for manufacturing a solar cell according to claim 1, wherein the impurity introduction is performed at the same time during the growth of the silicon layer. 5. A step of forming a porous layer by anodization on one surface of a silicon wafer, and ii) forming an insulating layer on the porous layer and patterning so that only a part of the insulating layer is left. And iii) growing a silicon layer on a porous layer other than the insulating layer of the substrate by a selective epitaxial growth method, and iv) forming a semiconductor junction on the surface of the silicon layer. , V) A solar cell obtained through a step of removing the insulating layer and the porous layer by etching through a void formed on the insulating layer to separate the silicon layer from the substrate. 6. The solar cell according to claim 5, wherein the semiconductor junction is formed by introducing impurities. 7. The solar cell according to claim 5, wherein the impurity introduction is performed by using ion implantation or thermal diffusion. 8. The solar cell according to claim 5, wherein the impurity introduction is performed simultaneously during the growth of the silicon layer.