JPH05224629A - Driving circuit for active matrix display device - Google Patents

Abstract

PURPOSE:To make a driving circuit work highly fast and output a high-output by previously setting the power source voltage of a TFT(thin film transistor) constituting a logical and driving circuit higher in a prestage TFT than in a poststage circuit. CONSTITUTION:The logical and driving circuit includes an inverter circuit and a buffer circuit where two TFTs are connected by two stages, and 1st power source VDD1 and 2nd power source VDD2 are impressed there as the power source voltage. As for relation between the 1st power source VDD1 and the 2nd power source VDD2, the 1st power source VDD1 is set higher than the 2nd power source VDD2 by voltage obtained by compensating at least the voltage drop of the TFT 12. The 1st power source voltage and the 2nd power source voltage are generated by forming the power source voltage VDD through a booster circuit or a fluctuation circuit. Therefore, an output signal having the specified level is obtained with almost no delay from an input signal as the output signal of the logical and driving circuit, and the rise characteristic or the fall characteristic of the inverter circuit and the buffer circuit are improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit for actively driving a display medium such as liquid crystal.

[0002]

2. Description of the Related Art An active element for arranging picture element electrodes on an insulating substrate in a matrix, connecting a switching element to each picture element electrode, and controlling each switching element to independently drive each picture element. A matrix type display device is adopted as a display device using liquid crystal or the like.

A TFT (thin film transistor) element, MIM is used as a switching element for selectively driving the pixel electrodes.
(Metal-insulating layer-metal) element, MOS transistor element, diode, varistor and the like are generally known. In addition, a display device adopting such an active matrix drive system is used in a liquid crystal television, a word processor,
It has been put to practical use as a terminal display device of a computer.

FIG. 4 shows a schematic circuit diagram of an active matrix display device using a TFT as a switching element. This type of driving circuit includes a large number of parallel gate bus lines 1 which function as scanning lines, and the gate bus lines 1
A source bus line 2 which is orthogonal to and functions as a signal line;
The TFT 3 is arranged near the intersection of both bus lines. A pixel electrode 4 made of a transparent electrode formed to cover one pixel region is connected to the TFT 3, and a pixel is formed between the pixel electrode 4 and the counter electrode 5. A liquid crystal layer is interposed between the counter electrode 5 and the pixel electrode 4, and the counter electrode 5 is commonly formed so as to cover a plurality of pixel regions.

A drive waveform forming (shift register) logic / drive circuit 6 using TFTs for driving each gate bus line 1 is connected to each gate bus line 1. Each logic / driving circuit 6 has two-phase clock signals 7, 8 (φ, −φ) and a start pulse signal 9 (S
TP) lines are commonly connected, and a voltage for turning on the TFT 3 is applied (15 to 100 μsec) to the corresponding gate bus line 1 at the corresponding timing set in the logic / drive circuit 6 by these signals, and the source bus is applied. Line 2
The above image signal is written in the picture element on each gate bus line.

Logic for performing the above-mentioned image signal writing operation
Details of the drive circuit 6 are shown in FIG. An inverter circuit 10 formed of four TFTs as a unit is connected to each logic / drive circuit 6 in the number of stages corresponding to the address of the gate bus line, and a buffer circuit 11 is provided between the inverter circuit 10 and the gate bus line. Are connected. The above logic
The characteristics of the drive circuit 6 are determined by the quality of the rising characteristics and the falling characteristics of the inverter circuit 10 and the buffer circuit 11.

FIGS. 6A, 6B, and 6C show detailed circuit diagrams of the inverter circuit 10 and the buffer circuit 11 composed of four TFTs, and input / output waveforms. Inverter circuit 1
0 and the buffer circuit 11 have the same circuit configuration, the input signal IN is input to the gates of the TFT 13 and the TFT 15, V _DD is connected to the gate of the TFT 12, and the output of the TFT 13 is connected to the gate of the TFT 14. The inverter circuit 10 is a drive waveform forming (shift register) logic circuit, and the buffer circuit 11 functions as a bus line driving circuit.

[0008]

The four TFTs constituting the inverter circuit 10 are the input signals I of the inverter circuit.
When N is at the Low level, the TFT 13 is turned off, so that V _DD is applied to the gate of the TFT 14 through the TFT 12, and therefore the TFT 14 is turned on, while the TFT 15 is turned off, so that the output becomes the High level. However, at this time, the gate of the TFT 14 has at least the TFT from V _DD.
A voltage lower by 12 drops is applied. Ie V _DD
Since a voltage higher than that of the TFT1 is not applied, the TFT1
The on-resistance of No. 4 is not sufficiently low, and when the output of the inverter circuit rises from the Low level to the High level, the occurrence of delay cannot be avoided and stable operation of the logic circuit cannot be expected. In particular, in a buffer circuit that drives a bus line, since the output load connected first is large because it is a display medium such as a liquid crystal, the influence is extremely large and the display quality is significantly impaired.

With the recent increase in the size of the TFT liquid crystal panel, the number of gate bus lines is increased and the load is increased, so that it is required to increase the speed and output of the logic / driving circuit 6.
At that time, the characteristics on the drive circuit become a serious problem.

The present invention solves such a problem, and an object of the present invention is to provide a drive circuit for an active matrix display device having a high speed / high output bus line drive circuit. ..

[0011]

According to the present invention, a plurality of picture elements and thin film transistors for driving the picture elements are arranged in a matrix on an insulating substrate, and a plurality of scanning lines connected to the thin film transistors and In a display device having a signal line and a logic / driving circuit for driving the scanning line or the signal line, which includes a thin film transistor manufactured by the same process as the pixel driving thin film transistor, the logic / driving circuit is An inverter circuit in which two thin film transistors are connected in two stages and a buffer circuit are included, and the power supply voltage supplied to the front stage thin film transistor is higher than that of the rear stage thin film transistor.

[0012]

By setting the power supply voltage of the front stage TFT from the power supply voltage of the rear stage TFT, an output signal having a predetermined level can be obtained as an output of the logic / drive circuit from the input signal with almost no delay. By improving the rising characteristics and the falling characteristics of the buffer circuit, it is possible to increase the speed and output of the bus line driving circuit and improve the image quality of the display device.

[0013]

EXAMPLE An example of the present invention will be described below.
FIG. 1 shows a schematic circuit diagram of the active matrix display device, FIG. 2 shows a detailed circuit diagram of the logic / drive circuit 16 of the embodiment, and FIG. An example of an inverter circuit 17 and a buffer circuit 18 and input / output waveforms are shown.

In this embodiment, liquid crystal is used as a display medium, and one electrode substrate side is provided with a TFT switching element 3 and a picture element electrode 4 controlled by the TFT 3 for each picture element. The other common electrode 5 faces the substrate via the liquid crystal layer. A logic / driving circuit 16 for controlling the driving of the TFT switching elements 3 is connected to each of the gate bus lines 1 of the matrix picture elements on the picture element electrode substrate side. This logic / drive circuit has two TFTs connected in series in the front stage (12, 1) as in the above-mentioned conventional circuit.
3), the latter stage (14, 15) is composed of the inverter circuit 17 connected in two stages and the buffer circuit 18 connected to the output part of the inverter circuit 17, but the power supply voltage when operating is different from the conventional circuit. ..

That is, each logic / drive circuit 16 of this embodiment is
In addition to the two-phase clock signals 7 and 8 (φ, −φ) and the start pulse signal 9, the first power source V _DD 1 and the second power source are used as power source voltages.
The power supply V _DD 2 is applied. The relationship between the first power supply V _DD 1 and the second power supply V _DD 2 is that the first power supply V _DD 1 is the second power supply V _DD.
It is set to a voltage higher than 2 (V _DD 1> V _DD 2) which compensates at least the voltage drop of the TFT 12. First above
The second power supply voltage can be generated by forming the power supply voltage V _DD via a step-up or step-down circuit.

The TFT 12 which constitutes the logic / driving circuit 16 and the TFT switching element 3 provided for each picture element
Numerals 15 to 15 have the same thin film transistor structure using a semiconductor layer made of polysilicon, amorphous silicon or the like, and are manufactured in the same step on a common insulating substrate on which a display matrix is formed.

In the display device including the logic / drive circuit 16, when the Low level shown in FIG. 3B is input as the input signal IN of the inverter circuit 17, the TFT 1
3 is turned off, and the power supply voltage V _DD 1 is applied to the gate of the TFT 14 through the TFT 12. At this time, the TFT 12
Since a high first power supply voltage V _DD 1 for compensating for the drop is previously supplied to the TFT 1, the TFT 1 in the ON state is
Even if the power supply voltage drops by passing 2,
A sufficient driving voltage higher than the second power supply voltage V _DD 2 can be applied to the gate of T14. As a result, TFT1
4 is kept low, and the output of the inverter circuit 17 changes from the low level to the high level as shown by the solid line in FIG.
It is possible to minimize the delay when rising to the gh level and stabilize the logic circuit. The broken line in FIG. 3C shows the output of the conventional circuit for comparison.

On the other hand, in the buffer circuit 18 which receives the output of the inverter circuit 17 and drives the bus line,
Exactly the same, it is constituted by connecting two TFTs connected in series in two stages, and these are connected to the first power supply voltage V _DD 1
Also, since the driving is performed by applying the second power supply voltage V _DD2 , the rising delay can be suppressed as described above, and even when an extremely large load such as a liquid crystal is connected to the output section as in the present embodiment. The operation of the logic circuit can be executed without any trouble.

[0019]

As in the present invention, in a drive circuit of a display device configured by using two stages of TFT transistors, the power supply voltage of the TFT transistor constituting the logic / drive circuit is the power supply voltage of the front stage transistor and the power supply voltage of the front stage transistor is the rear stage transistor. By setting it higher than the power supply voltage in advance, the rising characteristics of the inverter circuit and the buffer circuit for the logic / drive circuit can be improved even when the number of gate bus lines increases and the load capacity increases as the display device increases in size. The fall characteristic is remarkably improved, the driving circuit can be speeded up and the output can be increased, which can contribute to the quality improvement of the display device.

[Brief description of drawings]

FIG. 1 is a plan view showing an embodiment of an active matrix substrate of the present invention.

FIG. 2 is a circuit diagram showing a logic circuit / driving circuit of the present invention.

FIG. 3 shows an inverter circuit / buffer circuit and an input / output waveform in a logic circuit / driving circuit showing an embodiment of the present invention.

FIG. 4 is a plan view showing a conventional active matrix substrate.

FIG. 5 is a circuit diagram showing a conventional logic circuit / driving circuit.

FIG. 6 shows an inverter circuit / buffer circuit and input / output waveforms in a conventional logic circuit / driving circuit.

[Explanation of Codes] 1 gate bus line 2 source bus line 3 TFT switching element 4 picture element electrode 5 counter electrode 7 clock signal line (φ) 8 clock signal line (−φ) 9 start pulse signal line 12 to 15 TFT 16 logic Drive circuit 17 Inverter circuit 18 Gate bus line driving buffer circuit 19 First power supply voltage V _DD 1 20 Second power supply voltage V _DD 2 21 Ground line

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Ken Kanamori 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Within Sharp Co., Ltd. (72) Yoshiharu Kataoka 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Within Sharp Corporation

Claims (1)

[Claims] 1. A plurality of picture elements and thin film transistors for driving each picture element are arranged in a matrix, and a plurality of scanning lines and signal lines connected to the thin film transistors are provided.
In a display device having a logic / drive circuit for driving the scanning line or the signal line, which includes a thin film transistor manufactured in the same process as the pixel driving thin film transistor, the logic / drive circuit includes two thin film transistors. A drive circuit for an active matrix display device, comprising an inverter circuit and a buffer circuit connected in stages, wherein a power supply voltage supplied to a front stage thin film transistor is higher than that of a rear stage thin film transistor.