JPH05218496A - Semiconductor light emitting element - Google Patents

Abstract

PURPOSE:To enhance a semiconductor light emitting element in element characteristics by a method wherein a buffer layer and a light emitting layer are formed at a comparatively low temperature so as to prevent cracks caused by a thermal expansion coefficient difference with a silicon substrate from occurring in the buffer layer and the light emitting layer, and the buffer layer is prevented from being automatically doped with silicon diffused from the substrate to enhance the semiconductor light emitting element in valence electron control. CONSTITUTION:A buffer layer 2 is formed of InxGa1-xAs, and light emitting layers 3 and 4 are formed of InxAlyGa(1-x-y)As.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device,
In particular, it relates to a semiconductor light emitting element used as a light source of a photosensitive drum for a page printer or a light emitting element of an optical communication device.

[0002]

2. Description of the Related Art In recent years, semiconductor light emitting devices have been actively studied with the progress of compound semiconductor crystal growth techniques such as MOCVD (metal organic chemical vapor deposition) and MBE (molecular beam epitaxial). ..

A conventional semiconductor light emitting device will be described with reference to FIG. FIG. 3 is a cross-sectional view of a conventional semiconductor light emitting device, 21 is a single crystal substrate made of, for example, silicon (Si) containing one conductivity type impurity, 22 is a buffer layer made of gallium arsenide (GaAs), and the like. Reference numeral 23 denotes a first semiconductor layer made of aluminum gallium arsenide (AlGaAs) or the like having the same conductivity type as that of the silicon substrate 21, and 24 denotes aluminum containing an impurity for a conductivity type semiconductor opposite to the first semiconductor layer 23. A second semiconductor layer made of gallium arsenide or the like, 25 is an ohmic contact layer made of gallium arsenide or the like containing a large amount of impurities of the opposite conductivity type so as to make ohmic contact with the upper electrode 27, 2
Reference numeral 6 is a protective layer made of, for example, silicon nitride (SiN _x ). A contact hole 26a is formed in the protective layer 26 on the ohmic contact layer 25,
The upper electrode 27 is connected to the ohmic contact layer 25 via the contact hole 26a. Further, a lower electrode 28 for making ohmic contact with the silicon substrate 21 is provided on the back surface side of the silicon substrate 21. In this semiconductor light emitting device, the first semiconductor layer 23
And the second semiconductor 24 form a semiconductor junction to form a light emitting layer.

In the semiconductor light emitting device having such a structure, when the first semiconductor layer 23 is, for example, n-type and the second semiconductor layer 24 is, for example, p-type, the upper electrode 26 is positive and the lower electrode 27 is When a voltage is applied in the forward bias direction as negative, minority carriers are injected from the n-type first semiconductor layer 23 into the p-type second semiconductor layer 24, and the second semiconductor layer 24
At the interface between the semiconductor junction and the second semiconductor layer 24, which is the interface between the first semiconductor layer 23 and the first semiconductor layer 23, carriers recombine and emit light. The emitted light is used as the second semiconductor layer 24 and the protective layer 26.
It is taken out to the outside through.

[0005]

However, in the above-described conventional semiconductor light emitting device, the buffer layer 22 is made of gallium.
Since the first semiconductor layer 23 and the second semiconductor layer 24, which are made of arsenic (GaAs) and serve as the light emitting layer, are made of aluminum gallium arsenide (Al _z Ga _{1 -z} As), To grow the layer epitaxially, 6
A growth temperature of 00 to 800 ° C. is required, and due to the difference in coefficient of thermal expansion from the silicon substrate 21, when these semiconductor layers 22 to 2 are epitaxially grown and cooled to room temperature.
A large number of cracks were generated in No. 4, which was a great obstacle to the production yield of the light emitting device.

The epitaxial growth temperature is 600
Since the temperature is as high as ˜800 ° C., silicon element is incorporated into the buffer layer 22 made of gallium / arsenic and the light emitting layers 22 and 23 made of aluminum / gallium / arsenide by autodoping from the silicon substrate 21 during the epitaxial growth. It became difficult to control valence electrons in the p-type semiconductor layer doped with the acceptor, and the device characteristics were remarkably deteriorated.

[0007]

The present invention has been made in view of the problems of the prior art as described above, and is characterized in that it is provided on a silicon substrate having a lower electrode on the back surface side. In a semiconductor light emitting device in which a buffer layer and a light emitting layer are provided and an upper electrode is provided on the light emitting layer, the buffer layer is formed of indium gallium arsenide (In _x Ga _1-x
As) and the light emitting layer is formed of indium, aluminum, gallium, and arsenic (In _x Al _y Ga).
_(1-xy) As).

[0008]

As described above, the buffer layer is formed of indium gallium arsenide (In _x Ga _1-x As) and the light emitting layer is formed of indium aluminum gallium arsenide (I
When n _x Al _y formed by _{Ga (1-xy) As)} , since it can be formed in a relatively low temperature buffer layer and the light emitting layer, it is possible to reduce the occurrence of cracks due to the difference in thermal expansion coefficient between the silicon substrate, It is possible to suppress the auto-doping of the silicon element from the silicon substrate, improve the valence control of the p-type semiconductor layer, and improve the device characteristics.

[0009]

The present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an embodiment of a semiconductor light emitting device according to the present invention. 1 is a silicon substrate, 2 is a buffer layer, and 3 is a first semiconductor having the same conductivity type as the silicon substrate 1. Layers 4 are second semiconductor layers containing impurities of opposite conductivity type that form a semiconductor junction with the first semiconductor layer 3,
Reference numeral 5 is an ohmic contact layer containing a large amount of impurities of opposite conductivity type for making ohmic contact with the upper electrode 7, and 6 is a protective film made of, for example, silicon nitride (SiN _x ). A semiconductor junction is formed by the first semiconductor layer 3 and the second semiconductor layer 4 to form a light emitting layer.

The silicon substrate 1 is, for example, (100)
It is composed of a single crystal silicon substrate cut off by 2 ° from the plane to the (111) plane, and contains about 10 ¹⁹ donors / cm ^{3 of} donors such as antimony (Sb) or acceptors such as boron (B). There is.

A buffer layer 2 containing an impurity of one conductivity type is formed on the silicon substrate 1. This buffer layer 2
Is indium gallium arsenide (In _x Ga _1-x A
s). This buffer layer 2 is made of silicon (Si)
A MOCVD method that appropriately contains a donor or a acceptor such as zinc (Zn) of about 10 ¹⁷ atoms / cm ³ and adopts a two-step growth method or a thermal cycle method to a thickness of 1-1.
The thickness is about 5 μm. That is, after temporarily heating the inside of the MOCVD apparatus at 900 to 1000 ° C., 400 to 4
TMI gas or TEI gas, TMGa at 50 ℃
Gas, AsH ₃ gas, and MO using SiH ₄ gas or DMZn gas as a source of impurity elements for semiconductors
While growing an indium gallium arsenide film by the CVD method, the temperature is raised to 420 to 550 ° C.
Growth of gallium arsenide film (two-step growth method), then 3
The temperature is raised and lowered at 00 to 800 ° C. (thermal cycle method) to reduce the misfit transition due to the difference in lattice constant between the silicon substrate 1 and the buffer layer 2.

The range of the indium composition ratio x is 0.
05 ≦ x <1.0 That is, as shown in the vapor pressure coincidence temperature table shown in FIG. 3, the mixed crystal ratio of gallium and arsenic is gradually decreased to gradually change the mixed crystal ratio of indium. As the temperature increases, the vapor pressure coincidence temperature gradually decreases. It should be noted that the vapor pressure coincidence temperature means that a group III element such as indium (In), aluminum (Al), and gallium (Ga) has a vapor pressure different from that of a group V element such as arsenic. The vapor pressures match at this temperature, and the temperature at which the vapor pressures match is the vapor pressure matching temperature (Congruent Sublimatio
n Temperature). In order to form a good crystal, it is desirable to match the vapor pressures and make epitaxial growth. For example, the vapor pressure coincidence temperature of gallium / arsenic is about 600 ° C., but when substituting gallium and adding 5% of indium, the vapor pressure coincidence temperature is 500 at a stretch.
It goes down to ℃. That is, the mixed crystal ratio x of indium is 0.
Indium, gallium, and arsenic of No. 05 can be epitaxially grown at a temperature of 500 ° C. When the mixed crystal ratio of indium is further increased, the temperature finally drops to 420 ° C. almost in proportion. Therefore, when epitaxial growth is performed so that the mixed crystal ratio x of indium is in the range of 0.05 ≦ x <1.0, the temperature is lowered by 100 to 180 ° C. as compared with the case where gallium / arsenic containing no indium is epitaxially grown. You can grow it.

When the indium-gallium-arsenic mixed crystal ratio of indium is increased, the difference in lattice constant with silicon is rather increased, but when the mixed crystal ratio of indium is increased, the vapor pressure matching temperature is lowered. , And indium elements are added because indium has a large moving distance on the surface of the substrate during deposition and a good crystal can be easily obtained. Further, when the mixed crystal ratio of indium is changed, the energy band gap is changed and the wavelength of emitted light is different, and the mixed crystal ratio x of indium is selected according to the application of the light emitting element.

A first semiconductor layer 3 containing an impurity of one conductivity type is formed on the buffer layer 2. The first semiconductor layer 3 is formed of indium-aluminum-gallium arsenide _{(In x Al y Ga (1} -xy) As). The first semiconductor layer 3 is provided with 10 ¹⁷ donors / cm ^{3 of} donors made of silicon or zinc or Zn (Zn).
Contains about a degree. The first semiconductor layer 3 includes TMI gas, TEI gas, TMAl gas, TMGa gas,
AsH ₃ gas and SiH as an impurity element for semiconductors
It is formed by the MOCVD method using ₄ gas or DMZn gas. Thus, the buffer layer 2 made of indium gallium arsenide (In _x Ga _1-x As) is added to the indium aluminum gallium arsenide (In _x Al _y
When the first semiconductor layer 3 made of Ga _{(1-x -y)} As) is formed, the lattice mismatch between the buffer layer 2 and the first semiconductor layer 3 can be kept within 0.13%. .. It is desirable that the mixed crystal ratio x of indium in the first semiconductor layer 3 is also matched with the mixed crystal ratio x of indium in the buffer layer 2. That is, indium greatly affects the lattice constant. Therefore, the mixed crystal ratio x of indium in the first semiconductor layer 3 is also set in the range of 0.05 ≦ x <1.0 in accordance with the mixed crystal ratio x of indium in the buffer layer 2. Therefore, the mixed crystal ratio y of aluminum (Al) in the first semiconductor layer 3 is in the range of 0 <y ≦ 0.95.

A second semiconductor layer 4 is formed on the first semiconductor layer 3.
To form. The second semiconductor layer 4 is also made of indium aluminum gallium arsenide (In _x Al _y Ga).
_(1-xy) As). In the second semiconductor layer 4, an acceptor such as zinc (Zn) or a donor such as silicon (Si), which is an impurity for the opposite conductivity type semiconductor, is formed.
About 0 ¹⁷ pieces / cm ³ are contained. This second semiconductor layer 4
Is TMIn gas, TMAl gas, TMGa gas, As
H ₃ gas, and a semiconductor impurity element source DMZn
It is formed by the MOCVD method using a gas or SiH ₄ gas. The first semiconductor layer 3 and the second semiconductor layer 4 described above form a semiconductor junction.

An ohmic contact layer 5 containing a large amount of impurities of opposite conductivity type is formed on the second semiconductor layer 4.
The ohmic contact layer 5 is made of, for example, indium
It is composed of gallium arsenide (In _x Ga _1-x As).
Such a clad layer is also made of indium-aluminum-gallium-arsenic (In
_x Al _z Ga _(1-xz) As) or the like.

A translucent protective film 6 is formed on the semiconductor layers 2 to 5. The protective film 6 is formed of, for example, a silicon nitride film (SiN _x ) or a silicon oxide film (SiO ₂ ). The protective film 6 is formed by, for example, a plasma CVD method using silane gas and ammonia gas (NH ₃ ) or laughing gas. Further, the contact hole 6 is formed in the ohmic contact layer 5 portion of the protective film 6.
a is formed.

An upper electrode 7 is formed in the contact hole 6a. A lower electrode 8 is formed on the back surface side of the semiconductor substrate 1. The upper electrode 7 and the lower electrode 8 are made of silver (Ag) or silver / zinc (Ag / Z).
n) or chrome / gold (Cr / Au) etc.,
It is formed to a thickness of about 5000Å by vapor deposition or the like.

[0020]

As described above, according to the semiconductor light emitting device of the present invention, the buffer layer is made of indium gallium arsenide (In _x Ga _1-x As) and the light emitting layer is made of indium aluminum. Gallium arsenide (In _x A
From what has been formed by _{l y Ga (1-xy)} As), since it can be formed in a relatively low temperature buffer layer and the light emitting layer, it is possible to reduce the occurrence of cracks due to the difference in thermal expansion coefficient between the silicon substrate, It is possible to suppress autodoping of the silicon element from the silicon substrate, improve valence electron control, and improve device characteristics.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of a semiconductor light emitting device according to the present invention.

FIG. 2 is a diagram showing vapor pressure matching temperatures of indium gallium arsenide.

FIG. 3 is a cross-sectional view showing a conventional semiconductor light emitting device.

[Explanation of symbols]

1 ... Silicon substrate, 2 ... Buffer layer, 3 ...
1st semiconductor layer, 4 ... 2nd semiconductor layer, 5 ... Ohmic contact layer, 7 ... upper electrode, 8 ... lower electrode.

Claims (3)

[Claims] 1. A semiconductor light-emitting device having a buffer layer and a light-emitting layer provided on a silicon substrate having a lower electrode provided on the back surface side, and an upper electrode provided on the light-emitting layer. Arsenic (In _x Ga _1-x A
s), and the light emitting layer is made of indium aluminum gallium arsenide (In _x Al _y Ga _(1-xy)).
A semiconductor light-emitting device characterized by being formed of As). 2. The indium (In) mixed crystal ratio x is 0.05 ≦ x <1.0.
The semiconductor light-emitting device according to. 3. The semiconductor light emitting device according to claim 1, wherein the mixed crystal ratio y of the aluminum (Al) is 0 <y ≦ 0.95.