JPH05216442A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To solve a problem such as flicker and irregularity in brightness by providing an auxiliary voltage generating means for impressing the auxiliary voltage having the same polarity as that of a counter electrode voltage on an auxiliary capacitance line. CONSTITUTION:The main parts are constituted of a liquid crystal display element, a scanning line-driving circuit, a signal line-driving circuit, a counter electrode-driving circuit 107 and an auxiliary voltage generating circuit 109. Further, the auxiliary capacitance line 143 made of Mo-Ta alloy which is formed by the same process as that for a scanning line 125 and whose i planar arrangement is almost in parallel therewith and which is so formed as to face a pixel electrode 137 via an insulating film in layer construction, is arranged on a transparent insulating substrate. By using the insulating film as its dielectric between the auxiliary capacitance line 143 and the pixel electrode 137, an auxiliary capacitance (Cs) 145 is formed. Then, an auxiliary voltage (VH) synchronizing with a video signal voltage (VX), inverting the polarity around a third reference electric potential as the center and having the same polarity as that of the counter electrode voltage (Vc) is impressed to the auxiliary capacitance line 143.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device,
In particular, it relates to an active matrix type liquid crystal display device using a thin film transistor (TFT) as a switching element.

[0002]

2. Description of the Related Art In recent years, liquid crystal display devices have been widely used as display elements for televisions, graphic displays, etc., by taking advantage of their features such as thinness and low power consumption.

Among them, a thin film transistor (Thin Film Tr
An active matrix type liquid crystal display device using ansistor (hereinafter abbreviated as TFT) as a switching element is
Excellent in high-speed responsiveness, suitable for high pixel count, expected to realize high image quality, large size, and color image of display screen, researched and developed, and already put into practical use There is also.

The display element portion of this active matrix type liquid crystal display device is generally an active element array substrate provided with a switching active element such as a TFT and a pixel electrode connected thereto, and an active element array substrate opposed thereto. A main part is composed of a counter substrate having counter electrodes formed thereon, a liquid crystal composition sandwiched between these substrates, and a polarizing plate attached to the outer surface side of each substrate. .

FIG. 6 is a diagram showing an example of one pixel portion of a conventional active matrix type liquid crystal display device by an equivalent circuit.

An n-type TFT switching element 605 is provided at each intersection of the signal line 601 and the scanning line 603, and its drain electrode (D) 607 has a signal line 601.
Further, the gate electrode (G) 609 is connected to the scanning line 603, and the source electrode (S) 611 is connected to the pixel electrode 613.

The liquid crystal composition 619 is sandwiched between the pixel electrode 613 and the counter electrode 617 connected to the counter electrode voltage generating circuit 615. In addition, the counter electrode 61
Similar to 7, the auxiliary capacitance (Cs) 623 is formed by interposing an insulating film or the like between the auxiliary capacitance line 621 connected to the counter electrode voltage generation circuit 615 and the pixel electrode 613. FIG. 7 is a diagram showing each drive waveform of one pixel of the conventional active matrix type liquid crystal display device having the configuration shown in FIG. 6, and the operation of the conventional active matrix type liquid crystal display device will be described based on FIG. explain.

As shown in FIG. 7A, the scan pulse (V
Y) is the TFT switching element 6 via the scanning line 603.
No. 05 gate electrode (G) 609, and the liquid crystal composition 61
In order to avoid the deterioration of signal No. 9, a video signal voltage (VX) whose polarity is inverted around the reference potential (VT1) is applied to the signal line 601 every frame period (TF).

Further, the counter electrode 617 has a counter electrode voltage (Vc) which has a polarity opposite to that of the video signal voltage (VX) by inverting the polarity around the reference potential (VT1) in synchronization with the video signal voltage (VX). ) Is applied. By reversing the polarity of the counter electrode voltage (Vc) in this way, the video signal voltage (VX) can be made lower than in the case where a DC voltage is used as the counter electrode voltage (Vc).

While the scanning pulse (VY) is being applied to the gate electrode (G) 609 of the TFT switching element 605, the video signal voltage (VX) is written in the pixel electrode 613, and the pixel electrode 613 shown in FIG. The pixel electrode potential (Vs) shown in b) is held.

As a result, the potential difference between the pixel electrode potential (Vs) and the counter electrode potential (Vc) is held in the liquid crystal capacitance (CLC) having the liquid crystal composition 619 as a main part for one frame period (TF), and the liquid crystal composition. The object 619 is excited and a display is performed.

The potential difference between the auxiliary capacitance line potential set to the same potential as the counter electrode voltage (Vc) and the pixel electrode potential (Vs) is held in the auxiliary capacitance (Cs) 623 and held in the liquid crystal capacitance (CLC). The one-frame period (TF) display is maintained by compensating for the temporal variation of the generated potential difference.

However, the TFT switching element 6
No. 05 gate electrode (G) 609 and source electrode (S) 61
Parasitic capacitance (CGS) exists between 1 and 1, as shown in FIG. Due to the parasitic capacitance (CGS) of the TFT switching element 605, a level shift (ΔV1) as shown in FIG. 7B occurs in the liquid crystal applied voltage when the scan pulse (VY) falls.

Since a parasitic capacitance (CDS) exists between the drain electrode (D) 607 and the source electrode (S) 611 of the TFT switching element 605 as shown in FIG. 6, the video signal voltage (VX 7) shows the voltage applied to the liquid crystal when the polarity is inverted around the reference potential (VT1) as shown in FIG.
A level shift (.DELTA.V2) as shown in FIG.

As described above, in the conventional liquid crystal display device, the parasitic capacitance (CG
S) and (CDS) cause level shifts (ΔV1) and (ΔV2) in the voltage applied to the liquid crystal.
There has been a problem that the liquid crystal applied voltage applied to 19 fluctuates and flickers and uneven brightness occur in the displayed image.

Regarding the level shift (ΔV1), there is a method of compensating the level shift (ΔV1) to suppress the flicker of the display image by applying a bias voltage to the counter electrode 617 of the liquid crystal display device, for example. Already known.

On the other hand, the level shift (ΔV 2) voltage ΔV
2 [V] is the amplitude of the video signal voltage (VX) dVX
[V], the amplitude of the counter electrode voltage (Vc) is dVc [V],
The capacitance value of the auxiliary capacitance (Cs) 623 is Cs [F], the liquid crystal capacitance (CLC) is CLC [F], the TFT switching element 60.
5 parasitic capacitance (CGS), (CDS) to CGS [F], CDS
If it is [F], it can be shown by the following equation.

ΔV2 = {-CDS.dVX + (CGS + CD
S) .dVc} / (CGS + CDS + CLC + Cs) According to this equation, the level shift (.DELTA.V2) voltage .DELTA.V2
In order to eliminate the flicker and the brightness unevenness of the displayed image by setting [V] to 0, the parasitic capacitance (CDS) itself is eliminated, or the amplitude (dVX) of the video signal voltage (VX) is changed.
It guides us that we must set it to 0.

However, it is practically impossible to eliminate the parasitic capacitances (CGS) and (CDS) of the TFT element.

It is also clear that the amplitude (dVX) of the video signal voltage (VX), which changes every moment to display an image, cannot always be zero.

As described above, in the conventional liquid crystal display device, there is a problem that flicker and brightness unevenness occur in the display image due to the level shift (ΔV2) of the liquid crystal applied voltage due to the parasitic capacitance of the TFT switching element 605. It was

[0022]

The present invention has been made to solve the above problems, and its purpose is to
Provided is a liquid crystal display device which eliminates flicker and brightness unevenness of a display image caused by a level shift (ΔV2) of a liquid crystal applied voltage caused by a parasitic capacitance of an FT switching element, and realizes stable and high-quality image display. To do.

[0023]

In order to solve the above problems, the liquid crystal display device of the first invention is arranged such that a plurality of scanning lines to which scanning pulses are applied and the scanning lines are crossed. A plurality of signal lines to which a video signal voltage whose polarity is inverted at a predetermined cycle with a first reference potential as a center is applied, pixel electrodes arranged at each intersection of the scanning line and the signal line, A transistor switching element connected to the pixel electrode, the scanning line and the signal line, and a plurality of auxiliary capacitance lines forming an auxiliary capacitance between the pixel electrode and the pixel switching element,
Between the pixel electrode and the counter electrode, which is arranged so as to face the pixel electrode and is applied with a counter electrode voltage which is synchronized with the video signal voltage and whose polarity is inverted around the second reference potential. An auxiliary voltage is generated by applying an auxiliary voltage to the auxiliary capacitance line, the liquid crystal composition being sandwiched between the electrodes and an auxiliary voltage that has the same polarity as the opposite electrode voltage and is inverted in polarity with a third reference potential as a center in synchronization with the counter electrode voltage. It is characterized by comprising means.

The liquid crystal display device of the second invention is characterized in that the auxiliary voltage generating means applies an auxiliary voltage having an amplitude larger than that of the counter electrode voltage to the auxiliary capacitance line.

Further, in the liquid crystal display device according to the third aspect of the invention, the auxiliary voltage generating means includes a variation amount of the liquid crystal applied voltage caused by parasitic capacitances between the drain and source electrodes and between the gate and source electrodes of the transistor switching element. Is applied to the auxiliary capacitance line.

As the amplitude (dVH) of the above-mentioned auxiliary voltage (VH) [V], if the amplitude is set larger than the amplitude (dVc) of the counter electrode voltage (Vc), the effect is practically sufficient. However, most preferably, the amplitude of the video signal voltage (VX) is dVX [V] and the counter electrode voltage (Vc).
) Amplitude is dVc [V], and the auxiliary capacitance (Cs) is Cs
[F] and the parasitic capacitances are CGS [F] and CDS [F], dVH = | [(CGS + CDS + Cs) .dVc-CDS
・ If you set dVX] / Cs |, the video signal voltage (V
X) level shift (ΔV2) can be compensated most effectively to eliminate the flicker and uneven brightness of the displayed image, and stable high-quality image display can be realized, but the upper limit of the maximum range is | ) ・ DVc −CDS ・ dV
X] / Cs | × 10, preferably | [(CGS + CDS +
If Cs) · dVc−CDS · dVX] / Cs | × 4 or less, a sufficient visual effect can be obtained.

[0027]

[Function] The TFT switching element in the active matrix type liquid crystal display device has a parasitic capacitance (CGS),
Since (CDS) is present, when the video signal voltage (VX) reverses its polarity around the reference potential, a level shift (.DELTA.V2) tends to occur in the liquid crystal applied voltage.

Therefore, in the present invention, such a level shift (ΔV) is achieved by positively driving the auxiliary capacitance line.
2) to eliminate.

That is, in the liquid crystal display device of the present invention,
By applying an auxiliary voltage (VH) to the auxiliary capacitance line, the polarity of which is inverted around the third reference potential in synchronization with the video signal voltage (VX) and has the same polarity as the counter electrode voltage (Vc). The fluctuation of the liquid crystal applied voltage, that is, the level shift (ΔV2) can be reduced or even eliminated.

The amplitude (dVH) of the auxiliary voltage (VH)
Most preferably, dVH = | [(CGS + CDS +
Cs) · dVc−CDS · dVX] / Cs | is most effectively compensated for the level shift (ΔV2) to eliminate the flicker and uneven brightness of the displayed image and to provide a stable and high-quality image display. Can be realized.

Amplitude (dVH) of the above-mentioned auxiliary voltage (VH)
), The amplitude (dVH) can be suppressed to a small value by setting the auxiliary capacitance (Cs) large, and the configuration of the circuit for generating such an auxiliary voltage should be simple. You can Therefore, it is necessary to configure the auxiliary capacitance (Cs) to be large.
For example, the auxiliary capacitance line is formed of a transparent electrode such as ITO (indium oxide / tin) to increase the overlapping area with the pixel electrode without decreasing the aperture ratio, and the auxiliary capacitance (Cs) is made large in area to obtain the capacitance. Increase the value, or change the material of the insulating film inserted between the auxiliary capacitance line and the pixel electrode to an appropriate dielectric with a high dielectric constant to increase the capacitance value,
Alternatively, it is effective to reduce the film thickness of the insulating film between the auxiliary capacitance line and the pixel electrode to increase the capacitance value.

[0032]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the liquid crystal display device according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a diagram showing a schematic structure of an active matrix liquid crystal display device according to the present invention, and FIG. 2 is a diagram showing a sectional structure of a liquid crystal display element used therein.

This active matrix type liquid crystal display device includes a liquid crystal display element 101 and a scanning line driving circuit 103.
A signal line drive circuit 105 and a counter electrode drive circuit 107
And the auxiliary voltage generating circuit 109 constitutes a main part thereof.

In the liquid crystal display element 101, the liquid crystal composition 115 is sandwiched between the active element substrate 111 and the counter substrate 113, and the active element substrate 111 and the counter substrate 11 are arranged.
Polarizing plates 117 and 119 are attached to each of the three.

In the active element substrate 111, m signal lines 123 and n scanning lines 125 are arranged in a matrix as shown in FIG. 1 on a transparent insulating substrate 121 using a glass substrate, and their intersections are arranged. A TFT element 127 is arranged as a switching element in the portion. Transparent insulating substrate 1
As the material 21, a plastic film or the like is used in addition to the glass substrate.

In this TFT element 127, an insulating film 131 is arranged so as to cover a gate electrode 129 formed integrally with the scanning line 125, and an active layer made of n-type amorphous silicon (a-Si) is formed thereon. 133 is disposed, and the drain electrode 135 formed integrally with the signal line 123 and the source electrode 139 connected to the pixel electrode 137 made of ITO are connected to the active layer 133 via ohmic contact layers (not shown), respectively. There is. This TFT
In the element 127, in order to prevent the active layer 133 from being damaged during manufacturing, a structure in which the channel protective film 141 is arranged on the active layer 133 as a so-called etching stopper is adopted.

Further, on the transparent insulating substrate 121,
The pixel electrode 137 is formed in the same process as the scanning line 125, has a planar arrangement substantially parallel to the scanning line 125, and has a layered structure.
Mo-T formed so as to face each other with the insulating film 131 interposed therebetween.
An auxiliary capacitance line 143 made of a alloy is arranged. The insulating film 1 is provided between the auxiliary capacitance line 143 and the pixel electrode 137.
Using 31 as its dielectric, a storage capacitor (Cs) 145
Is formed.

The active element substrate 111 is formed by disposing the alignment film 147 so as to cover the upper surface of the active element substrate 111.

In the counter substrate 113, a counter electrode 151 and an alignment film 153 facing the pixel electrode 137 are arranged on a transparent insulating substrate 149 made of a glass substrate, and the counter electrode 113 is predetermined with respect to the active element substrate 111. Are combined in parallel at intervals of.

As shown in FIG. 4C, the counter electrode 151 has a counter electrode voltage (Vc) whose polarity is inverted around the second reference potential (VT2) in synchronization with the video signal voltage (VX).
) Generating a counter electrode driving circuit 107.

The liquid crystal composition 115 is sandwiched between the active element substrate 111 and the counter substrate 113, and a sealing material (not shown) is provided around the liquid crystal composition 115 for sealing. Polarizing plates 117 and 119 are attached to the outer surfaces of the active element substrate 111 and the counter substrate 113, respectively.

In such a liquid crystal display element 101, the signal line 123 is connected to the signal line drive circuit 105, the scanning line 125 is connected to the scanning line drive circuit 103, and each auxiliary capacitance line 1 is connected.
Reference numeral 43 is commonly connected to the auxiliary voltage generating circuit 109, and the counter electrode 151 is connected to the counter electrode drive circuit 107.
It is connected to the.

The signal line drive circuit 105 is mainly composed of a shift register circuit and a latch circuit.
As shown in (b), the polarity is the first reference potential (VT
A video signal voltage (VX) which is inverted every one frame period (TF) centering on 1) is generated and sent to the signal line 123.

The scanning line driving circuit 103 is mainly composed of a shift register circuit and a latch circuit, and a scanning pulse (VY) as shown in FIG. 4A for selecting each scanning line 125 line-sequentially. It is generated and sent to the scan line 125.

As shown in FIG. 5, the counter electrode drive circuit 10
7 is a voltage (V which determines the amplitude of the counter electrode voltage (Vc)).
cd) for generating a first DC voltage generating circuit 509 and a second DC voltage generating circuit 5 for generating a second reference potential (VT2).
11, to the second reference potential (VT2) sent from the second DC voltage generating circuit 511, the first DC voltage generating circuit 50
From the second reference potential (VT2) sent from the second DC voltage generating circuit 511 and the adder circuit 513 that adds and outputs the voltage (Vcd) sent from the first DC voltage generating circuit 509. From the subtraction circuit 515 for subtracting and outputting the amplitude voltage (Vcd) sent from the frame signal (SF).
2) and a switch circuit 517 that selects each frame period (TF) every one frame period (TF).

The auxiliary voltage generating circuit 109 converts the second reference potential (VT2) sent from the second DC voltage generating circuit 511 of the counter electrode drive circuit 107 into the third reference potential (VT3).
The DC voltage from the third reference potential (VT3) is added to the third reference potential (VT3) by adding the voltage (Vd) sent from the DC voltage generation circuit 501 to the third reference potential (VT3). The voltage (Vd
) And subtracting circuit 505 for subtracting and outputting
03 and the output from the subtraction circuit 505 are composed of a switch circuit 507 for selecting each frame period (TF) based on the frame signal (SF).

As described above, by alternately selecting the output obtained by adding and subtracting the above voltage (Vd) with respect to the third reference potential (VT3) of the direct current inside the auxiliary voltage generating circuit 109, FIG. As shown in (c), the auxiliary voltage (VH) is swung by the amplitude (dVH) and applied to the auxiliary capacitance line 143 of the auxiliary capacitance (Cs) 145.

Here, the third reference potential (VT3) having the same potential as the second reference potential (VT2) sent from the second DC voltage generating circuit 511 and the voltage (from the DC voltage generating circuit 501 being sent. Vd) is such that the amplitude (dVH) of the auxiliary voltage (VH) is | [(CGS + CDS + Cs) .dVc-
CDS · dVX] / Cs |.

As described above, in this embodiment, the reference potential (VT2) for polarity reversal of the counter voltage (Vc) and the reference potential (VT3) for polarity reversal of the auxiliary voltage are set to the same potential. The potential (VT2) and the reference potential (VT3) may be set to different potentials.

The operation of the active matrix type liquid crystal display device of this embodiment having such a structure will be described with reference to FIGS. 3 and 4.

FIG. 3 is a diagram showing an equivalent circuit of one pixel portion of the active matrix type liquid crystal display device. For example, one pixel of the display pixel (Xi, Yj) at the intersection of the signal line 123 and the scanning line 125 will be mainly described.
As shown in, the video signal voltage (VXi) changes to the drain electrode 1
35, the scanning pulse (VYj) is applied to the gate electrode 12
9 is applied to the drain electrode 135 and the source electrode 1
39, a drain-source current (IDS) flows between them and the video signal voltage (VXi) is written in the pixel electrode 137 connected to the source electrode 139, and the pixel electrode 137 is connected to the pixel electrode 137 shown in FIG.
The pixel electrode potential (Vs) as shown in (e) is held. As a result, the potential difference between the pixel electrode potential (Vs) and the counter electrode potential (Vc) is held in the liquid crystal capacitor (CLC) 155 for one frame period (TF) as shown in FIG. 115 is excited and a display is performed. The pixel electrode potential (Vs) and the auxiliary capacitance line potential (V
H) and the potential difference is held in the storage capacitor (Cs) 145,
The display is maintained for one frame period (TF) by compensating for the temporal variation of the potential difference held in the liquid crystal capacitor (CLC) 155.

By the way, as shown in FIG. 3, an n-type TFT
The parasitic capacitance (CGS) between the gate electrode 129 and the source electrode 139 of the element 127 and the drain electrode 135
Between the source electrode 139 and the source electrode 139, the parasitic capacitance (CDS) is T
It is inevitably present due to the structure of the FT element 127 and the arrangement configuration of the pixel electrode 137 and the signal line 123. Therefore, even if the TFT element 127 is turned off (high resistance state), the liquid crystal capacitance (CLC) 155 and the auxiliary capacitance (Cs) are once provided.
) 145 holds the potential difference, this parasitic capacitance (CG
It changes depending on the potential change of the signal line 123 via S) and (CDS), and due to this, a level shift (ΔV2) tends to occur in the liquid crystal applied voltage.

Therefore, in the liquid crystal display device of the present invention, the auxiliary voltage (VH) corresponding to the level shift (ΔV2) is
) Is applied to the auxiliary capacitance line 143, the potential difference between the liquid crystal capacitance (CLC) 155 and the auxiliary capacitance (Cs) 145, which is changed by the parasitic capacitance (CDS), is compensated, and the level shift (ΔV2) can be eliminated. it can.

The auxiliary voltage (VH) for eliminating such level shift (ΔV2) will be described in more detail.

The amplitude of the auxiliary voltage (VH) is set to dVH [V],
The amplitude of the video signal voltage (VX) is dVX [V], the capacity of the auxiliary capacity (Cs) 145 is Cs [F], and the liquid crystal capacity (CLC).
The capacitance of 155 is CLC [F], parasitic capacitance (CGS), (CD
Assuming that the values of S) are CGS [F] and CDS [F], the level shift (.DELTA.V2) voltage .DELTA.V2 [V] is expressed by the following equation. That is, .DELTA.V2 = (CDS.dVX + Cs.dVH) / (CGS + C
DS + CLC + Cs) According to the present invention, the third electrode is synchronized with the counter electrode voltage (Vc).
The polarity is inverted centering on the reference potential (VT3), and the polarity at that time becomes the same as the polarity of the counter electrode voltage (Vc), and the amplitude (dVH) is | [(CGS + CDS + Cs) .dV.
c −CDS · dVX] / Cs | auxiliary voltage (VH)
Is applied to the auxiliary capacitance line 143 of the auxiliary capacitance (Cs) 145, the level shift (ΔV2
) Is eliminated to suppress the occurrence of flicker and uneven brightness, and a high-quality display image can be obtained.

Further, in this embodiment, the level shift (ΔV1) generated in the pixel electrode potential (Vs) due to the parasitic capacitance (CGS) of the TFT element 127 is the same as the counter electrode 1.
A bias voltage for compensating the level shift (ΔV1) is added to the counter electrode voltage (Vc) applied to 51, that is, the reference potential (VT2) of the counter electrode potential (Vc) as shown in FIG. This level shift (ΔV) is set by setting the voltage (VX) so as to deviate from the reference potential (VT1).
1) has been resolved.

In the above embodiment, the auxiliary voltage (VH
) Amplitude (dVH) is the optimum value that can most effectively eliminate the level shift (ΔV2) as described above | [(CGS
+ CDS + Cs) .dVc-CDS.dVX] / Cs |, but the amplitude (dVH) is | [(CGS +
CDS + Cs) ・ dVc-CDS ・ dVX] / Cs ｜ / 5 or more, a sufficient effect can be obtained in practical use, but the maximum range is │ [(CGS + CDS + Cs) ・ dVc-CDS ・
dVX] / Cs | × 10, preferably | [(CGS + CDS +
Cs) · dVc−CDS · dVX] / Cs│ × 4 or less, a sufficient visual effect can be obtained. Therefore, the amplitude (dVH) is not necessarily limited to the optimum value.

Further, as described above, by applying a predetermined auxiliary voltage (VH) to the auxiliary capacitance line 143, the signal line 1
It is possible to reduce the fluctuation of the potential of the counter electrode 151 which accompanies the fluctuation of the video signal voltage (VX) applied to 23.
It is possible to obtain a higher quality display image. In consideration of such potential fluctuation of the counter electrode 151, it is preferable to set the amplitude (dVH) of the auxiliary voltage (VH) large within the above range, and the amplitude (dVH) |
[(CGS + CDS + Cs) .dVc-CDS.dVX] / Cs
| It is better to set it above.

In this embodiment, the video signal voltage (VX
) Inverts with respect to the reference potential for each frame period (TF) as an example. However, level inversion is also performed when the video signal voltage (VX) is inverted for each scanning line or for each scanning line. Auxiliary voltage (VH) that compensates the fluctuation of the potential difference corresponding to (ΔV2) is applied to the auxiliary capacitance line 1
The same effect can be obtained by applying the voltage to 43.

In this embodiment, the second reference potential (V
Although T2) and the third reference potential (VT3) are made equal to each other, they may be different potentials.

Although the first reference potential (VT1) and the second reference potential (VT2) are set to different potentials in the above embodiment, the present invention is not limited to this. The first reference potential (VT1) and the second reference potential (VT2) may be set to the same potential. However, in that case, the effect of suppressing ΔV1 due to the offset voltage is lost, so it is necessary to either ignore ΔV1 itself because it is negligible for the practical use of image display, or take another means of eliminating ΔV1. Becomes

Further, in the present embodiment, the case where the polarity of the video signal voltage (VX) is inverted with respect to one kind of the first reference potential (VT1) has been described. As described above, the technique of the present invention can be applied even when a plurality of types of reference potentials of the video signal voltage (VX) are set.

Needless to say, the material or structure of the TFT can be variously modified without departing from the scope of the present invention.

[0065]

As described in detail above, in the liquid crystal display device of the present invention, the level shift of the liquid crystal applied voltage caused by the parasitic capacitance of the switching TFT element provided in each pixel portion ( .DELTA.V2) can be compensated to eliminate flicker and uneven brightness, and a stable high-quality image display can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of an active matrix type liquid crystal display device according to the present invention.

FIG. 2 is a diagram showing the configuration of an embodiment of an active matrix type liquid crystal display device according to the present invention.

FIG. 3 is a diagram showing an active matrix type liquid crystal display device according to the present invention in an equivalent circuit.

FIG. 4 is a diagram showing drive waveforms of an active matrix type liquid crystal display device according to the present invention.

FIG. 5 is a diagram showing configurations of an auxiliary voltage generating circuit and a counter electrode driving circuit of the active matrix type liquid crystal display device according to the present invention.

FIG. 6 is a diagram showing an equivalent circuit of a configuration of a conventional liquid crystal display device.

FIG. 7 is a diagram showing drive waveforms of a conventional liquid crystal display device.

[Explanation of symbols]

101 ... Liquid crystal display element, 103 ... Scan line driving circuit, 10
5 ... Signal line drive circuit, 107 ... Counter electrode drive circuit, 10
9 ... Auxiliary voltage generating circuit, 123 ... Signal line, 125 ... Scan line, 127 ... TFT element, 143 ... Auxiliary capacitance line, 155
… Liquid crystal capacity (CLC)

Claims (3)

[Claims] 1. A plurality of scanning lines to which a scanning pulse is applied, and a plurality of video signal voltages which are arranged so as to intersect with the scanning lines and whose polarity is inverted at a predetermined cycle with a first reference potential as a center. A plurality of signal lines, a pixel electrode arranged at each intersection of the scanning line and the signal line, a transistor switching element connected to the pixel electrode, the scanning line, and the signal line, the pixel electrode And a plurality of storage capacitor lines that form storage capacitors between the storage capacitor and a counter electrode voltage that is arranged so as to face the pixel electrode and that reverses its polarity around the second reference potential in synchronization with the video signal voltage. A counter electrode to be applied, a liquid crystal composition sandwiched between the pixel electrode and the counter electrode, the polarity is inverted around a third reference potential in synchronization with the counter electrode voltage, and the counter electrode voltage is applied. Have the same polarity The liquid crystal display device characterized by comprising an auxiliary voltage generating means for applying a co-voltage to the auxiliary capacitance line. 2. The liquid crystal display device according to claim 1, wherein the auxiliary voltage generating means applies an auxiliary voltage having an amplitude larger than that of the counter electrode voltage to the auxiliary capacitance line. 3. The auxiliary voltage generating means generates an auxiliary voltage having an amplitude for compensating for a variation of the liquid crystal applied voltage due to parasitic capacitance between the drain / source electrodes and between the gate / source electrodes of the transistor switching element, The liquid crystal display device according to claim 1, wherein the liquid crystal display device is applied to the auxiliary capacitance line.