JPH05183450A - Digital radio communication equipment - Google Patents

Abstract

PURPOSE:To always obtain a sufficient soft discrimination gain even when the level of a demodulation signal is fluctuated by variably controlling a soft discrimination threshold level of a demodulation means based on error estimate data obtained through comparison of data before and after error correction coding. CONSTITUTION:A CPU 41 executes initial setting of a soft discrimination threshold level and gives the resulting data to a soft discrimination decoder 56 via an interface 45 to set the initial soft discrimination threshold levels NT1, NT2 of each comparator. The decoder 56 starts soft discrimination of a demodulation signal DMS outputted from a delay detector 55 according to the initial value. The decoder 56 compares data before and after error correction decoding and gives the comparison data to the CPU 51. The CPU 41 generates data NTD used to increase the soft discrimination threshold level by a prescribed value and gives the data to the decoder 56, in which soft discrimination is executed. As the result of comparison, the threshold levels NT1, NT2 set to the decoder 56 are variably controlled so that the error estimate bit number is always minimized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital radio communication device used in a digital mobile radio communication system such as an automobile / mobile phone system or a cordless phone system which adopts a digital modulation / demodulation system, and particularly demodulation in a digital demodulation circuit. It relates to a device comprising means for soft decision decoding of a signal.

[0002]

2. Description of the Related Art In recent years, mobile radio communication systems such as automobile / mobile phone systems and cordless phone systems have been
A system adopting a digital modulation / demodulation system has been proposed. This type of system digitizes and transmits not only control signals but also communication contents such as call voice signals when wireless communication is performed between a base station and a mobile station. It is possible to improve the compatibility with and effectively use radio frequency.

By the way, in mobile radio communication systems such as automobile / cell phone systems, occurrence of code errors due to multipath fading is unavoidable. Therefore, in this type of system, generally, for example, when transmitting a call voice signal, the call side voice signal is voice-encoded by the device on the transmission side and error correction coded using, for example, a convolutional code, and then, for example, π Digitally modulated by the / 4 shift DQPSK method and transmitted. On the other hand, in the device on the receiving side, the received modulated carrier wave is first frequency-converted into an intermediate frequency signal or a baseband signal, and then the above π
Demodulate according to the / 4 shift DQPSK method. And
After soft-decision decoding this digital demodulated signal, the soft-decision data is error-correction decoded by, for example, Viterbi decoding, and the digital signal after this error-correction decoding is voice-decoded to reproduce the original call voice signal. ..

[0004]

However, in the conventional digital radio communication apparatus used in this type of system, the thresholds NT1 and NT2 for soft decision decoding are as shown in the eye pattern of FIG. 6, for example. It is fixedly set to a value of about 0.7 (70%) of the standard demodulation signal level. Therefore, for example, when the received electric field strength changes due to a change in the communication environment and the level of the digital demodulated signal fluctuates as shown by the broken line B in FIG. There is a problem that the value is not appropriate for the level of, and as a result, a sufficient soft decision gain cannot be obtained.

The present invention has been made in view of the above circumstances, and an object thereof is to always obtain a sufficient soft-decision gain even if the demodulated signal level fluctuates, thereby always providing the best error. An object of the present invention is to provide a digital wireless communication device capable of performing correction decoding.

[0006]

In order to achieve the above object, the present invention provides a digital demodulating means for detecting a digitally modulated signal and then soft-deciding its detection output according to a soft-decision threshold value. In addition to error correction decoding means for error correction decoding the soft decision data output from the means, error estimation means and soft decision threshold value control means are provided. Then, by the error estimation means,
Error estimated data is obtained by comparing the data obtained by re-encoding the data error-corrected and decoded by the error-correction decoding means with the soft-decision data before the error-correction decoding, and the code error is reduced based on the error-estimated data. Therefore, the soft decision threshold control means variably controls the soft decision threshold in the digital demodulation means.

Further, according to the present invention, the soft decision threshold control means calculates the code error rate based on the error estimation data obtained by the error estimation means, and the soft demodulation means in the digital demodulation means reduces the code error rate. It is also characterized in that the judgment threshold value is variably controlled.

[0008]

As a result, according to the present invention, since the soft decision threshold is variably controlled based on the error estimation result as well, the received electric field strength changes due to the change of the communication environment, etc., and the demodulated signal level changes accordingly. Even then, it is possible to set an optimum soft decision threshold value at each occasion. Therefore, it is possible to always obtain a sufficient soft decision gain, and thus the best error correction decoding can always be performed.

In addition, variable control of the soft decision threshold is performed, for example, by calculating the code error rate based on the error estimation data and variably controlling the soft decision threshold so as to minimize the code error rate. This is done according to the average code error occurrence status for each frame. Therefore, it becomes possible to prevent the soft decision threshold value from changing in response to an instantaneous code error due to noise or the like, and to stably control the soft decision threshold value.

[0010]

EXAMPLES The present invention will be described below based on examples.
FIG. 1 is a circuit block diagram showing the configuration of a digital wireless communication apparatus according to an embodiment of the present invention.

In FIG. 1, a call voice signal input from a microphone 11 is first input to a voice encoding circuit 13 via a voice circuit 12 and is voice encoded here.
The voice coded speech signal is then input to the error correction coding circuit 14. Then, the error correction coding circuit 14 performs error correction coding by, for example, convolutional coding, further interleaves, and then inputs to the modem modulation section 15. In the modem modulating unit 15, the encoded communication data input from the error correction encoding circuit 14 is differentially encoded by, for example, the π / 4 shift DQPSK method, and the transmission intermediate frequency signal is orthogonalized by the differentially encoded signal. Is modulated. Then, this modem modulator 1
The modulated wave signal output from 5 is converted into an analog signal by the digital / analog converter (D / A) 16 and then input to the transmitter 17, which transmits 800 to 900M.
After being converted to a transmission signal in the Hz band, a duplexer (DUP) 1
It is transmitted from the antenna 19 via 8.

On the other hand, the radio signal received by the antenna 19 is input to the receiving section 21 via the duplexer 18 and is frequency-converted into a baseband signal here. This received baseband signal is converted to an analog / digital converter (A /
D) is converted to a digital signal in 22 and then input to the modem demodulation section 23. The modem demodulation unit 23 includes a quadrature demodulator 51, a low pass filter (LPF) 52, a synchronization / clock recovery circuit 53, a changeover switch 54, and a delay detector 5.
5 and a soft-decision decoder 56, the modem demodulation unit 23, together with the modem modulation unit 15, is a single LS.
It is realized by the I device.

In the modem demodulation section 23, the digitized reception baseband signal is first subjected to quadrature demodulation by the quadrature demodulator 51 and then a low pass filter (LP).
F) 52, and is input to the delay detector 55 via the equalizer 27 or without the equalizer 27 depending on the connection state of the changeover switch 54. In the differential detector 55, the orthogonal demodulated baseband signal is differentially detected according to the π / 4 shift DQPSK method. The digital speech voice signal demodulated by the delay detector 56 is soft-decision decoded by the soft-decision decoder 56, and the soft-decision data NHD is input to the error correction decoding circuit 24. In the error correction decoding circuit 24, the soft decision data NHD
Are deinterleaved, and then subjected to error correction decoding by, for example, Viterbi decoding. Then, this error-correction-decoded digital call voice signal is subsequently transmitted to the voice decoding circuit 25.
Then, after being decoded into a call voice signal, the loudspeaker 26 outputs the voice through the voice circuit 12.

The sync / clock recovery circuit 53 extracts a sync word and designated slot information from the received signal, and carries out a process for establishing synchronization and identifying a slot.

Further, the apparatus of this embodiment has a control circuit (CPU) 41 having a microcomputer as a main control unit, and the CPU 41 has a ROM 43 and a ROM 43 storing a control program and the like via a bus 42. RAMs 44 for storing various data are respectively connected. An interface 45 is connected to the bus 42, and a CPU is connected via the interface 45.
41, the modem demodulation unit 23, and the error correction coding circuit 1
Predetermined control data is transmitted / received to / from 4 and the error correction decoding circuit 24. The receiving unit 21 is provided with a reception electric field strength detector, and the detection value of the reception electric field strength detector is an analog-digital converter (A / D) 2
It is digitized in 8 and then taken into the CPU 41 via the interface 45.

The soft-decision decoder 56 is constructed, for example, as shown in FIG. That is, the soft decision decoder 56 has two full adders 61 and 62. Each of these full adders 61 and 62 has a CPU.
The soft decision threshold value data NTD output from 41 and the data obtained by logically inverting the threshold value data NTD by the inverter 63 are input. And full adders 61, 62
Then, the offset value generated by the offset generator 64 (“1000 ... 0 at the center of full scale”
The soft decision threshold value data NTD and its inverted data are added to the OS (having a value of "0") to generate soft decision threshold values NT1 and NT2. And
These soft decision thresholds NT1 and NT2 are input to the three comparators 65, 66 and 67, respectively. In these comparators 65, 66 and 67, the soft decision threshold value NT1, the offset value OS and the soft decision threshold value NT are respectively obtained.
The level of the digital demodulated signal DMS output from the delay detector 55 is determined using 2 as a threshold value, and each determination data is input to the encoder 68. In the encoder 68, each decision data is converted into 2-bit soft decision data NHD according to the conversion logic shown in FIG.

Further, the error correction decoding circuit 24 is provided with an error estimation circuit 72 in addition to the Viterbi decoder 71 as shown in FIG. The error estimation circuit 72 has a convolutional encoder 73, a delay circuit 74, and an exclusive OR circuit 75. Then, the digital demodulated signal RCS that has been error-corrected and decoded by the Viterbi decoder 71 is re-encoded by the convolutional encoder 73, and the re-encoded data and the soft-decision data NHD before the error-correction decoding are The exclusive OR circuit 75 compares the most significant bits bit by bit, and outputs a data string representing the match / mismatch as error estimation data CSD. The delay circuit 7
4 delays the bit string of the soft-decision data NHD by a time corresponding to the processing delay in the convolutional encoder 73, thereby changing the input bit timing of the re-encoded data and the soft-decision data NHD to the exclusive OR circuit 75. To match.

The error estimation data CSD output from the error estimation circuit 72 is sent to the CP via the interface 45.
It is taken in by U41. The CPU 41 newly has a soft decision threshold control means 41a as its control function. The soft decision threshold control means 41a counts the number of error estimation bits for each frame based on the error estimation data CSD output from the error estimation circuit 72 and makes a soft decision to reduce the number of error estimation bits. Threshold data NT
D is variably controlled. Next, the variable control operation of the soft decision threshold in the apparatus configured as described above will be
It will be described according to the control procedure of the PU 41.

Prior to reception, the CPU 41 sets the initial value of the soft decision threshold value in step 5a as shown in FIG.
The data NTD is supplied to the soft decision decoder 56 via the interface 45. For this reason, the initial values of the soft decision thresholds NT1 and NT2 corresponding to the soft decision threshold data NTD are set in the comparators 65, 66 and 67 of the soft decision decoder 56. Therefore, thereafter, the soft decision decoder 56 starts soft decision of the digital demodulation signal DMS output from the delay detector 55 according to the initial values of the soft decision thresholds NT1 and NT2. Further, in the error correction decoding circuit 24, the soft decision data NHD output from the soft decision decoder 56 is error correction decoded by the Viterbi decoder 71 into a digital demodulation signal RCS, which is supplied to the speech decoding circuit 25 in the subsequent stage. At the same time, it is input to the error estimation circuit 72. In the error estimation circuit 72, the data obtained by re-encoding the digital demodulated signal RCS by the convolutional encoder 73 and the upper bits of the soft decision data NHD before being subjected to error correction decoding by the Viterbi decoder 71 have an exclusive logic. Sum circuit 7
5, the data string representing the match / mismatch is supplied to the CPU 41 as error estimation data CSD.

In this state, the CPU 41 counts the error estimation bit number CONT1 for one frame based on the error estimation data CSD in step 5b. That is, the bit error rate in one frame reception period is obtained. Then, in step 5c, soft decision threshold value data NTD for increasing the soft decision threshold value by a certain amount is generated, and this data NTD is supplied to the soft decision decoder 56 via the interface 45. Therefore, the soft-decision decoder 25 sets the soft-decision thresholds NT1 and NT2 that are increased by a certain amount according to the soft-decision threshold data NTD, and this threshold NT1 is set in the reception period of the next frame. , N
A soft decision is made on the digital demodulation signal DMS according to T2.

Further, in this state, the error estimation circuit 72 detects the error estimation data CS for the data soft-decised according to the soft decision thresholds NT1 and NT2 increased by the fixed amount.
D is obtained. The CPU 41 counts the number of error estimation bits CONT2 based on the error estimation data CSD in step 5d, and at the time when one frame has been counted, compares this count value CONT2 with the count value CONT1 in the previous frame in step 5e. .. And CONT2 ≦ C
If it is ONT1, it is determined that the soft decision thresholds NT1 and NT2 can be further increased, and step 5
The process proceeds to step c, where soft decision threshold value data NTD for further increasing the soft decision threshold value by a fixed amount is generated and supplied to the soft decision decoder 56. Thereafter, similarly, the control of steps 5c to 5e is repeated for each frame until the largest soft decision threshold value that minimizes the bit error rate of one frame is obtained.

On the other hand, as a result of the determination in step 5e, if the count value CONT2 of the estimated error bit number of the latest received frame becomes larger than the count value CONT1 of the estimated error bit number of the immediately previous received frame, That is, when CONT2> CONT1, it is determined that the soft decision thresholds NT1 and NT2 should be decreased, and the process proceeds to step 5f, where the soft decision threshold for decreasing the soft decision threshold by a fixed amount. Generate value data NTD,
It is supplied to the soft decision decoder 56. Therefore, the soft-decision thresholds NT1 and NT2 set in the soft-decision decoder 56 are reduced by a certain amount, which causes the soft-decision decoder 56 to reduce the certain amount in the next one-frame reception period. A soft decision is made on the digital demodulation signal DMS according to the values NT1 and NT2.

As described above, according to the present embodiment, the number of error estimation bits is counted for each frame, and the count value CON
T2 and the count value CON of the error estimation bit number one frame before
Since T1 is compared and the soft decision thresholds NT1 and NT2 set in the soft decision decoder 56 are variably controlled so that the number of error estimation bits is always minimized as a result of this comparison. The optimum soft decision threshold N for each frame
T1 and NT2 can be set. Therefore, even if the digital demodulation signal level fluctuates due to a change in the communication environment or the like, the optimum soft decision can be made each time. That is, a sufficiently large soft decision gain can always be obtained.

Further, according to the present embodiment, since the number of error estimation bits for each frame, that is, the bit error rate is obtained and the soft decision threshold is variably controlled, the digital demodulated signal due to the influence of noise etc. The soft-decision threshold value can be stably controlled without responding to an instantaneous amplitude change.

The present invention is not limited to the above embodiment. For example, in the above-mentioned embodiment, the number of error estimation bits is calculated for each frame and the soft decision threshold is variably controlled.
The soft decision threshold may be variably controlled by obtaining the number of error estimation bits for each slot or every few bits. Further, the period for counting the number of error estimation bits may be variable according to the state of factors that change the level of the digital demodulation signal such as the communication environment.

In addition, the configurations of the soft-decision decoder and the error estimation circuit, the control procedure and control contents of the soft-decision threshold control means by the CPU, the coding rate and the constraint length of the convolutional code,
The type of system to be applied, the configuration of the digital wireless communication device, and the like can be variously modified and implemented without departing from the scope of the present invention.

[0027]

As described above in detail, according to the present invention, the digital demodulation means for detecting the digital modulated signal and then soft-deciding the detection output according to the soft-decision threshold value, and the digital demodulation means outputted from the digital demodulation means. In addition to error correction decoding means for performing error correction decoding on soft decision data, an error estimation means and a soft decision threshold value control means are provided, and the error estimation means performs error correction decoding on the error correction decoding means. The soft decision threshold value control means for reducing the code error based on the error estimation data by comparing the re-encoded data with the soft decision data before the error correction decoding. By this, the soft decision threshold in the digital demodulation means is variably controlled.

Therefore, according to the present invention, it is possible to always provide a sufficient soft decision gain even if the demodulated signal level fluctuates, thereby providing a digital radio communication apparatus capable of always performing the best error correction decoding. it can.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a configuration of a digital wireless communication device according to an embodiment of the present invention.

FIG. 2 is a circuit block diagram showing a configuration of a soft-decision decoder of the device shown in FIG.

FIG. 3 is a diagram showing conversion logic of an encoder of the soft decision decoder shown in FIG.

FIG. 4 is a circuit block diagram showing a main configuration of an error correction decoding overcircuit of the device shown in FIG.

5 is a flowchart showing a control procedure and control contents of soft decision threshold control of the CPU of the apparatus shown in FIG.

FIG. 6 is a diagram showing an eye pattern of a digital demodulation signal used for explaining conventional problems.

[Explanation of symbols]

11 ... Microphone, 12 ... Voice circuit, 13 ... Voice coding circuit, 14 ... Error correction coding circuit, 15 ... Modem modulator, 16 ... Digital / analog converter, 17 ... Transmitter, 18 ... Shared device, 19 ... Antenna, 21 ... Receiver, 2
2, 28 ... Analog-digital converter, 23 ... Modem demodulation section, 24 ... Error correction decoding circuit, 25 ... Voice decoding circuit, 26 ... Speaker, 27 ... Equalizer, 41 ... Control circuit (CPU), 41a ... Soft decision threshold control means, 42 ...
Bus, 43 ... ROM, 44 ... RAM, 45 ... Interface, 51 ... Quadrature demodulator, 52 ... Low-pass filter (L
PF), 53 ... Synchronization / clock recovery circuit, 54 ... Changeover switch, 55 ... Delay detector, 56 ... Soft decision decoder, 6
1, 62 ... Full adder, 63 ... Inverter, 64 ... Offset generator, 65, 66, 67 ... Comparator, 68 ... Encoder, 71 ... Viterbi decoder, 72 ... Error estimation circuit, 73
... convolutional encoder, 74 ... delay circuit, 75 ... exclusive OR circuit.

Claims (2)

[Claims] 1. A digital demodulating means for detecting a digital modulated signal and then soft-deciding its detected output according to a soft-decision threshold value, and soft-decision data outputted from the digital demodulating means for error correction decoding. Error correction decoding means, and error estimation means for obtaining error estimation data by comparing the data obtained by re-encoding the decoded data obtained by this error correction decoding means with the soft decision data before the error correction decoding, Soft decision threshold control means for variably controlling the soft decision threshold in the digital demodulation means to reduce code errors based on the error estimation data obtained by the error estimation means. Characteristic digital wireless communication device. 2. The soft-decision threshold control means calculates a code error rate based on the error estimation data obtained by the error estimation means, and the soft-decision threshold in the digital demodulation means to reduce the code error rate. 2. The digital wireless communication device according to claim 1, wherein the value is variably controlled.