JPH05167097A - Light receiving element - Google Patents

Abstract

PURPOSE:To enable a light receiving element having a small film thickness to be realized which can be formed on an insulating substrate and operates at the higher speed than amorphous silicon. CONSTITUTION:In a light receiving element having a planar type p-i-n structure wherein p-type and n-type polycrystal silicon regions 3, 4 are provided on both the sides of an i-type polycrystal silicon thin film 2 which is formed on a glass substrate 1 and is doped with no impurity, an amorphous silicon light receiving part 7 is provided on the i-type polycrystal silicon thin film 2, and first and second gate electrodes 8, 9 are provided respectively on p-i junction and n-i junction parts via SiO2 insulating films 5, 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light receiving element applied to optical communication, optical information processing or image sensing.

[0002]

2. Description of the Related Art Amorphous silicon has an absorption coefficient of visible light extremely larger than that of single crystal or polycrystalline silicon, and even a thin film of about 100 nm has photosensitivity. Further, since it can be formed on a glass substrate at a low cost and in a large area, it is widely used as a light receiving element for an image sensor in equipment such as facsimiles and copying machines.

In the structure of the light receiving element made of amorphous silicon, a photoconductive element in which an ohmic electrode is provided in an i layer not doped with impurities, a photodiode in which p layers, i layers, and n layers are stacked, and a thin film transistor (TFT). ) There is a phototransistor using the optical response of.

[0004]

Although amorphous silicon has high photosensitivity, it has a problem that it has a high resistance because the carrier mobility is low and the response speed of the light receiving element is essentially slow. In the photoconductive element and TFT structure,
It is several hundreds μs to 1 ms at the fastest, and 1 μs at the most even for a relatively fast photodiode structure.

On the other hand, polycrystalline silicon has a carrier mobility higher than that of amorphous silicon by about two to three digits and an operating speed higher, but its absorption coefficient for visible light is low. There is a problem that the film thickness needs to be several tens of μm, which deviates from a practical film thickness as a thin film element formed on an insulating substrate.

Further, the pn junction or the p-i-n junction of polycrystalline silicon is caused by the segregation of impurities at the crystal grain boundaries at the junction interface and the concentration of defects at the junction interface, which causes trap centers near the junction interface. There was a serious problem that the density became extremely high. For this reason, the literature (eg Journal
of the Electrochemical So
ciety vol. 125, No. 10 1987, p. 1648), when a reverse electric field is applied to the junction, a tunnel current or Poole-Frenkel current flows through the trap center near the junction interface.
The reverse characteristic of the junction has a problem that the leak current is large.

Therefore, the present invention has been made in order to solve the above-mentioned conventional problems, and its object is to be formed on an insulating substrate, to operate at a higher speed than amorphous silicon, and to reduce the element film thickness. It is to provide a thin light receiving element.

[0008]

In order to achieve the above object, the present invention provides a p-type polycrystalline silicon film and an n-type polycrystalline silicon film on both sides of an impurity-undoped i-type polycrystalline silicon film formed on a substrate. In a planar p-i-n structure in which a p-type polycrystalline silicon film is arranged, a light receiving portion made of an amorphous semiconductor is provided on the i-type polycrystalline silicon film and p
A gate electrode is provided on at least one of the -i junction and the ni junction through an insulating film.

[0009]

In the present invention, an appropriate voltage is applied to the gate electrode formed on at least one of the p-i junction and the n-i junction of the polycrystalline silicon via the insulating film, and the i-th A p-channel can be induced on the region side and an n-channel on the i-region side of the n-i junction to form the interface of the junction in the i-region where the trap center density is low.

This makes it possible to reduce the tunnel current passing through the trap center, the Pool-Frenkel current, etc., and the reverse dark current of the polycrystalline silicon pin diode is significantly reduced.

On the other hand, amorphous semiconductors have much higher resistance than polycrystalline silicon, so polycrystalline silicon p
Even if it is formed in contact with the i layer of the -i-n diode and is slightly biased, carriers do not flow from the amorphous semiconductor into the i-layer polycrystalline silicon.

When light enters the light receiving portion of the amorphous semiconductor, photo-induced carriers are generated. The generated carriers are injected into the i layer of the polycrystalline silicon pin diode by a slight bias applied to the amorphous semiconductor. At this time, since the amorphous semiconductor has a larger band gap than the polycrystalline silicon, carriers in the amorphous semiconductor are efficiently injected into the i-layer polycrystalline silicon. As a result, the carriers injected into the i-type polycrystalline silicon can be observed as a photocurrent.

[0013]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a sectional view of an essential part showing the structure of an embodiment of a light receiving element according to the present invention. In the figure, for example, a non-doped i-type polycrystalline silicon thin film 2 having a film thickness of about 50 nm is formed on a glass substrate 1, and boron-doped p-type polycrystalline silicon regions 3 and phosphorus-doped regions 3 are formed on both sides thereof by, for example, an ion implantation method. N-type polycrystalline silicon region 4 is formed.

On the i-type polycrystalline silicon thin film 2, the p-type polycrystalline silicon region 3 and the n-type polycrystalline silicon region 4, a SiO ₂ film having a thickness of about 100 nm is deposited by sputtering and patterned. By S
An iO ₂ insulating film 5 and a SiO ₂ insulating film 6 are formed.

Next, i-type amorphous silicon not doped with impurities is deposited by plasma CVD to a film thickness of about 200 nm, and the amorphous silicon light receiving portion 7 is formed by patterning. Next, aluminum is used to form the first gate electrode 8 on the p-i junction and also n.
Second gate electrodes 9 are formed on the -i junctions, respectively. Further, an ohmic electrode 10 for the p-type region, an ohmic electrode 11 for the n-type region, and an ohmic electrode 12 for the amorphous silicon are formed.

By the way, at the interface between the p-i junction and the n-i junction formed by ion implantation, the trap centers are far larger than those in the polycrystalline silicon film due to residual defects and segregation of impurities caused by ion implantation. There are many. Therefore, when a reverse bias is applied to the junction, a leak current in the reverse direction becomes extremely large due to a tunnel current passing through the trap center of the interface, a Poole-Frenkel current, and the like. The situation is not limited to ion implantation, and the situation is the same when a p-type polycrystalline silicon film or an n-type polycrystalline silicon film is deposited to form a junction.

Also in the structure of the light receiving element according to this embodiment shown in FIG. 1, the ohmic electrode 1 to the p-type region is applied without applying a voltage to the first gate electrode 8 and the second gate electrode 9.
When the voltage-current characteristic between 0 and the ohmic electrode 11 to the n-type region, that is, the voltage-current characteristic of the polycrystalline silicon pin diode is measured, the reverse direction is shown as shown in FIG. The leakage current was extremely large.

In the structure of the light receiving element shown in FIG. 1, when a negative voltage is applied to the first gate electrode 8 and a positive voltage is applied to the second gate electrode 9, the first gate electrode 8 is formed as shown in FIG. A p-channel 13 is formed in the i-type polycrystalline silicon thin film 2 under 8 and an n-channel 14 is formed in the i-type polycrystalline silicon thin film under the second gate electrode 9.

As a result, the interface between the p-i junction and the n-i junction moves from the place having many trap centers to the i-type polycrystalline silicon thin film 2 having few trap centers. When the voltage-current characteristics of the diode were measured in this state, the reverse leakage current was significantly reduced as shown in FIG. 2 (b), and normal diode characteristics were obtained. The above are the characteristics when no voltage is applied to the ohmic electrode 12 to the amorphous silicon.

On the other hand, since amorphous silicon has much higher resistance than polycrystalline silicon, even if a slight voltage is applied to the ohmic electrode 12 for amorphous silicon,
It was possible to maintain the reverse leakage current level shown in FIG. In this state, when light is irradiated to the amorphous silicon light receiving portion 7 from the ohmic electrode 12 side or the glass substrate 1 side to the amorphous silicon shown in FIG. 1 or FIG. 3, photo-induced carriers generated in the amorphous silicon are i-type polycrystals. After being injected into the silicon thin film 2, a photocurrent could be observed as shown by the reverse current at the time of light irradiation in FIG. A sufficient on-off ratio was obtained compared to the current in the dark.

In this embodiment, the first gate electrode 8
The second gate electrode 9 and the SiO ₂ insulating film 5
Although the case where it is formed on the polycrystalline silicon layer with the SiO ₂ insulating film 6 interposed therebetween has been described, it may be formed below the polycrystalline silicon layer. Alternatively, one of the first gate electrode 8 and the second gate electrode 9 may be formed above and the other may be formed below. Further, it is possible to reduce the reverse leakage current to some extent even if it is not provided on both the first gate electrode 8 and the second gate electrode 9 or provided on either one.

Further, in the present embodiment, different voltages are applied to the first gate electrode 8, the second gate electrode 9, the ohmic electrode 10 for the p-type region and the ohmic electrode 11 for the n-type region. Depending on the operating voltage, it is possible to connect the first gate electrode 8 and the ohmic electrode 10 to the p-type region, and to connect the second gate electrode 9 and the ohmic electrode 11 to the n-type region. Is.

Needless to say, the same effect as described above can be obtained by using an amorphous semiconductor containing hydrogen and at least one element of silicon, carbon, and germanium in the light receiving portion made of the amorphous semiconductor. ..

[0024]

As described above, according to the present invention,
By forming the interface between the p-i junction and the n-i junction in the i region where the trap center density is low, it became possible to reduce the tunnel current or Poole-Frenkel current passing through the trap centers. Therefore, in polycrystalline silicon, which cannot be used as a photodiode in the related art, the reverse leakage current of the diode is significantly reduced, and it can be used as a photodiode.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of essential parts showing a configuration according to an embodiment of a light receiving element of the present invention.

2A is a current when no voltage is applied to the first gate electrode and the second gate electrode in the light receiving element of FIG.
FIG. 3B is a diagram showing voltage characteristics, and FIG. 3B is a diagram showing current-voltage characteristics in the dark state when a voltage is applied to the first gate electrode and the second gate electrode in the light receiving element of FIG. 1 and when light is irradiated. Is.

FIG. 3 is a sectional view of an essential part for explaining the operation of the light receiving element according to the present invention.

[Explanation of symbols]

1 glass substrate 2 i-type polycrystalline silicon thin film 3 p-type polycrystalline silicon region 4 n-type polycrystalline silicon region 5 SiO ₂ insulating film 6 SiO ₂ insulating film 7 amorphous silicon light receiving portion 8 first gate electrode 9 second gate Electrode 10 Ohmic electrode to p-type region 11 Ohmic electrode to n-type region 12 Ohmic electrode to amorphous silicon 13 p-channel 14 n-channel

Claims (1)

[Claims] 1. A plane type p formed by arranging a p-type polycrystalline silicon film and an n-type polycrystalline silicon film on both sides of an impurity-undoped i-type polycrystalline silicon film formed on a substrate.
In a light receiving element having a -i-n structure, a light receiving portion made of an amorphous semiconductor is provided on the i-type polycrystalline silicon film, and a p-i junction portion and an n-
A light-receiving element comprising a gate electrode provided on at least one of the i-junctions via an insulating film.